CN113127393A - Method, device and equipment for online reading EEPROM chip data and storage medium - Google Patents
Method, device and equipment for online reading EEPROM chip data and storage medium Download PDFInfo
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- CN113127393A CN113127393A CN202110251577.XA CN202110251577A CN113127393A CN 113127393 A CN113127393 A CN 113127393A CN 202110251577 A CN202110251577 A CN 202110251577A CN 113127393 A CN113127393 A CN 113127393A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0016—Inter-integrated circuit (I2C)
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
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- G06F2213/0042—Universal serial bus [USB]
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/38—Universal adapter
- G06F2213/3852—Converter between protocols
Abstract
The invention provides a device for reading EEPROM chip data on line, comprising: a data reading main board configured to read I2C, converting the data into USB data; and the chip connecting tool is connected with the data reading main board and the EEPROM chip. The invention also provides a method for reading EEPROM chip data on line, which comprises the following steps: the computer and the EEPROM chip are connected through the device; reading, by the computer via the device, data on the EEPROM chip. The invention reads the EEPROM chip data on line and checks and stores the read data, thereby being convenient for checking and judging the correctness and rationality of the chip data. And the operation of reading EEPROM chip data and checking and saving data on line is simple and convenient, the tool is simple and easy to manufacture and can be repeatedly used, time and labor are saved, and the cost is greatly saved.
Description
Technical Field
The present invention relates to the field of electronic technologies, and in particular, to a method, an apparatus, a device, and a storage medium for online reading of data of an EEPROM chip.
Background
EEPROM chips are used in many fields, for example, in the field of electronic products such as air conditioners and automobiles, and in other fields such as storage and transportation. At present, most variable frequency air conditioners are provided with EEPROM chips (commonly, such as 24C16, 24C08, 24C02 and the like), and the EEPROM chips (called E party for short) store the operation parameter data of an air conditioner controller. EEPROM (electrically Erasable Programmable read only memory) refers to a charged Erasable Programmable read only memory. The EEPROM chip is a storage chip with no data loss after power failure, can keep the program of the air conditioner controller unchanged, and can be matched with different application scenes only by modifying the parameters of the EEPROM. In some cases, when some EEPROM chip data needs to be queried or copied, it is not possible to determine whether the parameter setting in the acquired EEPROM chip data is reasonable because a source file that lacks the EEPROM chip data (for example, a motherboard returned after an air conditioner cannot find an original programming file for some reason). In this case, the EEPROM chip data can only be read and/or saved from the motherboard in order to look up individual parameter values and to determine their plausibility. And if necessary, saving the parameter value for burning into an EEPROM chip on other mainboard. If the data of the EEPROM chip is read and/or stored from the existing mainboard into a computer and whether the writing is correct or not is judged, an online reading and verifying device is needed.
The prior art, such as CN210721449U, discloses an EEPROM chip program programming device and system. The EEPROM chip program programming device comprises a preset EEPROM chip, a programmer and a chip connecting tool. The programmer is connected with a preset EEPROM chip and is connected with the EEPROM chip to be written through the chip connecting tool. The programmer receives program data sent by a preset EEPROM chip. And pulling down the write protection pin to be written into the EEPROM chip by the chip connecting tool so as to enable the programmer to write the program data into the EEPROM chip. However, this is just an off-line programming of the EEPROM chip program, and cannot read, verify, and save the programming file for the EEPROM chip.
Prior art CN108897553A discloses a programming device including a chip program output device (host), a USB (Universal Serial bus) to Serial converter and a chip programming tool with a conduction device, wherein the USB to Serial converter adopts a USB interface to UART (Universal Asynchronous Receiver transmitter)ter) interface. The UART belongs to asynchronous communication, a bus is an asynchronous serial port, and received data and transmitted data are separated. CN108897553A is connected with the chip through a USB-to-UART interface to complete the programming of the chip. For EEPROM chip, the data needs to pass through I2The C (also called IIC: Inter-Integrated Circuit) interface is connected to the EEPROM chip to obtain data. Wherein, I2C belongs to synchronous communication, which has two bus lines: a serial data line sda (serial data) and a serial clock line scl (serial clock). Therefore, the USB to UART interface and the corresponding conducting device in the prior art are not suitable for online reading, checking and saving of data of the EEPROM chip.
Disclosure of Invention
The invention aims to provide a method, a device, equipment and a storage medium for online reading of EEPROM chip data, which are used for online reading of the EEPROM chip data, verification and storage of the EEPROM chip data in an online mode. The connecting tool for operating the EEPROM chip data on line is simple and convenient to assemble, low in cost and suitable for product developers applying the EEPROM chips.
The purpose of the invention and the technical problem to be solved are realized by adopting the following technical scheme.
According to one aspect of the present invention, an apparatus for reading data of an EEPROM chip online, the apparatus comprising: the data reading main board is configured to convert the I2C data into USB data; and the chip connecting tool is used for connecting the data reading main board and the EEPROM chip.
According to another aspect of the present invention, the data reading main board further includes card slots, wherein the number of the card slots is the same as the number of the pins of the EEPROM chip, and the order of the card slots corresponds to the order of the pins of the EEPROM chip.
The data reading mainboard includes: the main chip MCU, which is CH 341T.
According to still another aspect of the present invention, a chip connection tool includes:
the pin header fixing plate comprises pin headers and pins corresponding to the pin headers, and the pin header sequence corresponding to the pin headers are the same as the pin sequence of the EEPROM chip;
the thimble fixing plate comprises a thimble and a pin corresponding to the thimble, and the sequence of the thimble and the sequence of the pin corresponding to the thimble are the same as the sequence of the pin of the EEPROM chip; and the connecting flat cable is configured to connect the pins corresponding to the flat pins and the pins corresponding to the ejector pins.
According to another aspect of the invention, the pin header of the pin header fixing plate is coupled with the card slot on the data reading main board. The thimble of the thimble fixing plate is coupled with the pin of the EEPROM chip.
According to another aspect of the invention, the pin header of the pin header fixing plate is coupled with the card slot on the data reading main board.
According to another aspect of the invention, the thimble of the thimble fixing plate is coupled with the pin of the EEPROM chip.
According to yet another aspect of the present invention, the model of the EEPROM chip includes 24C32, 26C16, 24C08, and 24C 02.
According to another aspect of the present invention, the pins corresponding to the pin header and the thimble respectively include: pins A0, A1, A2, GND, VCC, WP, SCL and SDA, wherein 4 pins (A0, A1, A2 and GND) corresponding to the pins and 4 pins (A0, A1, A2 and GND) corresponding to the thimble are connected to the first row; VCC pins corresponding to the row pins are connected with VCC pins corresponding to the ejector pins through a second row wire; the WP pin corresponding to the pin header is connected with the WP pin corresponding to the thimble through a third flat cable; the SCL pin corresponding to the ejector pin is connected with the SCL pin corresponding to the ejector pin through a fourth flat cable; and the SDA pin corresponding to the pin header is connected with the SDA pin corresponding to the thimble through a fifth flat cable.
According to another aspect of the present invention, the present invention further includes a method for online reading of data of an EEPROM chip, the method comprising: connecting a computer and an EEPROM chip through the device; the data on the EEPROM chip is read by the computer via the device.
According to yet another aspect of the present invention, the present invention also includes a computer-readable storage medium storing executable instructions that, when executed by a processor, cause the execution of the aforementioned method for reading EEPROM chip data online. The readable storage medium may be a nonvolatile memory such as a hard disk or a magnetic disk, and may be applied to various terminals, such as a computer, a server, and the like.
According to another aspect of the present invention, the present invention further includes an apparatus for online reading of data of an EEPROM chip, the apparatus comprising: a processor; and the storage device is used for storing executable instructions, and when the executable instructions are executed by the processor, the method for reading the data of the EEPROM chip on line can be realized.
Compared with the prior art, the invention has obvious advantages and beneficial effects. By means of the technical scheme, the method, the device, the equipment and the storage medium for reading the EEPROM chip data on line can obtain obvious technical progress and practicability, have industrial wide utilization value and at least have the following advantages:
1. different EEPROM chip data are applied to different scenes, which is beneficial for developers to read the EEPROM chip data on line and verify and store the read data, thereby being convenient for checking and judging the correctness and rationality of the chip data.
2. The operation of reading EEPROM chip data on line and checking and storing the data is simple and convenient, the tool is simple and easy to manufacture and can be repeatedly used, time and labor are saved, and the cost is greatly saved.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented in accordance with the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more clearly understood, the following preferred embodiments are described in detail with reference to the accompanying drawings.
Drawings
FIG. 1 is a schematic diagram of a prior art method of reading data from an EEPROM chip;
FIG. 2 is a structural connection diagram of the device of the present invention;
FIG. 3 is a data interface connection diagram of the apparatus of the present invention;
FIG. 4 is a schematic diagram of a data reading motherboard according to the present invention;
FIG. 5 is a schematic circuit diagram of the data reading motherboard according to the present invention;
FIG. 6 is a schematic diagram of a card slot of the data reading motherboard according to the present invention;
fig. 7 is a schematic diagram of pin connection in the internal structure of the chip connection tool of the present invention.
Detailed Description
To further illustrate the technical means and effects of the present invention adopted to achieve the predetermined objects, the following detailed description will be provided for a method, an apparatus, a device and a storage medium for online reading of data of an EEPROM chip according to the present invention, with reference to the accompanying drawings and preferred embodiments.
While the present invention has been described in terms of specific embodiments with a full understanding of the technical and functional aspects of the invention to achieve the intended purpose, the accompanying drawings are included to provide a reference and an illustration only, and are not intended to limit the invention.
The EEPROM chip to be read by the device and the method of the invention adopts I2And C, a bus. I is2The C (Inter-Integrated Circuit) bus is a two-wire serial bus developed by PHILIPS corporation, one wire being the serial time bus SCL and the other wire being the serial data bus SDA for connecting the microcontroller and its peripherals. EEPROM chips come in a variety of models, with 24C32, 26C16, 24C08, and 24C02 having 8 pins. Referring to fig. 1, fig. 1 shows a pin arrangement for an EEPROM chip model 24C 16. The 8 pins include 3 Address pins, 1 ground pin, 1 power pin, 1 write protect pin, 1 clock pin, and 1 data pin, namely, a0(Address0) pin, a1(Address1) pin, a2(Address2) pin, gnd (ground) pin, vcc (volt Current connector) pin, wp (write protect) pin, scl (serial clock) pin, and sda serial data pin. The VCC pin provides necessary working power supply; the A0-A2 pin is a hardwired device address input; the SCL pin is used for inputting positive edge clock data into each EEPROM device and outputting negative edge clock data out of each EEPROM device; the SDA pin is used for bidirectional serial data transmission; and the write protect pin provides hardware data protection (whileThis pin, when grounded, allows normal "read/write" operations; when the pin is connected to the power supply, the write protect function is turned on, thereby not allowing "write" operations). Peripheral devices may pass through I2And the C interface is accessed to the EEPROM chip to acquire the data of the EEPROM chip.
In the prior art, a clock bus SCL and a data bus SDA of an EEPROM chip on a chip motherboard are connected to a main chip MCU (micro Controller unit) on the chip motherboard to implement a function of the main chip MCU reading data from the EEPROM chip. Meanwhile, in order to prevent the original data from being tampered by writing useless data into the EEPROM chip accidentally, the WP pin is pulled up by the resistance power supply VCC, and write protection is opened, so that the EEPROM chip is protected from being wrongly written with the data. Referring to fig. 1, a connection diagram of an EEPROM chip with model 24C16 and a main chip MCU on a chip motherboard is shown. The A0-A2 and the GND pin are connected to the ground together, and the WP pin is connected with a power supply through a resistor.
The device for reading the EEPROM chip data on line comprises a computer or other USB host, for example, a server or a mobile phone and other similar devices, a data reading mainboard and a chip connecting tool. The computer is provided with corresponding data reading software which can read the data of the EEPROM chip and verify and/or store the read data. The data reading main board comprises a main chip MCU. The MCU may be CH341T, which is implementation I2C, converting the data into USB data. And the computer and the EEPROM chip are communicated with each other through the data reading mainboard. And the chip connecting tool is used for providing physical connection between the EEPROM chip and the data reading main board so as to enable the EEPROM chip and the data reading main board to communicate with each other. Two ends of the chip connecting tool are respectively connected with the data reading main board and the EEPROM chip on the chip main board. In the embodiment, a computer or other USB host is connected to a data reading motherboard through a USB interface, and the data reading motherboard is connected to an EEPROM chip through a chip connection tool, that is, data reading software on the computer is used to read data in the EEPROM chip on the chip motherboard, and perform verification and save the read data of the EEPROM chip. Referring to fig. 2, a structural connection diagram of the device of the present invention is shown.
The usb (universal Serial bus) interface on a computer is a Serial port. It has 4 threads: 1 power line, 1 ground line, two Data lines D + (Data +) and D- (Data-). The USB signal is a differential signal, and one signal is transmitted by a pair of data lines, and D + and D-are the pair of differential signals responsible for transmitting data signals, i.e., data. When the differential signal needs to transmit high level, one line (for example, D +) sends high level, while the other paired line transmits low level, when the differential signal needs to send low level, D + sends low, D-sends high, so that the phases of the signals sent on the two lines are reversed, thereby improving the capacity of resisting disturbance and improving the data transmission rate. As shown in fig. 3, in this embodiment, a device (e.g., a computer or other USB host) having a USB interface performs data communication with the data reading motherboard through the USB interface, i.e., data transmission is performed between the USB device and the data reading motherboard through two data lines, i.e., D + and D-lines.
The data reading main board comprises a main chip MCU, and in the embodiment, the main chip MCU is a CH341 series chip. CH341 is a switching chip of a USB bus, and provides an asynchronous serial port, a print port, a parallel port, and commonly used synchronous serial interfaces such as 2-wire (SCL wire, SDA wire) and 4-wire (sd wire) through the USB bus.
The common part of the standard pins of the CH341 series chip and its description are as follows:
pin 28 is the VCC supply pin: the positive power supply input end needs to be externally connected with a 0.1uF power supply decoupling capacitor;
pin No. 12 is the GND supply pin: the common grounding end is directly connected to the ground wire of the USB bus;
pin No. 9 is the V3 power pin: connecting a VCC to input an external power supply when the power supply voltage is 3.3V;
pin No. 13 is the XI input pin: the input end of the crystal oscillation needs an external crystal and an oscillation capacitor;
pin 14 is the XO output pin: the inverted output end of the crystal oscillation needs an external crystal and an oscillation capacitor;
pin number 10 is the UD + bi-directional tri-state pin: the D + data line is directly connected to the USB bus, and a pull-up resistor is arranged in the D + data line;
pin number 11 is the UD-bi-directional tri-state pin: a D-data line directly connected to the USB bus;
pin No. 1 is the ACT # output pin: the USB equipment completes configuration and state output, and the low level is effective;
pin No. 2 is the RSTI input pin: an external reset input is adopted, the high level is effective, and a pull-down resistor is arranged in the external reset input;
pin 24 is the SCL open drain output: the chip function configuration output is internally provided with a pull-up resistor and can be connected with an SCL pin of a serial EEPROM configuration chip; and
pin # 23 SDA open drain output and input: the chip function configuration input is internally provided with a pull-up resistor and can be connected with an SDA pin of a serial EEPROM configuration chip.
As shown in fig. 3, in the embodiment of the present invention, the CH341 switch chip communicates with the EEPROM chip through the SCL line and the SDA line to perform data transmission.
FIG. 4 is an embodiment of the present invention of an apparatus for reading EEPROM chip data online, showing the interfaces and pin connections between the devices. A computer or other USB host is connected to the main chip CH341T on the data reading main board through a USB interface so that the computer or other USB host can communicate with the CH 341T. The connection between the two is as follows:
VCC of the USB interface is connected with VCC of CH 341T;
the GND of the USB interface is connected with the GND of the CH 341T;
d-of the USB interface and UD-of CH 341T; and
d + of the USB interface is connected to UD + of CH 341T.
CH341T on the data read motherboard communicates with an EEPROM chip, e.g., 24C16 (shown in FIG. 4) via I2And C, bus connection. The connection between the two is as follows:
SCL of CH341T is connected with SCL of 24C 16; and
the SDA of CH341T was linked to the SDA of 24C 16.
Fig. 5 is a schematic circuit diagram of a data reading motherboard according to an embodiment of the present invention. C13 and C14 are monolithic or high frequency ceramic chip capacitors with C13 having a capacity of 4700pF to 0.02g F for CH341 internal supply node decoupling and C14 having a capacity of 0.1 muf for external supply decoupling. The crystal X3, the capacitor C11, and the capacitor C12 are used for a clock oscillation circuit. The frequency of X3 is 12MHz, and C11 and C12 are monolithic or high frequency ceramic chip capacitors with a capacity of 15pF and 30 pF.
If the USB product uses the power supply of the USB bus and a large capacitor C15 is connected in parallel between VCC and GND, so that the power supply power-up process is slow and the power supply cannot discharge in time after power-off, CH341 cannot be reliably reset. It is proposed to extend the reset time across a capacitor C26 with a capacitance of 0.1 muf or 0.47 muf between the RSTI pin and VCC.
When designing a printed wiring board PCB, care needs to be taken: decoupling capacitors C13 and C14 are as close as possible to the connected pins of CH 341; the D + and D-signal wires are close to the parallel wiring, and ground wires or copper clad wires are provided at two sides as much as possible, so that signal interference from the outside is reduced; the lengths of the signal lines related to the Xl pin and the XO pin are shortened as much as possible, and in order to reduce high-frequency interference, the periphery of a related component can be surrounded by a ground wire or copper.
The led L1 and the current limiting resistor R1 are optional devices and are typically omitted. The external serial EEPROM configuration chip U3 is an optional device. In this embodiment, U3 is 24C01A, but it is also possible to connect other 24 series chips of EEPROM chips. When device U3 is omitted, chip functions may be selected by a combination of SCL and SDA pin connections, that is, by a combination of SCL and SDA pin connections, i.e., by I2The C interface can be connected with other types of support I2C, chip.
In the embodiment of the present invention, the data reading motherboard further includes card slots, wherein the number of the card slots is the same as the number of the pins of the EEPROM chip, and the sequence of the card slots corresponds to the sequence of the pins of the EEPROM chip. As shown in fig. 6, in this embodiment, the number and the sequence of the card slots are the same as the number and the sequence of the pins of the EEPROM chips with models 24C32, 26C16, 24C08 and 24C 02. The 8 card slots on the data reading mainboard are respectively: an A0 card slot, an A1 card slot, an A2 card slot, a GND card slot, a VCC card slot, a WP card slot, an SCL card slot and an SDA card slot.
In an embodiment, the chip connection tool comprises a pin arranging fixing plate, a thimble fixing plate and a connection flat cable. The pin header fixing plate comprises pin headers and pins corresponding to the pin headers, and the sequence of the pin headers and the sequence of the pins corresponding to the pin headers are the same as the sequence of the pins of the EEPROM chip. The thimble fixing plate comprises thimbles and pins corresponding to the thimbles, and the sequence of the thimbles and the sequence of the pins corresponding to the thimbles are the same as the sequence of the pins of the EEPROM chip. And the connecting flat cable is configured to connect the pins corresponding to the flat pins and the pins corresponding to the ejector pins. The thimble on the thimble fixing plate adopts a nine-claw plum blossom spring test thimble. Fig. 7 is a schematic diagram of pin connection in the internal structure of the chip connection tool of the present invention. The design of the chip connection tool in the embodiment is suitable for EEPROM chips with models of 24C32, 26C16, 24C08 and 24C 02.
The pin that row needle and thimble correspond includes respectively: pins A0, A1, A2, GND, VCC, WP, SCL and SDA, wherein 4 pins (A0, A1, A2 and GND) corresponding to the pins and 4 pins (A0, A1, A2 and GND) corresponding to the thimble are connected to the first row; VCC pins corresponding to the row pins are connected with VCC pins corresponding to the ejector pins through a second row wire; the WP pin corresponding to the pin header is connected with the WP pin corresponding to the thimble through a third flat cable; the SCL pin corresponding to the ejector pin is connected with the SCL pin corresponding to the ejector pin through a fourth flat cable; and the SDA pin corresponding to the pin header is connected with the SDA pin corresponding to the thimble through a fifth flat cable. Because the device is only used for reading, verifying and storing the data in the EEPROM chip, and the data does not need to be written into the EEPROM chip, the WP pin does not need to be pulled down in an external connecting wire mode, and the state of the WP pin of the original EEPROM chip can be maintained.
The pin header of the pin header fixing plate is coupled with a corresponding slot on the data reading main board. And the thimble of the thimble fixing plate is coupled with the corresponding pin of the EEPROM chip.
Through the chip connecting tool, the data reading main board and the EEPROM chip on the chip main board are connected, so that the data reading main board and the EEPROM chip can communicate with each other.
When the data of the EEPROM chip is read on line, the pin header fixing plate end of the EEPROM chip connecting tool is firstly installed in the clamping groove of the data reading main plate according to the corresponding sequence for clamping, then the data reading main plate is inserted into the USB port of the computer through the USB port and data reading software on the computer is opened, then the thimble on the thimble fixing plate of the EEPROM chip connecting tool is forcibly pressed and pressed on the EEPRON chip on the main plate according to the mode that the pins correspond to the corresponding same pins, at the moment, the data reading and verifying and storing software is operated to read and store the data of the EEPROM chip and verify and store the read data, and the data burning, verifying and storing work of the whole EEPROM chip can be completed. After the data of the EEPROM chip is read on line, the acquired data is verified and stored by corresponding software on a computer or other USB hosts.
The above-described embodiments are indicative of but a few of the various ways in which the principles of the invention may be employed. The models of the EEPROM chips suitable for the above embodiments include 24C32, 26C16, 24C08 and 24C 02. It is to be understood that the combination of the SCL and SDA pin connections, i.e., through I, is in the same or equivalent manner as the principles of the present invention2The C interface can be connected with other types of support I2C, chip.
It is to be understood that these descriptions of aspects are merely illustrative and should not be construed in a limiting sense. In the foregoing description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without these specific details. Further, the scope of the invention is not intended to be limited to the embodiments or examples with reference to the drawings; but is only limited by the scope of the appended claims and their equivalents.
It should also be noted that the figures are provided to illustrate certain aspects of embodiments of the invention and, therefore, are to be considered merely illustrative. Clearly, the components shown in the figures are not necessarily to scale relative to each other and the placement of the various components in the figures has been selected for clarity of understanding the individual embodiments and are not to be considered as representative of the actual relative positions of the various components in the implementations consistent with embodiments of the invention. Also, unless explicitly mentioned otherwise; otherwise, various embodiments and features of embodiments herein may be combined with each other.
It will also be appreciated that in the foregoing description, any direct connection or coupling between functional blocks, devices, components, circuit elements, or other entities or functional units shown in the drawings or described herein may also be implemented through indirect connections or couplings. Furthermore, it should be understood that the functional blocks or units shown in the figures may be implemented as separate features or circuits in one embodiment, or may be implemented in whole or in part in a common feature or circuit in another embodiment, or alternatively.
In another aspect of the present invention, a computer-readable storage medium is provided that stores executable instructions, software programs, and modules, which when executed by a processor, cause the performance of a method of reading EEPROM chip data online. The readable storage medium may include a high-speed random access memory, and may further include a non-volatile memory, such as at least one magnetic disk storage device, a flash memory device, or other non-volatile solid state storage device, and may be applied to various terminals, which may be computers, servers, and the like.
The storage medium also includes, but is not limited to, any type of disk including floppy disks, hard disks, optical disks, CD-ROMs, and magnetic-optical disks, ROMs (read-only memories), RAMs (random access memories), EPROMs (erasable programmable read-only memories), EEPROMs (electrically erasable programmable read-only memories), flash memory, magnetic cards, or optical cards. That is, a storage medium includes any medium that stores or transmits information in a form readable by a device (e.g., a computer). The storage medium may also be a read-only memory, a magnetic or optical disk, or the like.
The embodiment of the present invention further provides a computer program product, which when running on a computer, causes the computer to execute the above related steps to implement the method for online reading data of the EEPROM chip in the above embodiment.
In addition, an embodiment of the present invention further provides an apparatus, which may specifically be a chip, a component, or a module, and the apparatus may include a processor and a memory connected to each other; when the device runs, the processor can execute the computer execution instructions stored in the memory, so that the chip can execute the method for reading the data of the EEPROM chip online in the above method embodiments.
The apparatus, the computer storage medium, the computer program product, or the chip provided by the present invention are all configured to execute the corresponding methods provided above, and therefore, the beneficial effects achieved by the apparatus, the computer storage medium, the computer program product, or the chip may refer to the beneficial effects in the corresponding methods provided above, and are not described herein again.
Although the present invention has been described with reference to the preferred embodiments, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (11)
1. An apparatus for reading data of an EEPROM chip online, the apparatus comprising:
a data reading main board configured to read I2C, converting the data into USB data; and
and the chip connecting tool is connected with the data reading main board and the EEPROM chip.
2. The apparatus of claim 1, wherein the data reading motherboard further comprises card slots, wherein the number of card slots is the same as the number of pins of the EEPROM chip, and wherein a card slot order corresponds to a pin order of the EEPROM chip.
3. The apparatus of claim 1 or 2, wherein the data reading motherboard comprises: a main chip MCU, which is CH 341T.
4. The apparatus of any preceding claim, wherein the chip connection tooling comprises:
the pin header fixing plate comprises pin headers and pins corresponding to the pin headers, and the sequence of the pin headers and the sequence of the pins corresponding to the pin headers are the same as the sequence of the pins of the EEPROM chip;
the thimble fixing plate comprises thimbles and pins corresponding to the thimbles, and the sequence of the thimbles and the sequence of the pins corresponding to the thimbles are the same as the sequence of the pins of the EEPROM chip; and
and the connecting flat cable is configured to connect the pins corresponding to the flat pins and the pins corresponding to the ejector pins.
5. The apparatus of claim 4, wherein the pin header of the pin header fixing plate is coupled to the card slot on the data reading motherboard.
6. The device of claim 4, wherein the pins of the pin fixing plate are coupled with pins of the EEPROM chip.
7. The apparatus of any preceding claim, wherein the model number of the EEPROM chip comprises 24C32, 26C16, 24C08 and 24C 02.
8. The apparatus according to any one of claims 4-7,
the pin bank with the pin that the thimble corresponds includes respectively: a pin A0, a pin A1, a pin A2, a pin GND, a pin VCC, a pin WP, a pin SCL and a pin SDA, wherein,
the 4 pins (A0 pin, A1 pin, A2 pin and GND pin) corresponding to the pin header and the 4 pins (A0 pin, A1 pin, A2 pin and GND pin) corresponding to the thimble are connected to a first wire;
the VCC pins corresponding to the row pins are connected with the VCC pins corresponding to the ejector pins through a second row wire;
the WP pin corresponding to the pin header is connected with the WP pin corresponding to the thimble through a third flat cable;
the SCL pin corresponding to the ejector pin is connected with the SCL pin corresponding to the ejector pin through a fourth flat cable; and
the SDA pins corresponding to the row needles are connected with the SDA pins corresponding to the ejector pins through a fifth row wire.
9. A method for reading EEPROM chip data online, which is characterized in that the method comprises:
connecting a computer and an EEPROM chip by means of the apparatus of claims 1-8;
reading, by the computer via the device, data on the EEPROM chip.
10. An apparatus for reading data of an EEPROM chip online, the apparatus comprising:
a processor;
a storage device for storing executable instructions,
the executable instructions, when executed by the processor, may implement the method of claim 9.
11. A computer-readable storage medium, characterized in that it stores executable instructions which, when executed by a processor, cause the execution of the method of reading EEPROM chip data recited in claim 9.
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| CN202110251577.XA CN113127393A (en) | 2021-03-08 | 2021-03-08 | Method, device and equipment for online reading EEPROM chip data and storage medium |
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| CN202110251577.XA CN113127393A (en) | 2021-03-08 | 2021-03-08 | Method, device and equipment for online reading EEPROM chip data and storage medium |
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