CN113126357B - Display panel, display device and manufacturing method thereof - Google Patents

Display panel, display device and manufacturing method thereof Download PDF

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Publication number
CN113126357B
CN113126357B CN202110423972.1A CN202110423972A CN113126357B CN 113126357 B CN113126357 B CN 113126357B CN 202110423972 A CN202110423972 A CN 202110423972A CN 113126357 B CN113126357 B CN 113126357B
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layer
electrode
display panel
electrodes
data line
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CN113126357A (en
Inventor
方正
韩佳慧
刘玉杰
杨松
石戈
梁蓬霞
孙艳六
吴谦
李鸿鹏
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line

Abstract

The application discloses display panel, display device and manufacturing method thereof, wherein, the display panel includes: the array substrate, the liquid crystal layer and the color film substrate are sequentially stacked; the array substrate comprises a first data line layer, wherein the first data line layer comprises a plurality of data lines which are arranged side by side; one side of the color film substrate, which is close to the liquid crystal layer, is provided with a first electrode layer, the first electrode layer comprises a plurality of first electrodes arranged side by side, and the first electrodes are arranged in one-to-one correspondence with the data lines. According to the scheme, the plurality of first electrodes arranged side by side are arranged in the color film substrate, and the first electrodes are arranged in one-to-one correspondence with the data lines of the array substrate, so that the horizontal electric field component in the opening area of the display panel can be increased, and the liquid crystal can be fully rotated to improve the transmittance; meanwhile, the shielding effect on the electric field between adjacent pixels can be achieved, and crosstalk between the pixels is reduced.

Description

Display panel, display device and manufacturing method thereof
Technical Field
The invention relates to the technical field of display, in particular to a display panel, a display device and a manufacturing method of the display panel.
Background
The Liquid Crystal Display technology is currently the mainstream Display technology, wherein a Thin Film Transistor Liquid Crystal Display (TFT-LCD) product has the characteristics of small volume, low power consumption, no radiation, high Display resolution and the like, and is widely applied to various terminal products.
At present, the resolution of the TFT-LCD gradually increases, and as the resolution increases, the pixels become smaller, and accordingly, the aperture ratio decreases, which results in the decrease of transmittance. In this case, the luminance of the display screen becomes dark if the luminance of the backlight is not changed, and the luminance of the backlight needs to be increased in order to increase the luminance of the display screen, which leads to an increase in power consumption. The brightness of a display screen can be improved by increasing the transmittance without increasing the power consumption, and therefore, how to improve the transmittance is a technical problem to be solved by those skilled in the art.
Disclosure of Invention
It is desirable to provide a display panel, a display device, and a method of manufacturing the same, which can improve transmittance.
In a first aspect, the present invention provides a display panel comprising: the array substrate, the liquid crystal layer and the color film substrate are sequentially stacked;
the array substrate comprises a first data line layer, wherein the first data line layer comprises a plurality of data lines which are arranged side by side;
and a first electrode layer is arranged on one side of the color film substrate close to the liquid crystal layer, and comprises a plurality of first electrodes arranged side by side, and the first electrodes are arranged in one-to-one correspondence with the data lines.
As an implementation manner, the array substrate further includes:
a first insulating layer including a plurality of insulating strips arranged side by side;
and the pixel electrode layer comprises a plurality of pixel electrodes, and each pixel electrode is formed on the corresponding insulating strip.
As an implementation manner, in the orthographic projection of the display panel, along a direction perpendicular to the extending direction of the data line, the width of the insulation strip is smaller than that of the pixel electrode, and the width of the pixel electrode is smaller than that of the opening area of the display panel.
As an implementation manner, a second insulating layer is formed on the pixel electrode layer, a second electrode layer is formed on the second insulating layer, and the second electrode layer includes a plurality of second electrodes; in the orthographic projection of the display panel, the width of the first electrode is smaller than that of the second electrode along the direction perpendicular to the extending direction of the data line.
As an implementation, the width of the first electrode is 0.5um-1.8um.
As an implementation manner, the first electrode and the second electrode are both common electrodes.
As an implementation manner, the data line, the first electrode, and the second electrode that are correspondingly disposed are overlapped at the center in the orthographic projection.
In a second aspect, the present invention provides a display device, including the display panel.
In a third aspect, the present invention provides a method for manufacturing a display panel, including:
providing an array substrate and a color film substrate, wherein the array substrate comprises a first data line layer, the first data line layer comprises a plurality of data lines arranged side by side, the color film substrate comprises a first electrode layer, and the first electrode layer comprises a plurality of first electrodes arranged side by side;
and packaging the array substrate and the color film substrate into a box, forming a liquid crystal layer between the array substrate and the color film substrate, positioning the first electrode layer on one side of the color film substrate close to the liquid crystal layer, and arranging the first electrodes and the data lines in a one-to-one correspondence manner.
As an implementation manner, the array substrate further includes:
a first insulating layer including a plurality of insulating strips arranged side by side;
and the pixel electrode layer comprises a plurality of pixel electrodes, and each pixel electrode is formed on the corresponding insulating strip.
According to the scheme, the plurality of first electrodes arranged side by side are arranged in the color film substrate, and the first electrodes are arranged in one-to-one correspondence with the data lines of the array substrate, so that the horizontal electric field component in the opening area of the display panel can be increased, and the liquid crystal can be fully rotated to improve the transmittance; meanwhile, the shielding effect on the electric field between adjacent pixels can be achieved, and the crosstalk between pixels is reduced.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading of the detailed description of non-limiting embodiments made with reference to the following drawings:
fig. 1 is a cross-sectional view of a display panel perpendicular to a length extending direction of a data line according to an embodiment of the present invention;
fig. 2 is a cross-sectional view of a display panel perpendicular to a length extending direction of a data line according to another embodiment of the present invention;
FIG. 3 is a graph showing the relationship between transmittance and voltage for different widths of insulating strips;
FIG. 4 is a graph showing the relationship between transmittance and contrast for different pixel electrode widths;
FIG. 5 is a graph showing the relationship between the transmittance and the contrast ratio of the insulating strips under the same pixel electrode width;
FIG. 6 is a graph showing the relationship between the width of the first electrode, the transmittance and the contrast ratio under the condition that the width of the second electrode and the width of the opening thereof are constant;
FIG. 7 is a graph showing the relationship between the width of the first electrode and the voltage when the width of the second electrode and the opening width thereof are constant;
fig. 8 is a cross-talk relationship diagram for different first electrode widths.
Detailed Description
The present application will be described in further detail with reference to the following drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant invention and not restrictive of the invention. It should be noted that, for convenience of description, only the portions related to the present invention are shown in the drawings.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
Fig. 1 is a display panel according to an embodiment of the present invention, including: the liquid crystal display panel comprises an array substrate 1, a liquid crystal layer 2 and a color film substrate 3 which are sequentially stacked;
the array substrate 1 includes a first data line layer including a plurality of data lines 111 arranged side by side, only one data line 111 is shown in fig. 1, and the plurality of data lines 111 are arranged side by side in a left-right direction in a viewing angle of fig. 1;
specifically, as an example, the array substrate 1 may adopt, for example and without limitation, the following structure and molding process:
the "patterning process" described in the embodiments of the present invention includes processes of depositing a film, coating a photoresist, mask exposure, development, etching, and stripping a photoresist, and is a well-established manufacturing process in the related art. The "photolithography process" referred to in this embodiment includes coating film coating, mask exposure, and development, and is a well-established production process in the related art. The deposition may be performed by known processes such as sputtering, evaporation, chemical vapor deposition, etc., the coating may be performed by known coating processes, the etching may be performed by known methods, and the growth epitaxy may be performed by known methods, which are not particularly limited herein.
In the description of the embodiments of the present invention, it should be understood that "thin film" refers to a layer of thin film made of a material by a deposition, coating or growth process on a layer (e.g., a substrate). The "thin film" may also be referred to as a "layer" if it does not require a patterning process or a photolithography process throughout the fabrication process. If a patterning process or a photolithography process is required for the "thin film" in the entire manufacturing process, the "thin film" is referred to as a "thin film" before the patterning process, and the "layer" after the patterning process. The "layer" after the patterning process or the photolithography process includes at least one "pattern". For example, and without limitation, the thickness of the films referred to herein may be below 100 μm.
A Buffer layer 102 (Buffer) is deposited on the substrate 101 by PECVD (Plasma Enhanced Chemical Vapor Deposition), and the material of the Buffer layer 102 may be a single layer film of silicon oxide (SiOx) or a composite layer of silicon nitride (SiNx) and silicon oxide (SiOx). The substrate 101 is, for example, but not limited to, a glass or LTPS (Low Temperature polysilicon) substrate. For example, but not limited to, the buffer layer 102 is a SiNx/SiOx composite film.
An amorphous silicon (a-Si) thin film is deposited on the buffer layer 102, and the amorphous silicon (a-Si) thin film is annealed to form a polycrystalline silicon (P-Si) thin film. The polysilicon thin film is patterned through a patterning process to form the active layer 103.
A gate insulating film is deposited on the active layer 103 by PECVD, and the gate insulating film serves as a first gate insulating layer 104, and the material of the first gate insulating layer 104 may be a single-layer film of SiNx or a composite film of SiNx and SiOx. For example, but not limited to, the first gate insulating layer 104 is a SiOx/SiNx composite film.
A first gate metal film is deposited on the first gate insulating layer 104, for example, by magnetron sputtering, and the first gate metal film is patterned by a patterning process to form a first gate layer 105. The material forming the first gate layer 105 may be a metal such as molybdenum (Mo), aluminum (Al), or copper (Cu), or a composite film or an alloy film of these metals. For example, but not limited to, the material of the first gate layer 105 may be molybdenum (Mo).
A gate insulating film is deposited on the first gate electrode layer 105 by PECVD, and the gate insulating film serves as an interlayer Insulating Layer (ILD) 106, and the material of the ILD 106 may be a single layer film of SiNx or a composite film of SiNx and SiOx. For example, but not limited to, the interlayer insulating layer 106 is a SiOx/SiNx composite film.
A via hole extending to the active layer 103 is formed on the interlayer insulating layer 106, and then a second data line metal film is deposited on the interlayer insulating layer 106, for example, a second data line metal film is deposited by magnetron sputtering, and the second data line metal film is patterned by a patterning process to form a second data line layer (SD 1) 107, wherein the second data line layer 107 is electrically connected to the source and drain electrodes of the active layer 103 through the metal deposited in the via hole. The material forming the second data line layer 107 may be a single or composite layer structure of molybdenum (Mo), aluminum (Al), copper (Cu), silver (Ag), gold (Au), titanium (Ti), or the like. For example, but not limiting of, the second data line layer 107 employs a composite layer structure including a Ti/Al/Ti tri-layer structure disposed in a stack.
A gate insulating film is deposited on the second data line layer 107 by PECVD, the gate insulating film serves as the second gate insulating layer 108, and the material of the second gate insulating layer 108 may be a single layer film of SiNx or a composite film of SiNx and SiOx. For example, but not limited to, the second gate insulating layer 108 is a SiOx/SiNx composite film.
A via hole extending to the second data line layer 107 is formed on the second gate insulating layer 108, and then a transparent electrode (e.g., indium tin oxide ITO) thin film is deposited on the second gate insulating layer 108, and the deposited transparent electrode thin film is patterned through a patterning process to form a transparent electrode layer 109, and the transparent electrode layer 109 is electrically connected to the second data line layer 107 through the transparent electrode material deposited in the via hole.
A passivation layer (PVX) film is deposited on the transparent electrode layer using PECVD, and the passivation layer film serves as a first passivation layer 110.
A via hole extending to the second data line layer 107 is formed on the first passivation layer 110, and then a first data line metal film is deposited on the first passivation layer 110, for example, by magnetron sputtering, and patterned by a patterning process to form a first data line layer (SD 2) electrically connected to the second data line layer 107 through the metal deposited in the via hole. The material forming the first data line layer may be a single or composite layer structure of molybdenum (Mo), aluminum (Al), copper (Cu), silver (Ag), gold (Au), titanium (Ti), or the like. For example, but not limiting of, the first data line layer employs a composite layer structure including a Ti/Al/Ti three-layer structure disposed in a stack. The first data line layer includes a plurality of data lines 111 arranged side by side.
A planarization layer 112, a pixel electrode layer 113, a second passivation layer 114, a first common electrode layer 115, a third passivation layer 116, and the like may be further sequentially formed on the first data line layer.
A first electrode layer is arranged on one side of the color film substrate 3 close to the liquid crystal layer 2, the first electrode layer includes a plurality of first electrodes 301 arranged side by side, and the first electrodes 301 are arranged in one-to-one correspondence with the data lines 111.
Specifically, as an example, the color filter substrate 3 may adopt, for example but not limited to, the following structure and forming process:
a first electrode line metal film is deposited on a substrate (not shown in the figure) in a magnetron sputtering manner, and is patterned through a patterning process to form a first electrode layer including a plurality of first electrodes 301 arranged side by side, wherein the first electrodes 301 are arranged in one-to-one correspondence with the data lines 111. The substrate 101 is, for example, but not limited to, polyimide (PI).
A planarization layer 302 is formed on the first electrode layer.
A pixel defining layer film is formed on the planarization layer 302 by a process such as spin coating, and patterned to form a Pixel Defining Layer (PDL) 303 having an opening defining a pixel. The material of the pixel defining layer film may be, for example, resin. The resin material may include, but is not limited to, a polysiloxane-based material, an acryl-based material, a polyimide-based material, or the like. A color resist 304 is formed within the opening.
An encapsulation layer 305 is formed on the pixel defining layer 303. The encapsulation layer 305 may have a single-layer structure or a composite-layer structure.
In the scheme, a plurality of first electrodes 301 arranged side by side are arranged in the color film substrate 3, and the first electrodes 301 are arranged in one-to-one correspondence with the data lines 111 of the array substrate 1, so that horizontal electric field components in an opening area of the display panel can be increased, and liquid crystals can be fully rotated to improve transmittance; meanwhile, the shielding effect on the electric field between adjacent pixels can be achieved, and crosstalk between the pixels is reduced.
As an implementation manner, as shown in fig. 2, the array substrate 1 further includes:
a first insulating layer comprising a plurality of insulating strips 117 arranged side by side;
and a pixel electrode layer including a plurality of pixel electrodes, each of the pixel electrodes being formed on the corresponding insulating strip 117.
Specifically, based on the above example, an insulating film is deposited on the planarization layer by PECVD, and the insulating film is patterned by a patterning process to form a first insulating layer including a plurality of insulating stripes 117 arranged side by side, and the material of the first insulating layer may be a single layer film of SiNx or a composite film of SiNx and SiOx.
A transparent electrode (e.g., ITO) film is deposited on the first insulating layer, and the deposited transparent electrode film is patterned through a patterning process to form a pixel electrode layer, wherein the pixel electrode layer 113 includes a plurality of pixel electrodes, and each pixel electrode is formed on a corresponding insulating strip 117.
By forming the pixel electrode on the insulating strip 117, the pixel electrode is lifted up, and the height difference H between the pixel electrode and the first common electrode layer 115 is reduced, so that the distribution of the vertical electric field is reduced, the transmittance is improved, and the light efficiency is improved.
As an implementation manner, in the front projection of the display panel, along the direction perpendicular to the extending direction of the data line 111, the width W1 of the insulating strip 117 is smaller than the width W2 of the pixel electrode, and the width W2 of the pixel electrode is smaller than the width W3 of the display panel opening area.
The following description will take 1500PPI as an example of a display panel with a sub-pixel size (opening) of 5.8um, and the effects of the width W1 of the insulating strip 117, the width W2 of the pixel electrode, and the width W3 of the opening area of the display panel on the transmittance and contrast will be described.
As shown in fig. 3, the width W2 of the pixel electrode is 3.1um, and the widths of the insulating stripes 117, 1um insulating stripe 117, 1.6um insulating stripe 117, and 2.2um insulating stripe 117 are 3.1-0, 3.1-1, 3.1-1.6, and 3.1-2.2, respectively, where the transmittance (Tr) increases by 5.3% and the voltage (Vop) decreases by 0.2V at 3.1-1.1, the transmittance (Tr) increases by 4.7% and the voltage (Vop) decreases by 0.2V at 3.1-2.6, and the transmittance (Tr) increases by 2.5% and the voltage (Vop) decreases by 0.4V at 3.1-2.2, respectively, and thus it can be seen that the smaller the width of the insulating stripe 117 is provided under the pixel electrode, and the transmittance increase ratio is larger.
As shown in fig. 4, when the width of the insulating strip 117 is constant, the influence of the width of the pixel electrode on the transmittance and the Contrast Ratio (CR) is represented by 1.5-1, 2.3-1, and 3.1-1 in this order when the width of the pixel electrode is 1.5um, 2.3um, and 3.1um in this order, and compared with the case where the width of the pixel electrode is 3.1 and the insulating strip 117 is not provided, the transmittance (Tr) is increased by 9.1% and the contrast ratio is increased by 41.9 in 1.5-1, the transmittance (Tr) is increased by 7.5% and the contrast ratio is increased by 103.8 in 2.3-1, and the transmittance (Tr) is increased by 5.3% and the contrast ratio is increased by 52.6 in 3.1-1.
As shown in FIG. 5, the transmittance (Tr) increased by 9.1% at 1.5-1 and the contrast increased by 41.9, while the transmittance (Tr) increased by 4.1% at 1.5-0 and the contrast increased by 45.6.
As described above, when the insulating stripes 117 are provided, the widths of the insulating stripes 117 and the pixel electrodes are within a certain range, and the smaller the widths, the better the smaller the widths. For example, but not limited to, the width of the insulating strip 117 is 1um, the thickness of the insulating strip 117 is 800 angstroms, and the width of the pixel electrode is 1.5um.
In an implementation manner, a second insulating layer is formed over the pixel electrode layer, and the second insulating layer serves as the second passivation layer 114, a second electrode layer is formed over the second insulating layer, and the second electrode layer serves as the first common electrode layer 115, and the second electrode layer includes a plurality of second electrodes; in the front projection of the display panel, the width W4 of the first electrode 301 is smaller than the width W5 of the second electrode along the direction perpendicular to the extending direction of the data line 111.
As shown in fig. 6 and 7, taking the width of the second electrode as 3.6um and the opening width of the second electrode as 2.2um as examples, the transmittance and voltage when the first electrode 301 is not provided, the width of the first electrode 301 is 1um, the width of the first electrode 301 is 1.2um, the width of the first electrode 301 is 1.4um, the width of the first electrode 301 is 1.6um, and the width of the first electrode 301 is 1.8um are sequentially denoted as 3.6-2.2-0, 3.6-2.2-1, 3.6-2.2-1.2, 3.6-2.2-1.4, 3.6-2.2-1.6, and 3.6-2.2-1.8. With the introduction of the first electrode 301, the transmittance is increased by 2.3% -7.6%, the driving voltage is increased by 0.2-0.4V, and the smaller the width of the first electrode 301 is, the larger the transmittance increase ratio is.
As shown in fig. 8, a schematic structure of three sub-pixels is shown, that is, three pixel electrodes 118 are provided, the middle pixel electrode 118 drives the middle sub-pixel to light, while the sub-pixels on both sides do not light, and when the width of the second electrode 119 is constant, for example, 3.6um, and the width of the first electrode 301 is 1um, 1.2um, 1.4um, 1.6um, and 1.8um, the crosstalk between the adjacent sub-pixels is reduced in order, so that the width of the first electrode 301 can be selected as necessary while achieving both the transmittance and the crosstalk. For example, the width of the first electrode 301 is selected to be 1um.
As an implementation, the width of the first electrode 301 is 0.5um to 1.8um.
As an implementation manner, the first electrode 301 and the second electrode are both common electrodes.
As an implementation manner, the data line 111, the first electrode 301, and the second electrode that are correspondingly disposed coincide at the center in the orthographic projection.
In a second aspect, the present invention provides a display device, including the display panel.
The display device is, for example, but not limited to, a smart phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, etc.
In a third aspect, the present invention provides a method for manufacturing a display panel, including:
providing an array substrate 1 and a color film substrate 3, wherein the array substrate 1 comprises a first data line layer, the first data line layer comprises a plurality of data lines 111 arranged side by side, the color film substrate 3 comprises a first electrode layer, and the first electrode layer comprises a plurality of first electrodes 301 arranged side by side;
the array substrate 1 and the color film substrate 3 are packaged into a box, a liquid crystal layer 2 is formed between the array substrate 1 and the color film substrate 3, the first electrode layer is located on one side, close to the liquid crystal layer 2, of the color film substrate 3, and the first electrodes 301 are arranged in one-to-one correspondence with the data lines 111.
The liquid crystal layer 2 may be poured after the array substrate 1 and the color filter substrate 3 are packaged into a box, or may be poured to one side of the array substrate 1 and/or the color filter substrate 3 first, and then the box is formed.
The manufacturing method is used for preparing the display panel, and specific reference is made to the embodiment of the display panel, which is not described herein again.
As an implementation manner, the array substrate 1 further includes:
a first insulating layer comprising a plurality of insulating strips 117 arranged side by side;
and a pixel electrode layer including a plurality of pixel electrodes, each of the pixel electrodes being formed on the corresponding insulating strip 117.
It will be understood that any reference above to the orientation or positional relationship of the terms "central," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," etc., is based on the orientation or positional relationship shown in the drawings, which is done for convenience in describing the invention and to simplify the description, and is not intended to indicate or imply that the device or element so referred to must have a particular orientation, be constructed and operated in a particular orientation, and is not to be construed as limiting the invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified.
The foregoing description is only exemplary of the preferred embodiments of the application and is illustrative of the principles of the technology employed. It will be appreciated by those skilled in the art that the scope of the invention herein disclosed is not limited to the particular combination of features described above, but also encompasses other arrangements formed by any combination of the above features or their equivalents without departing from the inventive concept. For example, the above features may be replaced with (but not limited to) features having similar functions disclosed in the present application.

Claims (7)

1. A display panel, comprising: the array substrate, the liquid crystal layer and the color film substrate are sequentially stacked;
the array substrate comprises a first data line layer, wherein the first data line layer comprises a plurality of data lines which are arranged side by side;
a first electrode layer is arranged on one side, close to the liquid crystal layer, of the color film substrate, and comprises a plurality of first electrodes arranged side by side, and the first electrodes are arranged in one-to-one correspondence with the data lines;
the array substrate further includes:
the first insulating layer comprises a plurality of insulating strips arranged side by side;
the pixel electrode layer comprises a plurality of pixel electrodes, and each pixel electrode is formed on the corresponding insulating strip;
a second insulating layer is formed on the pixel electrode layer, a second electrode layer is formed on the second insulating layer, and the second electrode layer comprises a plurality of second electrodes; in the orthographic projection of the display panel, along the direction perpendicular to the extending direction of the data line, the width of the first electrode is smaller than that of the second electrode;
the first electrode and the second electrode are both common electrodes.
2. The display panel according to claim 1, wherein in an orthogonal projection of the display panel, in a direction perpendicular to an extending direction of the data line, a width of the insulating strip is smaller than a width of the pixel electrode, and the width of the pixel electrode is smaller than a width of an opening area of the display panel.
3. The display panel according to claim 1, wherein the first electrode has a width of 0.5um to 1.8um.
4. The display panel according to claim 1, wherein the data line, the first electrode, and the second electrode are disposed in a manner such that centers thereof coincide in the orthographic projection.
5. A display device characterized by comprising the display panel according to any one of claims 1 to 4.
6. A method of manufacturing a display panel, comprising:
providing an array substrate and a color film substrate, wherein the array substrate comprises a first data line layer, the first data line layer comprises a plurality of data lines arranged side by side, the color film substrate comprises a first electrode layer, and the first electrode layer comprises a plurality of first electrodes arranged side by side;
and packaging the array substrate and the color film substrate into a box, forming a liquid crystal layer between the array substrate and the color film substrate, positioning the first electrode layer on one side of the color film substrate close to the liquid crystal layer, and arranging the first electrodes and the data lines in a one-to-one correspondence manner.
7. The method of manufacturing a display panel according to claim 6, wherein the array substrate further comprises:
the first insulating layer comprises a plurality of insulating strips arranged side by side;
and the pixel electrode layer comprises a plurality of pixel electrodes, and each pixel electrode is formed on the corresponding insulating strip.
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