CN113110397B - High-speed electromagnetic valve driving circuit and fault diagnosis circuit and method - Google Patents

High-speed electromagnetic valve driving circuit and fault diagnosis circuit and method Download PDF

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CN113110397B
CN113110397B CN202110499678.9A CN202110499678A CN113110397B CN 113110397 B CN113110397 B CN 113110397B CN 202110499678 A CN202110499678 A CN 202110499678A CN 113110397 B CN113110397 B CN 113110397B
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switch
driving
side switch
fault
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CN113110397A (en
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黄都
李永聪
张宇
吴竞
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Chongqing Hongjiang Machinery Co Ltd
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Chongqing Hongjiang Machinery Co Ltd
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B23/00—Testing or monitoring of control systems or parts thereof
    • G05B23/02—Electric testing or monitoring
    • G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
    • G05B23/0259—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the response to fault detection
    • G05B23/0262—Confirmation of fault detection, e.g. extra checks to confirm that a failure has indeed occurred
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F16—ENGINEERING ELEMENTS AND UNITS; GENERAL MEASURES FOR PRODUCING AND MAINTAINING EFFECTIVE FUNCTIONING OF MACHINES OR INSTALLATIONS; THERMAL INSULATION IN GENERAL
    • F16K—VALVES; TAPS; COCKS; ACTUATING-FLOATS; DEVICES FOR VENTING OR AERATING
    • F16K31/00—Actuating devices; Operating means; Releasing devices
    • F16K31/02—Actuating devices; Operating means; Releasing devices electric; magnetic
    • F16K31/06—Actuating devices; Operating means; Releasing devices electric; magnetic using a magnet, e.g. diaphragm valves, cutting off by means of a liquid
    • F16K31/0675—Electromagnet aspects, e.g. electric supply therefor
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/24—Pc safety
    • G05B2219/24065—Real time diagnostics

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  • Mechanical Engineering (AREA)
  • Magnetically Actuated Valves (AREA)
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Abstract

The invention discloses a high-speed solenoid valve driving circuit and a fault diagnosis circuit and method, which are composed of a high-end switch Q1, a high-end driving U1, a high-end switch Q2, a high-end driving U2, a sampling resistor R1, a sampling resistor R2, a diode D1, a high-speed solenoid valve L1, a sampling resistor R3, a low-end switch Q3, a low-end driving U3, a differential signal amplifier U4, a voltage comparator U5 and a DSP chip. The invention can accurately identify the circuit fault, and provides corresponding compensation measures according to the fault category, and no matter any module of the high-end driving, the high-end switching tube, the low-end driving and the low-end switching tube has the fault, the corresponding compensation measures are provided, so that the 'limp home' is ensured, and the reliability of the controller is greatly improved.

Description

High-speed electromagnetic valve driving circuit and fault diagnosis circuit and method
Technical Field
The invention belongs to the technical field of engine controllers, and relates to a high-speed electromagnetic valve driving circuit, a fault diagnosis circuit and a fault diagnosis method, which are suitable for fault diagnosis and compensation of high-speed electromagnetic valve driving circuits of an electric control common rail diesel engine controller, an electric control monoblock pump diesel engine controller, an electric control gas engine, a dual-fuel engine controller and the like.
Background
With the stricter emission regulations, the electric control diesel engine is favored by various host manufacturers in China. The core technology of the electric control diesel engine is the precise control of a high-speed electromagnetic valve, such as a high-pressure common rail system, an electric control unit pump, a gas engine and the like, the high-speed electromagnetic valve driving technology is adopted, the flexible control of the fuel injection rule is realized by controlling the high-speed electromagnetic valve, the working frequency of the high-speed electromagnetic valve is very high, the service life of hundreds of millions of switches needs to be achieved, and the reliability and the stability of the high-speed electromagnetic valve are one of important indexes of the electric control diesel engine. Therefore, it is necessary to diagnose and protect the control system, especially the high-speed solenoid valve driving circuit, from faults. The high-speed electromagnetic driving circuit adopts a high-end driving technology and has poor working conditions (high voltage, large current and large du/dt and di/dt), so that the probability of the driving circuit failure is high, and the difficulty of monitoring and diagnosing the circuit failure is high. The existing diagnosis method generally adopts an indirect diagnosis method to detect the instantaneous rotating speed of the diesel engine, calculate the non-uniformity of oil injection of each cylinder and judge the fault type by software.
Therefore, it is necessary to develop a high-speed solenoid valve driving circuit and a fault diagnosis circuit and method.
Disclosure of Invention
The invention aims to provide a high-speed electromagnetic valve driving circuit, a fault diagnosis circuit and a fault diagnosis method, which can directly and quickly detect faults and adopt corresponding processing compensation measures according to the fault degree.
In a first aspect, the high-speed solenoid valve driving circuit and the fault diagnosis circuit of the present invention are composed of a high-side switch Q1, a high-side driver U1, a high-side switch Q2, a high-side driver U2, a sampling resistor R1, a sampling resistor R2, a diode D1, a high-speed solenoid valve L1, a sampling resistor R3, a low-side switch Q3, a low-side driver U3, a differential signal amplifier U4, a voltage comparator U5, and a DSP chip;
the drain of the high-side switch Q1 is connected with a power supply VH, the gate of the high-side switch Q1 is connected with the HO end of the high-side drive U1, the source of the high-side switch Q1 is connected with the CS end of the high-side drive U1, the source of the high-side switch Q1 is also connected with the VS end of the high-side drive U1 through a sampling resistor R1, the connecting point of the VS ends of the sampling resistor R1 and the high-side drive U1 is connected with the drain of the low-side switch Q3 through a high-speed electromagnetic valve L1 and a sampling resistor R3, the source of the low-side switch Q3 is grounded, and the gate of the low-side switch Q3 is connected with the HO end of the low-side drive U3;
two ends of the sampling resistor R3 are respectively connected with a pin 3 and a pin 4 of a differential signal amplifier U4; a pin 5 of the differential signal amplifier U4 is connected with a pin 5 of the voltage comparator U5, and a pin 1 of the differential signal amplifier U4 is connected with a pin 3 of the voltage comparator U5;
the HO end of the high-end drive U2 is connected with the grid of a high-end switch Q2, the drain of the high-end switch Q2 is connected with a power supply VL, the source of the high-end switch Q2 is connected with the VS pin of the high-end drive U1 through a sampling resistor R2 and a diode D1, and the CS end and the VS end of the high-end drive U2 are respectively connected with the two ends of the sampling resistor R2;
the high side drives the IN side of U1 and
Figure BDA0003055848360000021
terminal, high terminal drive IN terminal sum of U2
Figure BDA0003055848360000022
The terminal, the 4 pin of the voltage comparator U5 and the IN terminal of the low-terminal drive U3 are respectively connected with the GPAT of the DSP chip;
and a pin 1 of the differential signal amplifier U4 is connected with the FADC of the DSP chip.
In a second aspect, the method for diagnosing and compensating the fault of the high-speed solenoid valve driving circuit according to the present invention employs the high-speed solenoid valve driving circuit and the fault diagnosis circuit according to the present invention, and the method includes the following steps:
the DSP chip acquires the SCOUT signal output by the voltage comparator U5 and generates a high-voltage side high-end driving input signal for controlling the high-end driving U1, a low-voltage side high-end driving input signal for controlling the high-end driving U2 and a low-end driving input signal for controlling the low-end driving U3 on the basis of the SCOUT signal;
the DSP chip collects the SCOUT signal output by the voltage comparator U5 and the SCOUT signal output by the high-end driver U1
Figure BDA0003055848360000023
With signal, high-side drive U2 output
Figure BDA0003055848360000024
The signal and the value output by the differential signal amplifier U4, and whether the drive circuit is generated or not is judged based on the signalsFault and fault type;
and if the driving circuit fails, performing corresponding compensation according to the type of the failure.
Optionally, the fault types include an overcurrent fault of current through solenoid coil L1, a short-circuit fault of high-side switch Q1, a short-circuit fault of high-side switch Q2, an open-circuit fault of high-side switch Q1, an open-circuit fault of high-side switch Q2, and a short-circuit fault of low-side switch Q3.
Optionally, the performing corresponding compensation according to the type of the fault specifically includes:
when overcurrent fault occurs to the current passing through the solenoid valve coil L1, the DSP chip controls the HO end of the high-end drive U1 to output low level, and the high-end switch Q1 is turned off to realize overcurrent protection on the drive circuit;
when the high-side switch Q1 has short-circuit fault, the high-side switch Q2 is turned off, the chopping signal of the low-side switch Q3 is controlled to generate peak current and holding current waveforms for driving the high-speed electromagnetic valve L1, and the pulse width of the current waveforms is dynamically adjusted through PID;
when the high-side switch Q2 has short-circuit fault, the high-side switch Q1 is turned off, the chopping signal of the low-side switch Q3 is controlled to generate peak current and holding current waveforms for driving the high-speed electromagnetic valve L1, and the pulse width of the current waveforms is dynamically adjusted through PID;
when the high-side switch Q1 has an open circuit fault, generating a peak current and a holding current waveform for driving a high-speed electromagnetic valve L1 by controlling a chopping signal of the high-side switch Q2, and dynamically adjusting the pulse width of the current waveform through PID;
when the high-side switch Q2 has an open circuit fault, generating a peak current and a holding current waveform for driving a high-speed electromagnetic valve L1 by controlling a chopping signal of the high-side switch Q1, and dynamically adjusting the pulse width of the current waveform through PID;
when the short-circuit fault occurs in the low-side switch Q3, the pulse width of the current waveform is dynamically adjusted by the PID.
The invention has the following advantages:
(1) the circuit can generate a driving waveform meeting the peak/protection current, and can monitor and analyze the shape of the current waveform in real time;
(2) based on the topological structure advantages of the driving circuit, no matter any module of the high-end driving, the high-end switching tube, the low-end driving and the low-end switching tube breaks down, corresponding compensation measures are provided, and the 'limp home' is guaranteed, so that the reliability of the controller is greatly improved;
(3) the positioning precision of the fault is high, and the specific fault point and the fault type of the driving circuit can be monitored in real time;
(4) for overcurrent faults with larger destructiveness of the drive circuit, the timeliness of monitoring, diagnosis and protection can be guaranteed, so that the drive circuit is deeply protected;
(5) the fault is mainly diagnosed by a software algorithm, and the load of a CPU is increased a little;
(6) the circuit is simple, and on the basis of the driving circuit, the fault monitoring and diagnosis needs less added hardware.
Drawings
Fig. 1 is a schematic diagram of a high-speed solenoid valve drive circuit and a failure diagnosis circuit in the present embodiment;
fig. 2 is a schematic diagram of fault diagnosis based on GPTA in the present embodiment;
fig. 3 is a schematic diagram of the overcurrent fault detection based on the high-side driving in the present embodiment;
FIG. 4 is a timing diagram illustrating the operation of the high-speed solenoid driving circuit according to the present embodiment;
fig. 5 is a schematic diagram illustrating the operation of compensating for the short-circuit fault of the high-side switch Q1 in this embodiment;
fig. 6 is a schematic diagram of the short-circuit fault compensation operation of the high-side switch Q2 in this embodiment;
fig. 7 is a schematic diagram of the open-circuit fault compensation operation of the high-side switch Q1 in this embodiment;
fig. 8 is a schematic diagram of the open-circuit fault compensation operation of the high-side switch Q2 in this embodiment;
fig. 9 is a schematic diagram of the short-circuit fault compensation operation of the low-side switch Q3 in this embodiment.
Detailed Description
The invention will be further explained with reference to the drawings.
As shown in fig. 1, in this embodiment, a high-speed solenoid valve driving circuit and a fault diagnosis circuit are composed of a high-side switch Q1, a high-side driver U1, a high-side switch Q2, a high-side driver U2, a sampling resistor R1, a sampling resistor R2, a diode D1, a high-speed solenoid valve L1, a sampling resistor R3, a low-side switch Q3, a low-side driver U3, a differential signal amplifier U4, a voltage comparator U5, and a DSP chip; the connection relation of each component is as follows:
the drain of the high-side switch Q1 is connected with a power supply VH, the gate of the high-side switch Q1 is connected with the HO end of the high-side drive U1, the source of the high-side switch Q1 is connected with the CS end of the high-side drive U1, the source of the high-side switch Q1 is connected with the VS end of the high-side drive U1 through a sampling resistor R1, the connecting point of the VS ends of the sampling resistor R1 and the high-side drive U1 is connected with the drain of the low-side switch Q3 through a high-speed electromagnetic valve L1 and a sampling resistor R3, the source of the low-side switch Q3 is grounded, and the gate of the low-side switch Q3 is connected with the HO end of the low-side drive U3. Two ends of the sampling resistor R3 are respectively connected with a pin 3 and a pin 4 of a differential signal amplifier U4; the pin 5 of the differential signal amplifier U4 is connected to the pin 5 of the voltage comparator U5, and the pin 1 of the differential signal amplifier U4 is connected to the pin 3 of the voltage comparator U5. The HO end of the high-end drive U2 is connected with the grid of a high-end switch Q2, the drain of the high-end switch Q2 is connected with a power supply VL, the source of the high-end switch Q2 is connected with the VS pin of the high-end drive U1 through a sampling resistor R2 and a diode D1, and the CS end and the VS end of the high-end drive U2 are respectively connected with two ends of the sampling resistor R2. The high side drives the IN side of U1 and
Figure BDA0003055848360000051
terminal, high terminal drive IN terminal sum of U2
Figure BDA0003055848360000052
The terminal, the 4-pin of the voltage comparator U5 and the IN terminal of the low-side driver U3 are respectively connected with the GPTA of the DSP chip. And a pin 1 of the differential signal amplifier U4 is connected with the FADC of the DSP chip.
As shown in fig. 1, in this embodiment, the high-side switch Q1 is connected to the HO terminal and the CS terminal of the power VH and high-side driver U1, respectively, and the sampling resistor R1. The on and off of the high-end switch Q1 is mainly controlled by an output signal of an HO end from the high-end drive U1, when the HO end is at a high level, the high-end switch Q1 is on, and the high-speed electromagnetic valve L1 is connected with a power supply VH; when the HO terminal is at a low level, the high-side switch Q1 is turned off, and the high-speed solenoid valve L1 is disconnected from the power supply VH.
As shown in fig. 1, in this embodiment, the high-side driver U1 is connected to a high-side switch tube Q1, a sampling resistor R1, a high-speed solenoid valve L1, and a DSP chip, respectively. The high-side driver U1 is a typical high-side bootstrap floating driver chip, the input IN signal of the high-side driver U1 comes from the GPTA of the DSP chip, and since the output signal of the DSP chip cannot directly drive the high-power MOS transistor, a floating driver signal is output through the HO terminal of the high-side driver U1 after being processed by the high-side driver U1, so as to drive the high-side switch Q1. In addition, the high-end drive U1 also has the functions of overcurrent detection, overcurrent fault protection, overcurrent fault indication and the like, and the high-end drive U1
Figure BDA0003055848360000053
The terminal is used for indicating overcurrent fault when
Figure BDA0003055848360000054
When the terminal is at high level, the circuit works normally when
Figure BDA0003055848360000055
When the terminal is at low level, the circuit has overcurrent fault. High-end drive U1
Figure BDA0003055848360000056
The end signal is sent to GPTA of the DSP chip, and after the DSP chip receives the fault occurrence signal, corresponding compensation measures need to be taken. The CS terminal and the VS terminal of the high-side driver U1 are respectively connected to the forward terminal and the reverse terminal of the sampling resistor R1, so as to monitor whether the current signal fails in real time.
As shown in fig. 1, in this embodiment, the high-side switch Q2 is respectively connected to the HO terminal and the CS terminal of the power source VL and the high-side driver U2, and the sampling resistor R2. The on and off of the high-side switch Q2 is mainly controlled by the HO terminal output signal from the high-side drive U2, when the HO terminal of the high-side drive U2 is at high level, the high-side switch Q2 is turned on, and the high-speed electromagnetic valve L1 is connected with the power supply VL; when the HO terminal of the high-side driver U2 is at a low level, the high-side switch Q2 is turned off, and the high-speed solenoid valve L1 is disconnected from the power supply VL.
As shown in fig. 1, in this embodiment, the high-side driver U2 is connected to a high-side switch tube Q2, a sampling resistor R2, a high-speed solenoid valve L1, and a DSP chip, respectively. The high-side driver U2 is a typical high-side bootstrap floating driver chip, the input IN terminal signal of the high-side driver U2 is from the GPTA of the DSP chip, and since the output signal of the DSP chip cannot directly drive the high-power MOS transistor, a floating driver signal is output through the HO terminal of the high-side driver U2 after being processed by the high-side driver U2, so as to drive the high-side switch Q2. In addition, the high-end drive U2 also has the functions of overcurrent detection, overcurrent fault protection, overcurrent fault indication and the like, and the high-end drive U2
Figure BDA0003055848360000061
The terminals being adapted to indicate overcurrent failure when the high terminal drives U2
Figure BDA0003055848360000062
When the high end is high, the circuit works normally, and when the high end drives U2
Figure BDA0003055848360000063
When the terminal is at low level, the circuit has overcurrent fault. High-end drive U2
Figure BDA0003055848360000064
The end signal is sent to GPTA of the DSP chip, and after the DSP chip receives the fault occurrence signal, corresponding compensation measures need to be taken. The CS terminal and the VS terminal of the high-side driver U2 are respectively connected to the forward terminal and the reverse terminal of the sampling resistor R2, so as to monitor whether the current signal fails in real time.
As shown in fig. 1, in this embodiment, the sampling resistor R1 is respectively connected to the CS terminal, the VS terminal and the high-speed solenoid valve L1 of the high-side switch Q1 and the high-side driver U1, and the sampling resistor R1 is used to convert a current signal flowing through the high-speed solenoid valve L1 into a voltage signal during the conduction period of the high-side switch Q1, and the CS terminal of the high-side driver U1 is used to monitor the voltage signal in real time, so as to ensure that a timely fault indication and protection can be performed when an overcurrent fault occurs.
As shown in fig. 1, in this embodiment, the sampling resistor R2 is respectively connected to the CS terminal, the VS terminal and the high-speed solenoid valve L1 of the high-side switch Q2 and the high-side driver U2, and the sampling resistor R2 is used to convert a current signal flowing through the high-speed solenoid valve L1 into a voltage signal during the conduction period of the high-side switch Q2, and the CS terminal of the high-side driver U2 is used to monitor the voltage signal in real time, so as to ensure that a timely fault indication and protection can be performed when an overcurrent fault occurs.
As shown in fig. 1, in this embodiment, the diode D1 is connected to the sampling resistor R1, the sampling resistor R2, the high-side driver U1, the high-side driver U2, and the high-speed solenoid valve L1, and the diode D1 mainly prevents the power supply VH from flowing backward to the power supply VL through the parasitic diode of the high-side switch Q1 during the period that the high-side switch Q1 is turned on.
As shown in fig. 1, in this embodiment, the high-speed electromagnetic valve L1 is connected to the sampling resistor R1, the VS terminal of the high-side driver U1, the diode D1, and the sampling resistor L3, and the high-speed electromagnetic valve L1 is used as a load of a driving circuit and may be a gas injection valve of an electrically controlled common rail diesel injector, an electrically controlled unit pump, an electrically controlled gas engine, and a dual fuel engine.
As shown in fig. 1, in this embodiment, the sampling resistor R3 is respectively connected to the high-speed solenoid valve L1, the low-end switch Q3, and the differential signal amplifier U4, and the sampling resistor R3 can convert the current signal flowing through the high-speed solenoid valve L1 into a voltage signal in real time, and since the value of the sampling resistor R3 is small, the current signal is usually within 10m Ω, otherwise, the power consumption of the sampling resistor R3 is large, and heat generation is serious. After the current signal flows through the sampling resistor R3 with a small resistance value, the converted voltage signal value is small, and in order to improve the signal-to-noise ratio of the collected signal, the voltage signal on the sampling resistor R3 needs to be differentially amplified through the differential signal amplifier U4.
In the embodiment shown in fig. 1, the low-side switch Q3 is connected to the sampling resistor R3 and the low-side driver U3, and the low-side switch Q3 controls the current driving the high-speed solenoid valve L1 in cooperation with the high-side switch Q1 and the high-side switch Q2, and the signal of the current is derived from the HO terminal of the low-side driver U3.
As shown in fig. 1, in the embodiment, the low-side driver U3 is connected to the DSP chip and the low-side switch Q3, respectively, and since the high level voltage of the GPTA signal in the DSP chip is low, only 3.3V is insufficient to turn on the low-side switch Q3, the high level signal needs to be amplified to 15V by the low-side driver U3, so that the low-side switch Q3 can be completely turned on when a high level is input.
As shown in fig. 1, in this embodiment, the differential signal amplifier U4 is respectively connected to the high-speed solenoid valve L1, the sampling resistor R3, the low-end switch Q3 and the voltage comparator U5, the differential signal amplifier U4 mainly functions to amplify the voltage signal at two ends of the sampling resistor R3, so as to improve the signal-to-noise ratio of the sampling signal, and the current signal collecting output terminal (pin 1) of the differential signal amplifier U4 is connected to the inverting terminal (pin 3) of the voltage comparator U5, and is compared with the reference voltage VREF 1; and the current signal acquisition output end of the differential signal amplifier U4 is also sent to the FADC in the DSP chip, so that the current waveform key point of the high-speed electromagnetic valve L1 is monitored and fault diagnosis is carried out.
As shown in fig. 1, in this embodiment, the voltage comparator U5 is connected to the differential signal amplifier U4 and the DSP chip, respectively, and the voltage comparator U5 mainly functions to compare the current signal acquisition output signal sent by the differential signal amplifier U4 with a reference voltage VREF1, and when the current signal acquisition output is higher than VREF1, the output SCOUT signal becomes a low level, and after GPTA in the DSP chip acquires a falling edge of SCOUT, the voltage comparator U5 generates a low-voltage side high-side driving input signal for controlling the driving circuit in combination with an internal timer.
As shown in fig. 1, in this embodiment, the DSP chip is respectively connected to the high-side driver U1, the high-side driver U2, the low-side driver U3, the differential signal amplifier U4, and the voltage comparator U5, the DSP chip is the "brain" of the entire driving circuit,the high-side driving circuit has the functions of collecting current signals of the driving circuit, judging and generating control logic signals for controlling the driving circuit, such as collecting an SCOUT signal, and generating a high-side driving input signal for controlling the high-side driving U1, a low-side high-side driving input signal for controlling the high-side driving U2 and a low-side driving input signal for controlling the low-side driving U3; the second function is to monitor the failure of the driving circuit to initiate corresponding measures to protect the failed circuit, such as detecting SCOUT,
Figure BDA0003055848360000081
And the current signal acquires and outputs values so as to analyze different types of faults of the driving circuit and provide different protection methods for different faults.
As shown in fig. 2, which is a schematic diagram of fault diagnosis based on GPTA in this embodiment, each time the current rises above a preset threshold, the SCOUT in fig. 1 generates a falling edge, and the catcher 1 can detect the falling edge of the SCOUT in real time. Comparator 1 may generate a drive control PWM waveform that controls the high speed solenoid current waveform. The circuit is driven by a restart timer 1 in an LTC unit (LTC unit is part of the DSP chip, LTC unit is a local timing unit) which automatically controls the solenoid valve drive current without consuming any CPU/PCP load.
After a falling edge in the input signal SCOUT, the restart timer 1 and the control pin associated with the GPTA will act as (1) the actual 16-bit timer value restart timer 1 is stored in the SFR LTCxR for diagnostic purposes; (2) restart timer 1 will be cleared to zero and restarted; (3) the high side drive input waveform EN _ LOW output has a falling edge, the level is set LOW, and the current is turned off.
As the timer resets and restarts, the current through the coil of the high speed solenoid valve L1 will remain OFF until the "restart timer 1" matches the value EN _ LOW _ OFF _ TIME preprogrammed into the "comparator 1" of the LTC unit. This event causes a rising edge in the trigger signal drive waveform, which is set high, thus again passing current through the coil of the high speed solenoid valve L1. The drive waveform signal remains open until the high speed solenoid L1 coil current again rises above the predefined threshold, causing a new capture event to be generated in the LTC unit trap 1.
In addition, the maximum switch-ON TIME for which the comparator 2 of an additional LTC unit limits the current through the coil is EN _ LOW _ MAX _ ON _ TIME. For safety reasons, it is necessary to use the comparator 2 to avoid any damage to the coil of the high speed solenoid valve L1 when the current sense feedback signal SCOUT is corrupted. Meanwhile, the maximum switch-ON TIME is EN _ LOW _ MAX _ ON _ TIME, which can also be used for diagnosing faults.
From the above analysis, GPTA can not only detect the falling edge of the driving signal, but also generate the PWM waveform for controlling the high-side driving through the EN _ LOW signal inversion; and can also set up the maximum ON TIME EN _ LOW _ MAX _ ON _ TIME, if drive break down, SCOUT is high continuously or LOW continuously, when unable to detect the level reversal, reach EN _ LOW _ MAX _ ON _ TIME set value in the comparator 2, carry ON the fault identification by turning over a flag bit.
As shown in fig. 3, which is a schematic diagram of the overcurrent fault detection based on the high-side driving in the present embodiment, under the normal operation condition,
Figure BDA0003055848360000082
outputs a high level, and when an overcurrent fault occurs in the current through the solenoid valve coil L1,
Figure BDA0003055848360000083
and a low level is output, and the HO terminal of the high-side driver U1 also outputs a low level, so that the high-side switch Q1 is turned off, and overcurrent protection of the driver circuit is realized. High-end drive U1
Figure BDA0003055848360000091
The terminal is connected with a DSP chip GPTA shown in FIG. 1, and is used for detecting a falling edge, thereby monitoring whether the drive circuit has an overcurrent fault. Such as: the waveform of the CS output in fig. 3 indicates that an overcurrent fault has occurred.
As shown in fig. 4, which is an operation timing diagram of the high-speed solenoid driving circuit in this embodiment, since the high-side driver shown in fig. 1 is a bootstrap floating driving circuit structure, in order to ensure that the bootstrap circuit operates normally, it is necessary to ensure that the bootstrap capacitor has sufficient charging time before the driving current is generated, which requires the low-side switch U3 to be turned on in advance, and the turn-on time of the low-side switch U3 is determined according to the parameters of the bootstrap capacitor charging loop before the high-side high-voltage switch tube is turned on. After the low-side switch U3 is turned on for a period of time, the high-side switch Q1 starts to be turned on, and the high-side switch Q1 is turned on in order to make the high-speed solenoid valve L1 reach a Peak current (Peak current) as soon as possible under the condition of high voltage VH, thereby accelerating the opening response speed of the high-speed solenoid valve L1; after the current waveform rapidly climbs to a peak current (peak) set value under a high-voltage condition, in order to reduce the heat productivity of the high-speed electromagnetic valve, the maintaining voltage of the peak current (peak) is changed into low-voltage VL power supply, at the moment, the high-end switch Q1 is turned off, and the high-end switch Q2 is turned on.
The number of chopped falling edges of the driving circuit and the current value of a current waveform key point in the working period of a current waveform can be detected in real time by utilizing the GPTA and the FADC, and when the driving circuit has a fault, the specific type of the fault can be inferred by counting the times of the falling edges, the overflow condition of the restart timer 1 and the current value of the current waveform key point.
As shown in fig. 5, for a working principle diagram of short-circuit fault compensation of the high-side switch Q1 in this embodiment, Q1, Q2, L1, and Q3 in fig. 5 correspond to the high-side switch Q1, the high-side switch Q2, the high-speed solenoid valve L1, and the low-side switch Q3 in fig. 1 one to one, respectively, and the working timing of the driving circuit in normal working condition is described in detail in fig. 4, and will not be described again here. When the high-side switch Q1 has a short-circuit fault, the power supply VH is directly connected to the high-speed solenoid valve L1, and compensation measures are implemented to reduce the degree of influence of the fault on the drive circuit and to realize "limp home": the high-side switch Q2 is turned off all the way, the peak current and hold current waveforms driving the solenoid L1 are generated by controlling the chopping signal of the low-side switch Q3, and the pulse width of the current waveform is dynamically adjusted by PID, thereby implementing compensation.
As shown in fig. 6, for the short-circuit fault compensation operation schematic diagram of the high-side switch Q2 in this embodiment, Q1, Q2, L1, and Q3 in fig. 6 correspond to the high-side switch Q1, the high-side switch Q2, the high-speed solenoid valve L1, and the low-side switch Q3 in fig. 1 one to one, respectively, and the operation timing of the driving circuit in the normal operation condition is described in detail in fig. 4, which is not described herein again. When the high-side switch Q2 has a short-circuit fault, the power supply VL is directly connected to the high-speed solenoid valve L1, and in order to reduce the degree of influence of the fault on the drive circuit and realize "limp home", compensation measures are implemented as follows: the high-end switch Q1 is turned off in the whole process, the current waveforms of a Peak circuit (Peak current) and a holding current (Hold current) for driving the high-speed solenoid valve L1 are generated by controlling the chopping signal of the low-end switch Q3, and the pulse width of the current waveform is dynamically adjusted by PID, so that compensation is implemented.
As shown in fig. 7, for the schematic diagram of the open-circuit fault compensation operation of the high-side switch Q1 in this embodiment, Q1, Q2, L1, and Q3 in fig. 7 correspond to the high-side switch Q1, the high-side switch Q2, the high-speed solenoid valve L1, and the low-side switch Q3 in fig. 1 one to one, respectively, and the operation timing of the driving circuit in the normal operation condition is described in detail in fig. 4, and will not be described again here. When the high-side switch Q1 fails to open, the power supply VH and the high-speed solenoid valve L1 cannot be turned on, and in order to reduce the degree of influence of the failure on the drive circuit and realize "limp home", compensation measures are implemented that: peak current and Hold current waveforms for driving the high-speed solenoid valve L1 are generated by controlling a chopping signal of the high-side switch Q2, and the pulse width of the current waveforms is dynamically adjusted through PID, so that compensation is implemented.
As shown in fig. 8, for the schematic diagram of the open-circuit fault compensation operation of the high-side switch Q2 in this embodiment, Q1, Q2, L1, and Q3 in fig. 8 correspond to the high-side switch Q1, the high-side switch Q2, the high-speed solenoid valve L1, and the low-side switch Q3 in fig. 1 one by one, and the operation timing sequence of the driving circuit in the normal operation condition is described in detail in fig. 4, which is not described herein again. When the high-side switch Q2 fails to open, the power supply VL and the high-speed solenoid valve L1 cannot be turned on, and in order to reduce the degree of influence of the failure on the drive circuit and realize "limp home", compensation measures are implemented that: peak current and Hold current waveforms for driving the high-speed solenoid valve L1 are generated by controlling a chopping signal of the high-side switch Q1, and the pulse width of the current waveforms is dynamically adjusted through PID, so that compensation is implemented.
As shown in fig. 9, for the short-circuit fault compensation operation schematic diagram of the low-side switch Q3 in this embodiment, Q1, Q2, L1, and Q3 in fig. 9 correspond to the high-side switch Q1, the high-side switch Q2, the high-speed solenoid valve L1, and the low-side switch Q3 in fig. 1 one by one, and the operation timing sequence of the driving circuit in the normal operation condition is described in detail in fig. 4, which is not described herein again. When the low-end switch Q3 has short-circuit fault, the influence on the drive circuit is small, only the falling time of Hold current falling to 0 when the high-speed electromagnetic valve is turned off is influenced, the control time sequence of the whole drive circuit does not need to be greatly adjusted, and only the pulse width of the current waveform needs to be dynamically adjusted through PID, so that compensation is implemented.

Claims (1)

1. A fault diagnosis and compensation method for a high-speed electromagnetic valve driving circuit is characterized by comprising the following steps: the high-speed electromagnetic valve fault diagnosis circuit comprises a high-speed electromagnetic valve driving circuit and a fault diagnosis circuit, and is composed of a high-end switch Q1, a high-end driving U1, a high-end switch Q2, a high-end driving U2, a sampling resistor R1, a sampling resistor R2, a diode D1, a high-speed electromagnetic valve L1, a sampling resistor R3, a low-end switch Q3, a low-end driving U3, a differential signal amplifier U4, a voltage comparator U5 and a DSP chip;
the drain of the high-side switch Q1 is connected with a power supply VH, the gate of the high-side switch Q1 is connected with the HO end of the high-side drive U1, the source of the high-side switch Q1 is connected with the CS end of the high-side drive U1, the source of the high-side switch Q1 is also connected with the VS end of the high-side drive U1 through a sampling resistor R1, the connecting point of the VS ends of the sampling resistor R1 and the high-side drive U1 is connected with the drain of the low-side switch Q3 through a high-speed electromagnetic valve L1 and a sampling resistor R3, the source of the low-side switch Q3 is grounded, and the gate of the low-side switch Q3 is connected with the HO end of the low-side drive U3;
two ends of the sampling resistor R3 are respectively connected with a pin 3 and a pin 4 of a differential signal amplifier U4; a pin 5 of the differential signal amplifier U4 is connected with a pin 5 of the voltage comparator U5, and a pin 1 of the differential signal amplifier U4 is connected with a pin 3 of the voltage comparator U5;
the HO end of the high-end drive U2 is connected with the grid of a high-end switch Q2, the drain of the high-end switch Q2 is connected with a power supply VL, the source of the high-end switch Q2 is connected with the VS pin of the high-end drive U1 through a sampling resistor R2 and a diode D1, and the CS end and the VS end of the high-end drive U2 are respectively connected with the two ends of the sampling resistor R2;
the high side drives the IN side of U1 and
Figure FDA0003494208860000011
terminal, high terminal drive IN terminal sum of U2
Figure FDA0003494208860000012
The end, the 4 pin of the voltage comparator U5 and the IN end of the low-end driving U3 are respectively connected with the GPTA of the DSP chip;
a pin 1 of the differential signal amplifier U4 is connected with the FADC of the DSP chip;
the method comprises the following steps:
the DSP chip acquires the SCOUT signal output by the voltage comparator U5 and generates a high-voltage side high-end driving input signal for controlling the high-end driving U1, a low-voltage side high-end driving input signal for controlling the high-end driving U2 and a low-end driving input signal for controlling the low-end driving U3 on the basis of the SCOUT signal;
the DSP chip collects the SCOUT signal output by the voltage comparator U5 and the SCOUT signal output by the high-end driver U1
Figure FDA0003494208860000013
With signal, high-side drive U2 output
Figure FDA0003494208860000014
The values output by the signal and differential signal amplifier U4 are used for judging whether the driving circuit has faults or not and judging the fault type based on the signals;
if the driving circuit fails, corresponding compensation is carried out according to the type of the failure;
the fault types comprise overcurrent fault of current passing through a solenoid valve coil L1, short-circuit fault of a high-end switch Q1, short-circuit fault of a high-end switch Q2, open-circuit fault of a high-end switch Q1, open-circuit fault of a high-end switch Q2 and short-circuit fault of a low-end switch Q3;
the corresponding compensation is performed according to the type of the fault, specifically:
when overcurrent fault occurs to the current passing through the solenoid valve coil L1, the DSP chip controls the HO end of the high-end drive U1 to output low level, and the high-end switch Q1 is turned off to realize overcurrent protection on the drive circuit;
when the high-side switch Q1 has short-circuit fault, the high-side switch Q2 is turned off, the chopping signal of the low-side switch Q3 is controlled to generate peak current and holding current waveforms for driving the high-speed electromagnetic valve L1, and the pulse width of the current waveforms is dynamically adjusted through PID;
when the high-side switch Q2 has short-circuit fault, the high-side switch Q1 is turned off, the chopping signal of the low-side switch Q3 is controlled to generate peak current and holding current waveforms for driving the high-speed electromagnetic valve L1, and the pulse width of the current waveforms is dynamically adjusted through PID;
when the high-side switch Q1 has an open circuit fault, generating a peak current and a holding current waveform for driving a high-speed electromagnetic valve L1 by controlling a chopping signal of the high-side switch Q2, and dynamically adjusting the pulse width of the current waveform through PID; when the high-side switch Q2 has an open circuit fault, generating a peak current and a holding current waveform for driving a high-speed electromagnetic valve L1 by controlling a chopping signal of the high-side switch Q1, and dynamically adjusting the pulse width of the current waveform through PID;
when the short-circuit fault occurs in the low-side switch Q3, the pulse width of the current waveform is dynamically adjusted by the PID.
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