CN113097416A - Display panel and preparation method thereof - Google Patents

Display panel and preparation method thereof Download PDF

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Publication number
CN113097416A
CN113097416A CN202110337580.3A CN202110337580A CN113097416A CN 113097416 A CN113097416 A CN 113097416A CN 202110337580 A CN202110337580 A CN 202110337580A CN 113097416 A CN113097416 A CN 113097416A
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China
Prior art keywords
layer
pixel defining
pixel
hole
display panel
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CN202110337580.3A
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Chinese (zh)
Inventor
唐甲
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to CN202110337580.3A priority Critical patent/CN113097416A/en
Publication of CN113097416A publication Critical patent/CN113097416A/en
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/805Electrodes
    • H10K50/82Cathodes
    • H10K50/824Cathodes combined with auxiliary electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/122Pixel-defining structures or layers, e.g. banks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass

Abstract

The invention provides a display panel and a preparation method thereof. The display panel comprises an array substrate, an auxiliary electrode, a flat layer, a first pixel limiting layer, a second pixel limiting layer and a light emitting device. The first pixel defining layer and the second pixel defining layer are arranged on the flat layer in an intersecting manner, and form an overlapping area while enclosing a groove. The overlapping area is provided with a through hole, and the through hole and the auxiliary electrode are oppositely arranged. The light emitting device is arranged on the top surfaces of the first pixel limiting layer and the second pixel limiting layer and extends to the hole wall of the through hole and the side wall of the groove. The light emitting device includes a cathode electrically connected to the auxiliary electrode.

Description

Display panel and preparation method thereof
Technical Field
The invention relates to the field of optical display equipment, in particular to a display panel and a preparation method thereof.
Background
Compared with a passive Light Emitting Liquid Crystal Display (LCD), an Organic Light-Emitting Diode (OLED) Display that emits Light autonomously has the advantages of fast response speed, high contrast, wide viewing angle, and the like, and is easy to implement flexible Display, and thus is widely used. OLED displays are likely to become mainstream products of next generation display technologies.
When the OLED panel works, due to the problem of the wiring distance, IR drop (voltage drop) occurs in the center, the peripheral edge, and other areas of the display panel, which results in uniform voltage distribution in the display panel and uneven brightness of the display image, so that an auxiliary electrode needs to be additionally prepared in the display panel, an auxiliary voltage is additionally applied to the area with larger voltage drop, and the image display of the whole panel is uniform and stable during working. However, the overlapping structure of the auxiliary electrode and the display device designed in the prior art affects the aperture opening ratio of the display panel, and has high preparation cost, complex preparation process and no mass production condition.
Disclosure of Invention
The invention aims to provide a display panel and a preparation method thereof, and aims to solve the problems that the overlapping structure of an auxiliary electrode and a display device in the prior art can influence the aperture opening ratio of the display panel, the preparation cost is high, the preparation process is complex, and mass production conditions are not met.
In order to achieve the above object, the present invention provides a display panel including an array substrate, an auxiliary electrode, a planarization layer, a first pixel defining layer, a second pixel defining layer, and a light emitting device.
The first pixel defining layer has a plurality of first pixel defining bars parallel to each other. The first pixel limiting strips are arranged on the top surface of the flat layer, and a first gap exists between every two adjacent first pixel limiting strips.
The second pixel defining layer has a plurality of second pixel defining bars therein parallel to each other. The second pixel defining strip is arranged on the top surface of the first pixel defining strip in a crossed manner and extends to the top surface of the flat layer at the plurality of first gaps.
And a through hole is arranged in an overlapping area of the second pixel limiting strip and the first pixel limiting strip, sequentially penetrates through the second pixel limiting layer, the first pixel limiting layer and the flat layer, and is opposite to the auxiliary electrode. Two adjacent first pixel defining strips and two adjacent second pixel defining strips enclose a groove.
The light emitting device is arranged on the top surfaces of the first pixel limiting layer and the second pixel limiting layer and extends to the hole wall of the through hole and the side wall of the groove. The light emitting device includes a cathode electrically connected to the auxiliary electrode.
Further, the light emitting device includes an anode and an organic light emitting layer. The bottom end of the anode penetrates through the flat layer and the array substrate and is connected to the source electrode in the array substrate, and the top end of the anode extends to the top surface of the flat layer. The organic light emitting layer is arranged in the groove and is electrically connected to the anode.
Further, a middle portion of the anode tip forms a bottom surface of the groove, and an edge of the anode tip is covered by the first pixel defining strip and/or the second pixel defining strip.
Further, the light emitting device further includes an electron function layer and a cathode. The electronic function layer is attached to the top surfaces of the first pixel limiting layer and the second pixel limiting layer and extends to the hole wall of the through hole, the side wall of the groove and the top surface of the organic light emitting layer. The cathode is attached to the top surface of the electronic function layer and extends to the auxiliary electrode.
Furthermore, the display panel further comprises a plurality of undercut layers, and the undercut layers and the top end of the anode are arranged on the top surface of the flat layer at the same layer. One end of the undercut layer is located in the overlapping area, the other end of the undercut layer extends into the through hole to form a shielding structure, and the shielding structure and one part of the edge of the auxiliary electrode are arranged oppositely.
The embodiment of the invention also provides a preparation method of the display panel, which comprises the following steps:
forming an auxiliary electrode on an array substrate; forming a planarization layer on the array substrate and the auxiliary electrode; a plurality of first pixel defining strips on the planar layer, the first pixel defining strips combining to form a first pixel defining layer; forming a plurality of second pixel defining strips on the planar layer and a portion of the first pixel defining layer, the second pixel defining strips intersecting the first pixel defining strips, the second pixel defining strips combining to form a second pixel defining layer; a region where the first pixel defining strip and the second pixel defining strip intersect with each other is an overlapping region in which a via hole is formed, the via hole penetrating the planarization layer, the first pixel defining layer, and the second pixel defining layer and extending to a surface of the auxiliary electrode; two adjacent first pixel limiting strips and two adjacent second pixel limiting strips enclose a groove; and forming a light emitting device and a cathode of the light emitting device on the top surfaces of the first pixel defining layer and the second pixel defining layer, the wall of the through hole and the side wall of the groove.
Further, the display panel preparation method further comprises the following steps: forming an anode on the planarization layer, the anode corresponding to the groove; an organic light emitting layer is formed on the surface of the anode in the groove.
Further, the preparation method of the display panel comprises the following steps: the forming of the first pixel defining layer includes the steps of:
forming an electronic function layer on the groove, the first pixel limiting layer, the second pixel limiting layer and the hole wall of the through hole through an evaporation method; forming a cathode on the electronic function layer and the auxiliary electrode by an evaporation method; when the electronic functional layer is evaporated, the evaporation direction of the evaporation source faces to one side of the through hole, which is far away from the light-emitting device; when the cathode layer is evaporated, the evaporation direction of the evaporation source faces to one side of the through hole close to the light-emitting device.
Further, the preparation method of the display panel further comprises the following steps: forming an undercut layer on the planar layer within the overlap region while forming the anode.
Further, the forming of the first pixel defining layer includes the steps of:
depositing an organic material layer on the planarization layer, patterning the organic material layer to form an initial first pixel defining bar, and removing the initial first pixel defining bar corresponding to the through hole; thinning the thickness of the initial first pixel defining strip by a dry etching or ashing method to form the first pixel defining strip; reducing the thickness of the initial first pixel limiting strip, and simultaneously expanding the aperture of a through hole in the flat layer to expose part of the undercut layer in the through hole to form a shielding structure;
further, the forming of the second pixel defining layer includes the steps of:
depositing a layer of insulating material over the planarization layer and the first pixel defining layer, patterning the layer of insulating material to form the second pixel defining strips, and removing the second pixel defining strips corresponding to the through holes.
The invention has the advantages that:
in the display panel provided by the invention, the through hole for lapping the auxiliary electrode and the light-emitting device is arranged in the overlapping area of the first pixel limiting layer and the second pixel limiting layer, so that the opening ratio of the display panel can be improved while the voltage drop phenomenon is reduced, the resolution of the display panel is improved, and the display panel can provide a clearer and more precise display picture.
In the preparation method of the display panel, provided by the invention, the manufacture procedure of the overlapping structure of the light-emitting device and the auxiliary electrode is simplified, the production efficiency is improved while the voltage drop is reduced, and the production cost is reduced.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of a layer structure of a display panel according to an embodiment of the present invention;
FIG. 2 is a top view of a display panel according to an embodiment of the present invention;
FIG. 3 is a schematic flow chart illustrating a method for manufacturing a display panel according to an embodiment of the present invention;
FIG. 4 is a schematic cross-sectional view illustrating the display panel in step S20 according to the embodiment of the present invention;
FIG. 5 is a schematic cross-sectional view illustrating the display panel in step S30 according to an embodiment of the present invention;
FIG. 6 is a schematic cross-sectional view illustrating the display panel in step S40 according to an embodiment of the present invention;
FIG. 7 is a schematic cross-sectional view illustrating the display panel in step S51 according to an embodiment of the present invention;
FIG. 8 is a schematic cross-sectional view illustrating the display panel in step S52 according to an embodiment of the present invention;
FIG. 9 is a schematic cross-sectional view illustrating the display panel in step S60 according to an embodiment of the present invention;
FIG. 10 is a schematic cross-sectional view illustrating the display panel in step S70 according to the embodiment of the present invention;
FIG. 11 is a schematic cross-sectional view illustrating the display panel in step S80 according to an embodiment of the present invention;
fig. 12 is a schematic cross-sectional view illustrating the display panel in step S80 according to the embodiment of the present invention.
The components in the figures are represented as follows:
a display panel 100;
an array substrate 10; a source electrode 11;
a passivation layer 12; a planarization layer 13;
an auxiliary electrode 20; a light emitting device 30;
an anode 31; an organic light-emitting layer 32;
an electron functional layer 33; a cathode 34;
a first pixel defining layer 40; the first pixel defining bar 41;
a second pixel defining layer 50; the second pixel defining bar 51;
an overlap region 60; a through-hole 70;
a recess 80; an undercut layer 90;
array substrate semi-finished product 10'; a connecting hole 14;
an initial via 70'; the initial first pixel defines a bar 41'.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. Furthermore, it should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the invention, are given by way of illustration and explanation only, and are not intended to limit the scope of the invention. In the present application, unless indicated to the contrary, the use of the directional terms "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, and more particularly to the orientation of the figures of the drawings; while "inner" and "outer" are with respect to the outline of the device.
In an embodiment of the invention, a display panel 100 is provided, as shown in fig. 1, the display panel 100 includes an array substrate 10, an auxiliary electrode 20, a light emitting device 30, a first pixel defining layer 40, and a second pixel defining layer 50.
A plurality of Thin Film Transistor (TFT) structures arranged in an array are disposed in the array substrate 10, and the light emitting device 30 is controlled to be turned on or off by the TFT structures. The thin film transistor structure generally includes an active layer, a gate electrode, a source electrode 11, a drain electrode, and an insulating material layer disposed between each electrode layer and the active layer. As shown in fig. 1, the insulating material layer includes a passivation layer 12 and a planarization layer 13, the passivation layer 12 is disposed on the source electrode 11 covering the array substrate 10, and the planarization layer 13 is disposed on a surface of the passivation layer 12 away from the source electrode 11.
The auxiliary electrode 20 is disposed between the passivation layer 12 and the planarization layer 13, and is electrically connected to the cathode 34 in the light emitting device 30. When the display panel 100 operates, a voltage drop (IR drop) phenomenon occurs at the center position of the display screen and the peripheral positions except the center position due to the difference of the transmission distances of the traces, and the voltage drop phenomenon causes the brightness of the display screen to be uneven, and the auxiliary electrode 20 electrically connected to the light emitting device 30 is provided to additionally apply an auxiliary voltage to the area with a large voltage drop, so that the voltage at each position during the whole display operation is the same or similar, thereby enabling the brightness of the display screen to be uniform and stable.
The first pixel defining layer 40 and the second pixel defining layer 50 are provided on the array substrate 10. The first pixel defining layer 40 is disposed on a surface of the planarization layer 13 away from the passivation layer 12 and has a plurality of first pixel defining bars 41. The second pixel defining layer 50 is provided on the top surface of the first pixel defining layer 40 and the top surface of the planarization layer 13, and has a plurality of second pixel defining bars 51. As shown in fig. 2, two adjacent first pixel defining bars 41 have a first gap therebetween and are parallel to each other, and two adjacent second pixel defining bars 51 are also parallel to each other. The intersections of the second pixel defining bars 51 are disposed on the top surfaces of the first pixel defining bars 41 and extend to the top surface of the planarization layer 13 at the plurality of first gaps. The area where the first pixel defining bar 41 and the second pixel defining bar 51 intersect is an overlap area 60. The thickness of the first pixel defining layer 40 is less than 1 micron, and preferably, the thickness of the first pixel defining layer 40 is 0.3 micron. The thickness of the second pixel defining layer 50 is less than 2 microns, and preferably, the thickness of the second pixel defining layer 50 is 1 micron.
The display panel 100 also has a through hole 70, a groove 80, and an undercut layer 90.
The through-hole 70 is provided in an overlap region 60 where the first pixel defining bar 41 and the second pixel defining bar 51 intersect. As shown in fig. 1, the through hole 70 penetrates through the second pixel defining layer 50, the first pixel defining layer 40 and the planarization layer 13 onto the surface of the auxiliary electrode 20, so that a surface of the auxiliary electrode 20 facing the pixel defining layer is exposed.
The undercut layer 90 is located in the overlap region 60, is disposed on a surface of the planarization layer 13 away from the auxiliary electrode 20, and extends from the planarization layer 13 into the through hole 70. A gap is formed between the undercut layer 90 and the auxiliary electrode 20 at the bottom of the through hole 70, so that one end of the undercut layer 90 close to the through hole 70 is exposed at the through hole 70 to form a shielding structure, so as to shield a part of the structure at the edge of the auxiliary electrode 20. Wherein, the ratio of the width of the shielding structure to the width of the auxiliary electrode 20 is 0.3-0.5.
As shown in fig. 1, the first pixel defining bar 41 and the second pixel defining bar 51 enclose a plurality of grooves 80 on the top surface of the planarization layer 13, and the light emitting device 30 is disposed on the top surfaces of the first pixel defining layer 40 and the second pixel defining layer 50 and extends to the wall of the through hole 70 and the sidewall of the groove 80. The light emitting device 30 includes an anode 31, a cathode 34, an electron functional layer 33, an organic light emitting layer 32, and the like.
The anode 31 and the top end of the undercut layer 90 are disposed on a surface of the planarization layer 13 away from the passivation layer 12 in the same layer, the groove 80 is disposed corresponding to the anode 31, a middle portion of the top end of the anode 31 forms a bottom surface of the groove 80, and an edge of the top end of the anode 31 is covered by the first pixel defining strip 41 and/or the second pixel defining strip 51. The anode 31 is electrically connected to the source electrode 11 in the array substrate 10 through the planarization layer 13 and the passivation layer 12.
The organic light emitting layer 32 is disposed on the exposed surface of the anode 31 in the groove 80 and electrically connected to the anode 31. The holes in the anode 31 and the electrons in the cathode 34 meet and combine in the organic light-emitting layer 32 under conduction of current and voltage, thereby exciting the light-emitting material in the organic light-emitting layer 32 to emit light.
The electronic function layer 33 generally includes an electron transport layer and an electron injection layer, which are stacked and disposed on a surface of the organic light emitting layer 32 in the groove 80 away from the anode 31, and extend from top surfaces of the first pixel defining layer 40 and the second pixel defining layer 50 along sidewalls of the groove 80 to cover a hole wall of the through hole 70, such that an end of the electronic function layer 33 located in the through hole 70 covers a side of the auxiliary electrode 20 in the through hole 70 away from the undercut layer 90.
The cathode 34 is disposed on a surface of the electron functional layer 33 away from the organic light emitting layer 32, and also extends from the recess 80 to cover the through hole 70. Meanwhile, one end of the cathode 34 located in the through hole 70 extends to below the undercut layer 90, covers the electronic function layer 33 and extends to the exposed surface of the auxiliary electrode 20 in the through hole 70, and is electrically connected to the auxiliary electrode 20.
The light emitting device 30 emits light by a current and a voltage supplied from the thin film transistor structure in the array substrate 10, thereby forming a display screen.
In the embodiment of the present invention, the through hole 70 where the auxiliary electrode 20 and the light emitting device 30 are overlapped is disposed in the overlapping region 60 of the first pixel defining layer 40 and the second pixel defining layer 50, so that the display luminance stability of the display panel 100 is improved, and at the same time, the influence of the overlapping structure of the auxiliary electrode 20 and the light emitting device 30 on the aperture ratio of the display panel 100 is reduced, which is beneficial to improving the resolution of the display panel 100, so that the display panel 100 can provide a clearer and more precise display picture.
The embodiment of the present invention further provides a method for manufacturing a display panel 100, where a manufacturing process of the display panel 100 is shown in fig. 3, and the method includes the following steps:
step S10) forms the passivation layer 12: an array of substrate blanks 10' is prepared and a passivation layer 12 is formed: the array substrate semi-finished product 10 'comprises a plurality of thin film transistor structures arranged in an array, wherein the thin film transistor structures are provided with source electrodes 11, the source electrodes 11 are arranged on one surface of the array substrate semi-finished product 10', a layer of insulating material is deposited on the surface, and a passivation layer 12 covering the source electrodes 11 is formed.
Step S20) forming the auxiliary electrode 20: and forming a conductive material layer on one surface of the passivation layer 12 far away from the array substrate semi-finished product 10', wherein the conductive material layer is made of metal, and the metal can be aluminum, copper, molybdenum-titanium alloy and the like. The conductive material layer is patterned to form the auxiliary electrode 20 as shown in fig. 4.
Step S30) forms the planarization layer 13: depositing a layer of organic material on the passivation layer 12 to form the planarization layer 13, wherein the planarization layer 13 covers the auxiliary electrode 20. Patterning the planarization layer 13 and the passivation layer 12 on the planarization layer 13 through exposure, development, etching, etc., to form an initial via hole 70' corresponding to the auxiliary electrode 20 and a connection hole 14 corresponding to the source electrode 11, and finally forming the array substrate 10 structure as shown in fig. 5. Wherein the initial via hole 70' penetrates the planarization layer 13 to the surface of the auxiliary electrode 20, and the connection hole 14 penetrates the planarization layer 13 and the passivation layer 12 to the surface of the source electrode 11.
Step S40) forming the anode 31 and the undercut layer 90: a layer of conductive material is deposited or evaporated on the planar layer 13, and the conductive material fills the connection hole 14 to connect with the source electrode 11. The layer of conductive material is patterned to form the anode 31 and undercut layer 90 as shown in figure 6. At this time, the undercut layer 90 is entirely located on the flat layer 13. Wherein, the conductive material comprises at least one of metal materials or metal oxide materials such as indium tin oxide, aluminum, silver and the like.
Step S50) of forming the first pixel defining layer 40 while enlarging the aperture of the initial via hole 70' in the planarization layer 13 includes the steps of:
step S51) forms the initial first pixel defining bar 41': a layer of organic material is deposited on the array substrate 10, the anode 31 and the undercut layer 90, and the organic material may be the same as or different from the organic material in the passivation layer 12. Patterning the organic material layer through exposure, development, etching, and the like to form a plurality of initial first pixel defining bars 41 ' as shown in fig. 7, and simultaneously removing the initial first pixel defining bars 41 ' at positions corresponding to the initial through holes 70 ', so as to expose one end of the undercut layer 90 close to the auxiliary electrode 20 and expose partial top surfaces of the auxiliary electrode 20 and the anode 31. The thickness of the initial first pixel defining strips 41' is greater than 0.3 microns.
Step S52) thins the thickness of the initial first pixel defining bar 41 'and enlarges the aperture of the initial via hole 70':
the thickness of the initial first pixel defining bar 41' is reduced to 0.3 μm by dry etching or ashing to form a plurality of first pixel defining bars 41 as shown in fig. 8, and the plurality of first pixel defining bars 41 are combined to form the first pixel defining layer 40.
While the thickness of the initial first pixel defining strip 41 'is reduced, since the planarization layer 13 and the first pixel defining layer 40 are both made of organic materials, the aperture of the initial through hole 70' in the planarization layer 13 can be enlarged to be below the bottom surface of the partial undercut layer 90 by the same dry etching process or ashing process, so that one end of the undercut layer 90 close to the auxiliary electrode 20 can extend into the through hole 70, and the portion of the undercut layer 90 extending into the through hole 70 is completely exposed in the through hole 70, thereby forming a shielding structure capable of shielding part of the auxiliary electrode 20. The ratio of the width of the shielding structure to the width of the auxiliary electrode 20 is 0.3-0.5.
Step S60) forms the second pixel defining layer 50: a layer of insulating material is deposited over the first pixel defining layer 40 and the array substrate 10 and patterned to form a plurality of second pixel defining strips 51 arranged interdigitated with the first pixel defining strips 41, the first pixel defining strips 41 and the second pixel defining strips 51 forming a mesh structure as shown in figure 2. The second pixel defining strip 51 and the first pixel defining strip 41 enclose a plurality of grooves 80, and the grooves 80 correspond to the anode 31. And removing the second pixel defining strips 51 corresponding to the initial through holes 70' while patterning the insulating material layer, thereby completing the preparation of the through holes 70 and forming a semi-finished structure of the display panel 100 as shown in fig. 9.
Step S70) forming the organic light emitting layer 32: an organic light emitting layer 32 as shown in fig. 10 is formed on the surface of the anode 31 in the groove 80 by an Ink Jet Print (IJP) method.
Step S80) forming the electronic function layer 33: the electron function layer 33 as shown in fig. 11 is formed on the organic light emitting layer 32, the first pixel defining layer 40, and the second pixel defining layer 50 in the groove 80 by an evaporation method. When the electronic function layer 33 is deposited, the deposition angle of the deposition source is adjusted so that the deposition direction of the deposition source faces the side of the through hole 70 away from the undercut layer 90 as shown by the arrow in fig. 11, so that the shielding structure of the undercut layer 90 can shield part of the auxiliary electrode 20 during deposition, the material of the electronic function layer 33 cannot be deposited on the auxiliary electrode 20 below the undercut layer 90, and the deposited electronic function layer 33 can extend from the groove 80 to cover only the auxiliary electrode 20 in the through hole 70 that is not shielded by the undercut layer 90.
Step S90) forming the cathode 34: the electronic function layer 33 as shown in fig. 12 is formed on the electronic function layer 33 by a vapor deposition method. When the cathode 34 is evaporated, the evaporation angle of the evaporation source is adjusted so that the evaporation direction of the evaporation source is toward the side of the through hole 70 close to the undercut layer 90 as indicated by the arrow in fig. 12, so that the material of the cathode 34 can enter the through hole 70 under the undercut layer 90 during evaporation, and the evaporated cathode 34 can cover the electronic functional layer 33 and extend from the electronic functional layer 33 to the auxiliary electrode 20 under the undercut layer 90 shielding structure, thereby electrically connecting the cathode 34 in the light emitting device 30 and the auxiliary electrode 20.
According to the manufacturing method of the display panel 100 provided in the embodiment of the invention, the first pixel defining layer 40 is thinned, the aperture of the through hole 70 is enlarged, the undercut layer 90 can shield part of the through hole 70, and the cathode 34 is connected with the auxiliary electrode 20 by adjusting the evaporation angles of the electronic functional layer 33 and the cathode 34, so that the manufacturing process of the overlapping structure of the light emitting device 30 and the auxiliary electrode 20 is simplified, and the production efficiency is improved while the voltage drop is reduced.

Claims (10)

1. A display panel, comprising:
an array substrate;
the auxiliary electrode is arranged on the top surface of the array substrate;
the flat layer is attached to the top surface of the array substrate and covers the auxiliary electrode;
the first pixel limiting layer is provided with a plurality of first pixel limiting strips which are parallel to each other and arranged on the top surface of the flat layer, and a first gap is formed between every two adjacent first pixel limiting strips;
the second pixel limiting layer is provided with a plurality of second pixel limiting strips which are parallel to each other, arranged on the top surfaces of the first pixel limiting strips in a crossed mode and extended to the top surfaces of the flat layers at the first gaps;
a through hole is arranged in an overlapping area of the second pixel limiting strip and the first pixel limiting strip, penetrates through the second pixel limiting layer, the first pixel limiting layer and the flat layer in sequence, and is opposite to the auxiliary electrode; two adjacent first pixel limiting strips and two adjacent second pixel limiting strips enclose a groove; and
and the light-emitting device is arranged on the top surfaces of the first pixel limiting layer and the second pixel limiting layer, extends to the hole wall of the through hole and the side wall of the groove, and comprises a cathode connected to the auxiliary electrode.
2. The display panel according to claim 1, wherein the light-emitting device comprises:
an anode, the bottom end of which penetrates through the flat layer and the array substrate and is connected to the source electrode in the array substrate, and the top end of which extends to the top surface of the flat layer; and
and the organic light-emitting layer is arranged in the groove and is electrically connected to the anode.
3. The display panel according to claim 2, wherein a middle portion of the anode tip forms a bottom surface of the groove, and an edge of the anode tip is covered by the first pixel defining bar and/or the second pixel defining bar.
4. The display panel according to claim 1, wherein the light emitting device comprises:
the electronic function layer is attached to the top surfaces of the first pixel limiting layer and the second pixel limiting layer and extends to the hole wall of the through hole, the side wall of the groove and the top surface of the organic light emitting layer; and
and the cathode is attached to the top surface of the electronic function layer and extends to the auxiliary electrode.
5. The display panel of claim 2, further comprising:
a plurality of undercut layers, which are arranged on the top surface of the flat layer in the same layer with the top end of the anode;
one end of the undercut layer is located in the overlapping area, the other end of the undercut layer extends into the through hole to form a shielding structure, and the shielding structure and one part of the edge of the auxiliary electrode are arranged oppositely.
6. A preparation method of a display panel is characterized by comprising the following steps:
forming an auxiliary electrode on an array substrate;
forming a planarization layer on the array substrate and the auxiliary electrode;
a plurality of first pixel defining strips on the planar layer, the first pixel defining strips combining to form a first pixel defining layer;
forming a plurality of second pixel defining strips on the planar layer and a portion of the first pixel defining layer, the second pixel defining strips intersecting the first pixel defining strips, the second pixel defining strips combining to form a second pixel defining layer;
a region where the first pixel defining strip and the second pixel defining strip intersect with each other is an overlapping region in which a via hole is formed, the via hole penetrating the planarization layer, the first pixel defining layer, and the second pixel defining layer and extending to a surface of the auxiliary electrode;
two adjacent first pixel limiting strips and two adjacent second pixel limiting strips enclose a groove; and
and forming a light emitting device and a cathode of the light emitting device on the top surfaces of the first pixel defining layer and the second pixel defining layer, the wall of the through hole and the side wall of the groove.
7. The method for manufacturing a display panel according to claim 6, further comprising the steps of:
forming an anode on the planarization layer, the anode corresponding to the groove; and
an organic light emitting layer is formed on the surface of the anode in the groove.
8. The method for manufacturing a display panel according to claim 6,
forming an electronic function layer on the groove, the first pixel limiting layer, the second pixel limiting layer and the hole wall of the through hole through an evaporation method; and
forming a cathode on the electronic function layer and the auxiliary electrode by an evaporation method;
when the electronic functional layer is evaporated, the evaporation direction of the evaporation source faces to one side of the through hole, which is far away from the light-emitting device; when the cathode layer is evaporated, the evaporation direction of the evaporation source faces to one side of the through hole close to the light-emitting device.
9. The method for manufacturing a display panel according to claim 7, further comprising the steps of: forming an undercut layer on the planar layer within the overlap region while forming the anode.
10. The method for manufacturing a display panel according to claim 9,
the step of forming the first pixel defining layer includes the steps of:
depositing an organic material layer on the planarization layer, patterning the organic material layer to form an initial first pixel defining bar, and removing the initial first pixel defining bar corresponding to the through hole;
thinning the thickness of the initial first pixel defining strip by a dry etching or ashing method to form the first pixel defining strip; and
reducing the thickness of the initial first pixel limiting strip, and simultaneously expanding the aperture of a through hole in the flat layer to expose part of the undercut layer in the through hole to form a shielding structure;
the step of forming the second pixel defining layer includes the steps of:
depositing a layer of insulating material over the planarization layer and the first pixel defining layer, patterning the layer of insulating material to form the second pixel defining strips, and removing the second pixel defining strips corresponding to the through holes.
CN202110337580.3A 2021-03-30 2021-03-30 Display panel and preparation method thereof Pending CN113097416A (en)

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