CN113097408A - Display panel and preparation method thereof - Google Patents
Display panel and preparation method thereof Download PDFInfo
- Publication number
- CN113097408A CN113097408A CN202110284332.7A CN202110284332A CN113097408A CN 113097408 A CN113097408 A CN 113097408A CN 202110284332 A CN202110284332 A CN 202110284332A CN 113097408 A CN113097408 A CN 113097408A
- Authority
- CN
- China
- Prior art keywords
- layer
- conductive layer
- display panel
- organic light
- contact hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/805—Electrodes
- H10K50/82—Cathodes
- H10K50/824—Cathodes combined with auxiliary electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The invention provides a display panel and a preparation method thereof.A containing cavity is formed below a flat layer, and a gap communicated with the containing cavity is formed between an organic light-emitting layer and the flat layer, so that a cathode layer is connected with an auxiliary electrode layer which is not covered by the organic light-emitting layer through the gap, and the effective electric connection between the cathode layer and the auxiliary electrode layer is realized, thereby achieving the effect of improving the current drop of the display panel and improving the brightness uniformity of the display panel.
Description
Technical Field
The application relates to the technical field of display, in particular to a display panel and a preparation method thereof.
Background
Organic Light-Emitting diodes (OLEDs) have Display characteristics and qualities superior to Liquid Crystal Displays (LCDs), such as Light weight, short response time, low driving voltage, better Display color and better Display viewing angle.
In recent years, the development of OLEDs is more and more advanced, and not only curved displays can be manufactured, but also large-sized panels are gradually developed. However, when the large-sized OLED panel works, the cathode of the OLED panel has a large resistance, and different voltage drops are generated at different positions of the OLED panel, so that the brightness of the OLED panel is not uniform.
At present, an auxiliary electrode and a cathode isolating column are manufactured, and an original whole film forming process of a cathode is changed into an isolating lapping process of the cathode on the auxiliary electrode below, so that the cathode is controlled independently, and the problem of voltage drop is solved. However, the isolation column has low selectivity of raw materials, which increases the cost of the OLED panel and complicates the fabrication process of the OLED panel, and particularly, the fabrication process of the isolation column is more difficult for the OLED panel fabricated by the inkjet printing method.
Disclosure of Invention
The application provides a display panel and a preparation method thereof, which can realize effective electric connection between a cathode and an auxiliary electrode and solve the technical problems of overlarge cathode voltage drop and poor brightness uniformity of the display panel.
In order to solve the above technical problem, in a first aspect, an embodiment of the present application provides a method for manufacturing a display panel, where the method for manufacturing a display panel includes:
providing a substrate base plate;
preparing a thin film transistor layer, an auxiliary electrode layer and a flat layer on the substrate in sequence, and forming a first contact hole exposing the auxiliary electrode layer on the flat layer, wherein the auxiliary electrode layer comprises a first conductive layer and a second conductive layer which are stacked in sequence;
preparing an anode layer, and removing the second conductive layer while etching the anode layer pattern; the first conductive layer comprises a first area exposed to the first contact hole and a second area covered by an orthographic projection of the flat layer on the first conductive layer; the second area and the flat layer form an accommodating cavity;
preparing a pixel defining layer, wherein an opening communicated with the first contact hole is formed in the pixel defining layer corresponding to the first contact hole;
preparing an organic light-emitting layer, wherein the organic light-emitting layer covers the first area of the first conductive layer, and a first notch communicated with the accommodating cavity is formed in the organic light-emitting layer and the flat layer in the first contact hole;
preparing a cathode layer, wherein the cathode layer is electrically connected with the second area of the first conducting layer through the first notch.
According to the preparation method of the display panel provided by the embodiment of the invention, the first conductive layer and the second conductive layer are made through the same photomask, and orthographic projections of the first conductive layer and the second conductive layer on the substrate coincide.
According to the method for manufacturing the display panel provided by the embodiment of the invention, the materials of the first conductive layer and the second conductive layer are different from each other.
According to the preparation method of the display panel provided by the embodiment of the invention, the second conductive layer and the anode layer are made of the same material.
According to the method for manufacturing the display panel provided by the embodiment of the invention, the thickness of the second conductive layer is larger than the sum of the thicknesses of the cathode layer and the organic light emitting layer.
According to the preparation method of the display panel, the organic light emitting layer is evaporated on the pixel defining layer at a first set angle; evaporating the cathode layer on the organic light-emitting layer at a second set angle; the first set angle is different from the second set angle.
In order to solve the above technical problem, in a second aspect, an embodiment of the present invention further provides a display panel, including:
the thin film transistor structure comprises a substrate, and a thin film transistor layer, a first conductive layer and a flat layer which are sequentially formed on the substrate;
a first contact hole formed on the planarization layer and exposing the first conductive layer; the first conductive layer comprises a first area exposed to the first contact hole and a second area covered by an orthographic projection of the flat layer on the first conductive layer; the second area of the first conducting layer and the flat layer form an accommodating cavity;
the pixel definition layer is positioned above the flat layer, and an opening communicated with the first contact hole is formed in the pixel definition layer corresponding to the first contact hole;
the organic light-emitting layer is formed on the pixel defining layer and covers the first area of the first conducting layer, and a first gap communicated with the accommodating cavity is formed in the first contact hole by the organic light-emitting layer and the flat layer;
the cathode layer is electrically connected with the second area of the first conducting layer through the first notch.
According to the display panel provided by the embodiment of the invention, the display panel further comprises an anode layer, a second contact hole for exposing the source electrode in the thin film transistor layer is formed on the flat layer, and the anode layer is connected with the source electrode through the second contact hole.
According to the display panel provided by the embodiment of the invention, the height of the accommodating cavity is larger than the sum of the thicknesses of the cathode layer and the organic light emitting layer.
According to the display panel provided by the embodiment of the invention, the organic light emitting layer is evaporated on the pixel defining layer at a first set angle; the cathode layer is evaporated on the organic light-emitting layer at a second set angle; the first set angle is different from the second set angle.
The beneficial effects of this application lie in, the display panel and preparation method thereof of this application hold the chamber through forming below the flat bed, and be formed with the first breach that the chamber was held in the intercommunication between organic light emitting layer and the flat bed, make the cathode layer be connected with the auxiliary electrode layer that organic light emitting layer does not cover through first breach, realized the effective electricity of cathode layer and auxiliary electrode layer and connected, thereby reach the effect that improves display panel's current pressure drop, can promote display panel's luminance homogeneity. Meanwhile, the second conducting layer and the anode layer are made of the same material, so that when the anode layer is etched, the second conducting layer is etched and removed at the same time, the accommodating cavity is formed, the process can be simplified, and the cost is saved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required in the embodiments are briefly described below. The drawings in the following description are only some embodiments of the present application, and it will be obvious to those skilled in the art that other drawings can be obtained from the drawings without inventive effort.
Fig. 1 is a schematic flow chart illustrating a method for manufacturing a display panel according to an embodiment of the present disclosure;
fig. 2(a) to 2(c) are schematic diagrams of step S2 of a method for manufacturing a display panel according to an embodiment of the present application;
fig. 3 is another schematic diagram of step S2 of the method for manufacturing a display panel according to the embodiment of the present application.
Fig. 4 is a schematic diagram of step S3 of a method for manufacturing a display panel according to an embodiment of the present application;
fig. 5 is a schematic diagram of step S4 of a method for manufacturing a display panel according to an embodiment of the present application;
fig. 6 is a schematic diagram of step S5 of a method for manufacturing a display panel according to an embodiment of the present application;
fig. 7 is a schematic diagram of step S6 of a method for manufacturing a display panel according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of an embodiment of a display panel provided in the present application;
fig. 9 is a schematic structural diagram of another embodiment of a display panel provided in the present application.
Detailed Description
Specific structural and functional details disclosed herein are merely representative and are provided for purposes of describing example embodiments of the present application. This application may, however, be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.
In the description of the present application, the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless otherwise specified. Furthermore, the term "comprises" and any variations thereof is intended to cover non-exclusive inclusions.
The directional terms mentioned in the present invention, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], are only referring to the directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention. In the drawings, elements having similar structures are denoted by the same reference numerals.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
For the convenience of understanding the technical solutions of the present invention, the technical solutions of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.
The embodiment of the invention provides a preparation method of a display panel, which comprises the following steps: providing a substrate base plate; preparing a thin film transistor layer, an auxiliary electrode layer and a flat layer on the substrate in sequence, and forming a first contact hole exposing the auxiliary electrode layer on the flat layer, wherein the auxiliary electrode layer comprises a first conductive layer and a second conductive layer which are stacked in sequence; preparing an anode layer, and removing the second conductive layer while etching the anode layer pattern; the first conductive layer comprises a first area exposed to the first contact hole and a second area covered by an orthographic projection of the flat layer on the first conductive layer; the second area and the flat layer form an accommodating cavity; preparing a pixel defining layer, wherein an opening communicated with the first contact hole is formed in the pixel defining layer corresponding to the first contact hole; preparing an organic light-emitting layer, wherein the organic light-emitting layer covers the first area of the first conductive layer, and a first notch communicated with the accommodating cavity is formed in the organic light-emitting layer and the flat layer in the first contact hole; preparing a cathode layer, wherein the cathode layer is electrically connected with the second area of the first conducting layer through the first notch.
As shown in fig. 1, fig. 1 is a schematic flow chart illustrating a method for manufacturing a display panel according to an embodiment of the present disclosure. Fig. 2(a) to 7 are schematic structural views of steps of manufacturing a display panel based on the method shown in fig. 1.
As shown in fig. 1 to 7, the method for manufacturing the display panel may include the following steps:
step S1: providing a substrate base plate;
in a specific implementation manner, in the method for manufacturing a display panel according to the embodiment of the present invention, the substrate has a display area and a non-display area disposed at a periphery of the display area; optionally, the substrate base plate is a glass base plate, and plays a role in supporting and backing.
Step S2: preparing a thin film transistor layer, an auxiliary electrode layer and a flat layer on the substrate in sequence, and forming a first contact hole exposing the auxiliary electrode layer on the flat layer, wherein the auxiliary electrode layer comprises a first conductive layer and a second conductive layer which are stacked in sequence;
specifically, as shown in fig. 2(a), a light-shielding metal layer 101 and a first electrode plate 102 disposed in the same layer may be formed on a substrate 100, a buffer layer 103 may be disposed on the light-shielding metal layer 101, an amorphous oxide semiconductor layer 104 and a second electrode plate 105 are disposed on the buffer layer 103 in the same layer, a gate insulating layer 106, a first metal conductive layer 107, and an insulating isolation layer 108 covering the amorphous oxide semiconductor layer 104, the second electrode plate 105, the gate insulating layer 106, and the first metal conductive layer 107 are sequentially disposed on the amorphous oxide semiconductor layer 104, a source 109 and a drain 110 are disposed on the insulating isolation layer 108 in the same layer, and a protective layer 111 disposed on the insulating barrier 108, the source electrode 109 and the drain electrode 110, wherein the first electrode plate 102 and the second electrode plate 105 form a capacitive structure.
Further, as shown in fig. 2(b), the auxiliary electrode layer 200 is prepared on the protective layer 111 of the thin-film transistor layer 10, and the auxiliary electrode layer 200 is disposed in the non-display region. Specifically, the auxiliary electrode layer 200 includes a first conductive layer 201 and a second conductive layer 202 stacked in sequence, the first conductive layer 201 and the second conductive layer 202 may be prepared by two different masks, respectively, and an orthogonal projection of the first conductive layer 201 on the substrate 100 covers an orthogonal projection of the second conductive layer 202 on the substrate 100.
Furthermore, the materials of the first conducting layer and the second conducting layer are different from each other, so that the first conducting layer is prevented from being influenced in the process of removing the second conducting layer; specifically, the first conductive layer 201 is a metal material with good conductivity, and optionally, the first conductive layer 201 may be a single-layer metal layer, and a metal material with low resistivity, such as Mo, Al, Cu, Ti, or the like; it may be a multilayer structure such as Mo/Al/Mo, Mo/Cu, MoTi/Cu, etc., but is not limited to the above materials. In addition, the thickness of the first conductive layer 201 is between 500 angstroms and 2000 angstroms.
Further, as shown in fig. 2(c), the planarization layer 210 is fabricated on the protection layer 111, and the planarization layer 210 is provided to planarize the surface of the film layer, so as to facilitate the attachment of the subsequent film layer and prevent the film layer from being detached, and optionally, the planarization layer 210 has a thickness of 1.0-4.0 μm. Defining a first contact hole exposing the auxiliary electrode layer 200 and a second contact hole exposing the source electrode on the planarization layer 210, wherein the first contact hole 203 is disposed opposite to the auxiliary electrode layer 200 to expose the auxiliary electrode layer 200 and provide a connection channel for a subsequent film layer; the second contact hole 204 is disposed opposite to the source electrode 109, so that an anode layer to be manufactured later is connected to the source electrode 109 in the second contact hole 204.
In a specific implementation manner, in the method for manufacturing a display panel according to the embodiment of the invention, the first conductive layer 201 and the second conductive layer 202 can be manufactured by using the same mask; specifically, as shown in fig. 3, orthographic projections of the first conductive layer 201 and the second conductive layer 202 on the substrate 100 obtained by the same photomask are overlapped, and the first conductive layer 201 and the second conductive layer 202 are integrally formed, so that a photomask and a process can be reduced, and the production process is simplified.
Step S3: specifically, as shown in fig. 4, an anode layer 211 is formed on the planarization layer 210, and the anode layer 211 is connected to the source electrode 109 through the second contact hole 204 on the planarization layer 210.
Alternatively, the anode layer 211 may be a single layer or a composite layer, and the material thereof includes, but is not limited to, ITO, IZO, WOx single film or ITO/Ag/ITO, IZO/Ag/IZO, ITO/Al/ITO or IZO/Al/IZO.
In a specific implementation manner of the method for manufacturing a display panel according to the embodiment of the invention, the material of the second conductive layer 202 is the same as that of the anode layer 211, that is, the material of the second conductive layer 202 includes but is not limited to ITO, IZO, WOx single film or ITO/Ag/ITO, IZO/Ag/IZO, ITO/Al/ITO or IZO/Al/IZO.
In a specific implementation manner, in the preparation method of the display panel provided in this embodiment of the present invention, a wet etching process may be used to define the anode layer 211 pattern, the second conductive layer 202 is made of the same material as the anode layer 211, and when the anode layer 211 is etched, the second conductive layer 202 is simultaneously etched and removed, specifically, as shown in fig. 4, the first conductive layer 201 includes a first region 205 exposed to the first contact hole 203 and a second region 206 covered by a forward projection of the planarization layer 210 on the first conductive layer 201; the second region 206 and the planarization layer 210 form a receiving cavity 207.
By providing the second conductive layer 202 with the same material as the anode layer 211, the second conductive layer 202 is etched away at the same time when the anode layer 211 is etched. Therefore, new processes and new materials do not need to be added to form the accommodating cavity 207, the process is simple, and the cost is saved.
Specifically, as shown in fig. 4, since the first conductive layer 201 and the second conductive layer 202 are made by the same photomask, the first conductive layer 201 and the second conductive layer 202 are integrally formed, and therefore, orthographic projections of the first conductive layer 201 and the second conductive layer 202 on the substrate 100 are overlapped; moreover, the second region 206 of the first conductive layer 201 is not covered with the planarization layer 210, that is, the area of the first conductive layer 201 exposed by the accommodating cavity 207 is increased, thereby facilitating the connection between the first conductive layer 201 and a subsequently fabricated film layer.
Step S4: a pixel defining layer 212 is prepared, and an opening penetrating the first contact hole 203 is formed in the pixel defining layer 212 at a position corresponding to the first contact hole 203, and specifically, as shown in fig. 5, a photoresist is coated on the auxiliary electrode layer 200 and the anode layer 211, and processes such as exposure and development are performed to form a pattern of the pixel defining layer 212. The pixel light emitting region of the display panel and the region of the auxiliary electrode layer 200 are defined by the pixel defining layer 212. And a first opening exposing the first conductive layer 201 and a second opening exposing the anode layer 211 are formed on the pixel defining layer 212.
Step S5: preparing an organic light emitting layer 213, wherein the organic light emitting layer 213 covers the first region 205 of the first conductive layer 201, and the organic light emitting layer 213 and the planarization layer 210 form a first gap 208 communicating with the accommodating cavity 207 in the first contact hole 203;
step S6: preparing a cathode layer 214, wherein the cathode layer 214 is electrically connected to the second region 206 of the first conductive layer 201 through the first gap 208.
In a specific implementation manner, in the method for manufacturing a display panel according to the embodiment of the invention, the thickness of the second conductive layer 202 is greater than the sum of the thicknesses of the cathode layer 214 and the organic light emitting layer 213. By controlling the thickness of the second conductive layer 202, the accommodating cavity 207 formed after removing the second conductive layer 202 can accommodate the organic light emitting layer 213 and the cathode layer 214 at the same time, thereby ensuring that the cathode layer 214 can extend into the first gap 208 to be electrically connected with the first conductive layer 201 uncovered by the organic light emitting layer 213.
Since the receiving cavity 207 is formed between the second region 206 of the first conductive layer 201 and the planarization layer 210, and the projection of the planarization layer 210 covers the receiving cavity 207, as shown in fig. 6, when the organic light emitting layer 213 is evaporated, the organic light emitting layer 213 covers the first region 205 of the first conductive layer 201 without entering the receiving cavity 207, and the entering amount is very small even if it can enter. Therefore, the organic light emitting layer 213 may be broken at the receiving cavity 207, in particular, a fault may occur at the edge of the first contact hole 203.
In a specific implementation manner, in the method for manufacturing a display panel according to the embodiment of the invention, the organic light emitting layer 213 is evaporated on the pixel defining layer 212 at a first set angle; depositing the cathode layer 214 on the organic light emitting layer 213 at a second predetermined angle; the first set angle is different from the second set angle. Specifically, in the evaporation process of the organic light emitting layer 213, the organic light emitting layer 213 is evaporated on the pixel defining layer 212 at a first set angle, the evaporation angle of the organic light emitting layer 213 is controlled so that the organic light emitting layer 213 does not completely cover the first conductive layer 201, and the organic light emitting layer 213 and the planarization layer 210 form a first notch 208 communicating with the accommodating cavity 207 in the first contact hole 203.
Further, after the organic light emitting layer 213 is evaporated, the cathode layer 214 may be further evaporated on the organic light emitting layer 213, and the cathode layer 214 is electrically connected to the second region 206 of the first conductive layer 201 through the first gap 208 in the accommodating cavity 207. Since the receiving cavity 207 is formed between the second region 206 of the first conductive layer 201 and the flat layer 210, and the projection of the flat layer 210 covers the receiving cavity 207, as shown in fig. 7, when the cathode layer 214 is evaporated, the cathode layer 214 is disconnected at the receiving cavity 207, specifically, a fault occurs at the edge of the first contact hole 203.
Specifically, in the evaporation process of the cathode layer 214, the cathode layer 214 is evaporated on the organic light emitting layer 213 at a second set angle, and the evaporation angle of the cathode layer 214 is controlled to be different from the evaporation angle of the organic light emitting layer 213, so that the coverage area of the cathode layer 214 on the first conductive layer 201 is larger than the coverage area of the organic light emitting layer 213 on the first conductive layer 201, and the cathode layer 214 can be ensured to extend into the first notch 208, thereby being electrically connected with the first conductive layer 201 which is not covered by the organic light emitting layer 213. As shown in fig. 7, the accommodating cavity 207 is formed between the second region 206 and the flat layer 210, and the cathode layer 214 is electrically connected to the second region 206 of the first conductive layer 201 through the first notch 208 in the accommodating cavity 207.
In a specific implementation manner, in the method for manufacturing a display panel according to the embodiment of the invention, the cathode layer 214 and the planarization layer 210 form a second notch 209 communicating with the accommodating cavity 207 in the first contact hole 203. Subsequently, through an encapsulation process, the encapsulation material enters the accommodating cavity 207 from the second notch 209, and the accommodating cavity 207 is filled.
According to the preparation method of the display panel, the cathode layer 214 can be connected with the auxiliary electrode without processing the organic light emitting layer 213, so that the resistance of the cathode layer 214 is effectively reduced, the production process is convenient to implement, and no new process equipment is required to be added.
Of course, the embodiment of the present invention is only an example of the directional deposition of the organic light emitting layer 213 and the cathode layer 214, and the method for manufacturing the display panel of the present invention may also implement the directional deposition of the organic light emitting layer 213 and the cathode layer 214 in other manners.
In addition, the present application provides a display panel including:
the thin film transistor structure comprises a substrate, and a thin film transistor layer, a first conductive layer and a flat layer which are sequentially formed on the substrate;
a first contact hole formed on the planarization layer and exposing the first conductive layer; the first conductive layer comprises a first area exposed to the first contact hole and a second area covered by an orthographic projection of the flat layer on the first conductive layer; the second area of the first conducting layer and the flat layer form an accommodating cavity;
the pixel definition layer is positioned above the flat layer, and an opening communicated with the first contact hole is formed in the pixel definition layer corresponding to the first contact hole;
the organic light-emitting layer is formed on the pixel defining layer and covers the first area of the first conducting layer, and a first gap communicated with the accommodating cavity is formed in the first contact hole by the organic light-emitting layer and the flat layer;
the cathode layer is electrically connected with the second area of the first conducting layer through the first notch.
In a specific implementation manner, in the display panel provided in the embodiment of the present invention, the substrate has a display area and a non-display area disposed at a periphery of the display area; optionally, the substrate base plate is a glass base plate, and plays a role in supporting and backing.
Specifically, as shown in fig. 8, the thin-film transistor layer 10 includes: a light-shielding metal layer 101 and a first electrode plate 102 disposed on the same layer on the substrate 100, a buffer layer 103 disposed on the light-shielding metal layer 101, an amorphous oxide semiconductor layer 104 and a second electrode plate 105 disposed on the same layer on the buffer layer 103, a gate insulating layer 106, a first metal conductive layer 107, an insulating isolation layer 108 covering the amorphous oxide semiconductor layer 104, the second electrode plate 105, the gate insulating layer 106, and the first metal conductive layer 107, a source electrode 109 and a drain electrode 110 disposed on the insulating isolation layer 108 on the same layer, and a protective layer 111 disposed on the insulating isolation layer 108, the source electrode 109, and the drain electrode 110, wherein the first electrode plate 102 and the second electrode plate 105 form a capacitor structure.
Further, as shown in fig. 8, the first conductive layer 201 is disposed on the protective layer 111 of the thin-film transistor layer 10, and the first conductive layer 201 is disposed in the non-display region. Specifically, the first conductive layer 201 is a metal material with good conductivity, and optionally, the first conductive layer 201 may be a single metal layer, such as Mo, Al, Cu, Ti, or the like; multilayer structures such as Mo/Al/Mo, Mo/Cu, MoTi/Cu, etc.; but is not limited to the above materials. In addition, the thickness of the first conductive layer 201 is between 500 angstroms and 2000 angstroms;
further, as shown in fig. 8, the planarization layer 210 is formed on the protection layer 111 of the thin film transistor layer 10, and a first contact hole exposing the first conductive layer 201 and a second contact hole exposing the source electrode are defined on the planarization layer 210, and the planarization layer 210 has a thickness of 1.0-4.0 μm. Specifically, the first contact hole and the second contact hole are defined on the planarization layer 210, and the first contact hole is disposed opposite to the first conductive layer 201 to provide a connection channel for a subsequently fabricated film layer; the second contact hole is disposed opposite to the source electrode 109, so that an anode layer manufactured subsequently is connected to the source electrode 109 in the second contact hole.
Further, as shown in fig. 8, the first conductive layer 201 includes a first region 205 exposed to the first contact hole, and a second region 206 covered by an orthogonal projection of the planarization layer 210 on the first conductive layer 201; the second region 206 of the first conductive layer 201 and the planarization layer 210 form a receiving cavity 207.
In a specific implementation manner, the display panel provided in the embodiment of the invention further includes an anode layer 211 formed on the planarization layer 210, and the anode layer 211 is connected to the source electrode 109 of the thin film transistor layer 10 through the second contact hole on the planarization layer 210.
Alternatively, the anode layer 211 may be a single layer or a composite layer, and the material thereof includes, but is not limited to, ITO, IZO, WOx single film or ITO/Ag/ITO, IZO/Ag/IZO, ITO/Al/ITO or IZO/Al/IZO.
Further, as shown in fig. 8, the pixel defining layer 212 is located above the planarization layer 210, and the pixel defining layer 212 is formed with an opening corresponding to the first contact hole, the opening penetrating through the first contact hole; a first opening exposing the first conductive layer 201 and a second opening exposing the anode layer 211 are formed on the pixel defining layer 212; by the pixel defining layer 212, a pixel light emitting area of the display panel and an area of the first conductive layer 201 are defined.
Further, as shown in fig. 8, the organic light emitting layer 213 is formed on the pixel defining layer 212, and the organic light emitting layer 213 covers the first region 205 of the first conductive layer 201, and the organic light emitting layer 213 and the planarization layer 210 form a first gap communicating with the accommodating cavity 207 in the first contact hole; specifically, the organic light emitting layer 213 may be disconnected at the receiving cavity 207, the organic light emitting layer 213 may not completely cover the first conductive layer 201, and the organic light emitting layer 213 and the planarization layer 210 are formed with a first notch communicating with the receiving cavity 207 in the first contact hole.
Further, as shown in fig. 8, the cathode layer 214 is formed on the organic light emitting layer 213, and the cathode layer 214 is electrically connected to the second region 206 of the first conductive layer 201 through the first gap.
In particular, the cathode layer 214 may be interrupted at the receiving cavity 207, the cathode layer 214 extending into the first indentation to electrically connect with the first electrically conductive layer 201 not covered by the organic light emitting layer 213. As shown in fig. 8, the second region 206 of the first conductive layer 201 and the flat layer 210 form the accommodating cavity 207, and the cathode layer 214 is electrically connected to the second region 206 of the first conductive layer 201 through the first gap in the accommodating cavity 207. Specifically, the organic light emitting layer is evaporated on the pixel defining layer at a first set angle; the cathode layer is evaporated on the organic light-emitting layer at a second set angle; the first set angle is different from the second set angle, so that the coverage of the cathode layer 214 on the first conductive layer 201 is larger than the coverage of the organic light emitting layer 213 on the first conductive layer 201, which ensures that the cathode layer 214 extends into the first gap to be electrically connected with the first conductive layer 201 uncovered by the organic light emitting layer 213.
In a specific implementation manner of the display panel provided in the embodiment of the invention, the cathode layer 214 and the planarization layer 210 form a second notch 209 in the first contact hole, the second notch communicating with the accommodating cavity 207. Subsequently, through an encapsulation process, the encapsulation material enters the accommodating cavity 207 from the second notch 209, and the accommodating cavity 207 is filled.
In a specific implementation manner, in the display panel provided by the embodiment of the present invention, the height of the accommodating cavity 207 is greater than the sum of the thicknesses of the cathode layer 214 and the organic light emitting layer 213. By controlling the height of the receiving cavity 207, the receiving cavity 207 formed between the second region 206 of the first conductive layer 201 and the planarization layer 210 can simultaneously receive the organic light emitting layer 213 and the cathode layer 214, thereby ensuring that the cathode layer 214 can extend into the first gap to be electrically connected to the first conductive layer 201 not covered by the organic light emitting layer 213.
In a specific implementation manner, in the display panel provided in the embodiment of the invention, as shown in fig. 9, the first conductive layer 201 is not covered with the planarization layer 210, so that the area of the second region 206 of the first conductive layer 201 can be increased, that is, the area of the first conductive layer 201 exposed by the accommodating cavity 207 can be increased, thereby facilitating the electrical connection between the cathode layer 214 and the first conductive layer 201 which is not covered by the organic light emitting layer 213.
In summary, the application provides a display panel and a manufacturing method thereof, an accommodating cavity is formed below a flat layer, and a first notch communicated with the accommodating cavity is formed between an organic light emitting layer and the flat layer, so that a cathode layer is connected with an auxiliary electrode layer uncovered by the organic light emitting layer through the first notch, effective electrical connection between the cathode layer and the auxiliary electrode layer is realized, an effect of improving current drop of the display panel is achieved, and brightness uniformity of the display panel can be improved. Meanwhile, the second conducting layer and the anode layer are made of the same material, so that when the anode layer is etched, the second conducting layer is etched and removed at the same time, the accommodating cavity is formed, the process can be simplified, and the cost is saved.
In summary, although the present invention has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, therefore, the scope of the present invention shall be determined by the appended claims.
Claims (10)
1. A method for manufacturing a display panel, comprising:
providing a substrate base plate;
preparing a thin film transistor layer, an auxiliary electrode layer and a flat layer on the substrate in sequence, and forming a first contact hole exposing the auxiliary electrode layer on the flat layer, wherein the auxiliary electrode layer comprises a first conductive layer and a second conductive layer which are stacked in sequence;
preparing an anode layer, and removing the second conductive layer while etching the anode layer pattern; the first conductive layer comprises a first area exposed to the first contact hole and a second area covered by an orthographic projection of the flat layer on the first conductive layer; the second area and the flat layer form an accommodating cavity;
preparing a pixel defining layer, wherein an opening communicated with the first contact hole is formed in the pixel defining layer corresponding to the first contact hole;
preparing an organic light-emitting layer, wherein the organic light-emitting layer covers the first area of the first conductive layer, and a first notch communicated with the accommodating cavity is formed in the organic light-emitting layer and the flat layer in the first contact hole;
preparing a cathode layer, wherein the cathode layer is electrically connected with the second area of the first conducting layer through the first notch.
2. The method for manufacturing a display panel according to claim 1, wherein the first conductive layer and the second conductive layer are formed by using the same mask, and orthogonal projections of the first conductive layer and the second conductive layer on the substrate are overlapped.
3. The method for manufacturing a display panel according to claim 1, wherein materials of the first conductive layer and the second conductive layer are different from each other.
4. The method for manufacturing a display panel according to claim 3, wherein the second conductive layer is made of the same material as the anode layer.
5. The method for manufacturing a display panel according to claim 4, wherein a thickness of the second conductive layer is larger than a sum of thicknesses of the cathode layer and the organic light emitting layer.
6. The method for manufacturing a display panel according to any one of claims 1 to 5, wherein the organic light emitting layer is evaporated on the pixel defining layer at a first set angle; evaporating the cathode layer on the organic light-emitting layer at a second set angle; the first set angle is different from the second set angle.
7. A display panel, comprising:
the thin film transistor structure comprises a substrate, and a thin film transistor layer, a first conductive layer and a flat layer which are sequentially formed on the substrate;
a first contact hole formed on the planarization layer and exposing the first conductive layer; the first conductive layer comprises a first area exposed to the first contact hole and a second area covered by an orthographic projection of the flat layer on the first conductive layer; the second area of the first conducting layer and the flat layer form an accommodating cavity;
the pixel definition layer is positioned above the flat layer, and an opening communicated with the first contact hole is formed in the pixel definition layer corresponding to the first contact hole;
the organic light-emitting layer is formed on the pixel defining layer and covers the first area of the first conducting layer, and a first gap communicated with the accommodating cavity is formed in the first contact hole by the organic light-emitting layer and the flat layer;
the cathode layer is electrically connected with the second area of the first conducting layer through the first notch.
8. The display panel of claim 7, wherein the display panel further comprises an anode layer, wherein a second contact hole exposing the source electrode in the thin film transistor layer is formed on the planarization layer, and the anode layer is connected to the source electrode through the second contact hole.
9. The display panel of claim 8, wherein a height of the receiving cavity is greater than a sum of thicknesses of the cathode layer and the organic light emitting layer.
10. The display panel according to any one of claims 7 to 9, wherein the organic light emitting layer is evaporated on the pixel defining layer at a first set angle; the cathode layer is evaporated on the organic light-emitting layer at a second set angle; the first set angle is different from the second set angle.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110284332.7A CN113097408B (en) | 2021-03-17 | 2021-03-17 | Display panel and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110284332.7A CN113097408B (en) | 2021-03-17 | 2021-03-17 | Display panel and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113097408A true CN113097408A (en) | 2021-07-09 |
| CN113097408B CN113097408B (en) | 2022-08-23 |
Family
ID=76668694
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110284332.7A Active CN113097408B (en) | 2021-03-17 | 2021-03-17 | Display panel and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113097408B (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114583081A (en) * | 2022-02-24 | 2022-06-03 | 深圳市华星光电半导体显示技术有限公司 | Display panel and preparation method thereof |
| WO2023087335A1 (en) * | 2021-11-16 | 2023-05-25 | 深圳市华星光电半导体显示技术有限公司 | Display panel and preparation method therefor |
| WO2023097772A1 (en) * | 2021-12-02 | 2023-06-08 | 惠州华星光电显示有限公司 | Manufacturing method for display panel and display panel |
| CN116782712A (en) * | 2023-08-24 | 2023-09-19 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display device |
| WO2023173467A1 (en) * | 2022-03-18 | 2023-09-21 | 深圳市华星光电半导体显示技术有限公司 | Oled display panel and manufacturing method therefor |
Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108231836A (en) * | 2016-12-09 | 2018-06-29 | 乐金显示有限公司 | Organic light-emitting display device and its manufacturing method |
| CN108538890A (en) * | 2018-04-20 | 2018-09-14 | 深圳市华星光电技术有限公司 | A kind of organic light-emitting display device |
| CN108962955A (en) * | 2018-07-23 | 2018-12-07 | 深圳市华星光电半导体显示技术有限公司 | Oled panel and preparation method thereof |
| CN109671739A (en) * | 2017-10-16 | 2019-04-23 | 乐金显示有限公司 | Large area organic light emitting diode display |
| US20190165305A1 (en) * | 2017-11-28 | 2019-05-30 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Oled display panel and manufacturing method thereof |
| CN110047886A (en) * | 2019-04-11 | 2019-07-23 | 深圳市华星光电半导体显示技术有限公司 | A kind of organic light emitting diode display and preparation method thereof |
| CN110071225A (en) * | 2019-04-08 | 2019-07-30 | 深圳市华星光电半导体显示技术有限公司 | Display panel and production method |
| CN110311056A (en) * | 2019-07-26 | 2019-10-08 | 京东方科技集团股份有限公司 | Display panel and preparation method thereof, display device |
| CN110911461A (en) * | 2019-11-26 | 2020-03-24 | 深圳市华星光电半导体显示技术有限公司 | OLED display panel and manufacturing method thereof |
| CN111276527A (en) * | 2020-02-20 | 2020-06-12 | 深圳市华星光电半导体显示技术有限公司 | Display panel and manufacturing method thereof |
| CN111969034A (en) * | 2020-09-03 | 2020-11-20 | 深圳市华星光电半导体显示技术有限公司 | Display panel and preparation method thereof |
| CN112164755A (en) * | 2020-09-16 | 2021-01-01 | 深圳市华星光电半导体显示技术有限公司 | Manufacturing method of organic light-emitting diode display and display |
| US20210028197A1 (en) * | 2019-07-23 | 2021-01-28 | Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Method of manufacturing display panel, display panel, and display device |
-
2021
- 2021-03-17 CN CN202110284332.7A patent/CN113097408B/en active Active
Patent Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108231836A (en) * | 2016-12-09 | 2018-06-29 | 乐金显示有限公司 | Organic light-emitting display device and its manufacturing method |
| CN109671739A (en) * | 2017-10-16 | 2019-04-23 | 乐金显示有限公司 | Large area organic light emitting diode display |
| US20190165305A1 (en) * | 2017-11-28 | 2019-05-30 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Oled display panel and manufacturing method thereof |
| CN108538890A (en) * | 2018-04-20 | 2018-09-14 | 深圳市华星光电技术有限公司 | A kind of organic light-emitting display device |
| CN108962955A (en) * | 2018-07-23 | 2018-12-07 | 深圳市华星光电半导体显示技术有限公司 | Oled panel and preparation method thereof |
| CN110071225A (en) * | 2019-04-08 | 2019-07-30 | 深圳市华星光电半导体显示技术有限公司 | Display panel and production method |
| CN110047886A (en) * | 2019-04-11 | 2019-07-23 | 深圳市华星光电半导体显示技术有限公司 | A kind of organic light emitting diode display and preparation method thereof |
| US20210028197A1 (en) * | 2019-07-23 | 2021-01-28 | Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Method of manufacturing display panel, display panel, and display device |
| CN110311056A (en) * | 2019-07-26 | 2019-10-08 | 京东方科技集团股份有限公司 | Display panel and preparation method thereof, display device |
| CN110911461A (en) * | 2019-11-26 | 2020-03-24 | 深圳市华星光电半导体显示技术有限公司 | OLED display panel and manufacturing method thereof |
| CN111276527A (en) * | 2020-02-20 | 2020-06-12 | 深圳市华星光电半导体显示技术有限公司 | Display panel and manufacturing method thereof |
| CN111969034A (en) * | 2020-09-03 | 2020-11-20 | 深圳市华星光电半导体显示技术有限公司 | Display panel and preparation method thereof |
| CN112164755A (en) * | 2020-09-16 | 2021-01-01 | 深圳市华星光电半导体显示技术有限公司 | Manufacturing method of organic light-emitting diode display and display |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023087335A1 (en) * | 2021-11-16 | 2023-05-25 | 深圳市华星光电半导体显示技术有限公司 | Display panel and preparation method therefor |
| WO2023097772A1 (en) * | 2021-12-02 | 2023-06-08 | 惠州华星光电显示有限公司 | Manufacturing method for display panel and display panel |
| CN114583081A (en) * | 2022-02-24 | 2022-06-03 | 深圳市华星光电半导体显示技术有限公司 | Display panel and preparation method thereof |
| CN114583081B (en) * | 2022-02-24 | 2024-06-18 | 深圳市华星光电半导体显示技术有限公司 | Display panel and preparation method thereof |
| WO2023173467A1 (en) * | 2022-03-18 | 2023-09-21 | 深圳市华星光电半导体显示技术有限公司 | Oled display panel and manufacturing method therefor |
| CN116782712A (en) * | 2023-08-24 | 2023-09-19 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display device |
| CN116782712B (en) * | 2023-08-24 | 2023-11-28 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113097408B (en) | 2022-08-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN113097408B (en) | Display panel and preparation method thereof | |
| CN109360900B (en) | Display panel and manufacturing method thereof | |
| US10355061B2 (en) | Organic light emitting display device | |
| CN108511489B (en) | OLED display panel and preparation method thereof | |
| CN102969456B (en) | Organic light-emitting display device and manufacture method thereof | |
| CN110890406B (en) | Organic light-emitting display back plate, manufacturing method thereof and display device | |
| CN108461527B (en) | Organic electroluminescent display panel, manufacturing method thereof and display device | |
| CN110047886B (en) | Organic light emitting diode display and manufacturing method thereof | |
| CN110943112B (en) | Array substrate, preparation method thereof and display panel | |
| CN108831914B (en) | Organic light-emitting display panel, manufacturing method thereof and display device | |
| WO2016029601A1 (en) | Array substrate and manufacturing method therefor, and display apparatus | |
| CN110660839B (en) | Display panel and preparation method thereof | |
| WO2007114536A1 (en) | Organic electroluminescence device and method for manufacturing same | |
| CN112310306B (en) | Display panel and manufacturing method thereof | |
| KR20160016339A (en) | Organic light emitting display device | |
| US9230995B2 (en) | Array substrate, manufacturing method thereof and display device | |
| US20080048191A1 (en) | Organic light emitting display device and method of fabricating the same | |
| KR20150067974A (en) | Organic electro luminescent device and method of fabricating the same | |
| JP4197259B2 (en) | Method for manufacturing organic EL display device and vapor deposition mask | |
| US20220399433A1 (en) | Display Substrate and Display Apparatus | |
| CN114695494A (en) | OLED display panel and manufacturing method thereof | |
| CN114171566A (en) | Display panel and manufacturing method thereof | |
| KR20130024091A (en) | Oxide thin film transistor and method for fabricating organic light emitting display device using the same | |
| KR100599469B1 (en) | Organic light emitting diode and manufacturing method thereof | |
| KR100712287B1 (en) | flat panel display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |