CN113096584A - Pixel circuit and driving method thereof - Google Patents

Pixel circuit and driving method thereof Download PDF

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Publication number
CN113096584A
CN113096584A CN202110397659.5A CN202110397659A CN113096584A CN 113096584 A CN113096584 A CN 113096584A CN 202110397659 A CN202110397659 A CN 202110397659A CN 113096584 A CN113096584 A CN 113096584A
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China
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voltage
driving
terminal
circuit
compensation
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CN202110397659.5A
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CN113096584B (en
Inventor
王贤军
王雅榕
张哲嘉
张竞文
范振峰
张琬珩
苏松宇
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AU Optronics Corp
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AU Optronics Corp
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen

Abstract

The invention provides a pixel circuit and a driving method thereof. In the pixel circuit, the driving transistor has a driving end and a first end coupled to a first system voltage. The initialization circuit adjusts the voltage levels of the input end and the driving end according to the previous stage grid driving signal. The data writing circuit provides a data voltage to the input end according to the grid driving signal. The voltage compensation circuit adjusts the voltage level of the driving end according to the compensation control signal. The light emitting element has a cathode terminal and an anode terminal coupled to a second system voltage. The light-emitting control circuit controls the light-emitting state of the light-emitting element according to the light-emitting control signal. The enabling time of the compensation control signal is between the falling edge of the previous stage grid driving signal and the rising edge of the grid driving signal.

Description

Pixel circuit and driving method thereof
Technical Field
The present invention relates to a display device, and more particularly, to a pixel circuit and a driving method thereof.
Background
In a display device, when a process is varied, a Threshold Voltage (Threshold Voltage) of a driving transistor in a pixel circuit is prone to drift, so that an unexpected change occurs in a current flowing through a light emitting element, and further, an emission luminance of a display panel is unstable, thereby affecting a quality of a display image.
In the conventional pixel circuit, the compensation operation for the threshold voltage of the driving transistor is usually started during the period when the gate driving signal is enabled. However, when the display device operates at a high resolution (or a high frequency), the enabling time of the gate driving signal is very limited, so the compensation time for compensating the threshold voltage of the pixel circuit is too short, and the compensation effect of the pixel circuit cannot be optimized. Therefore, how to improve the effect of the threshold voltage on the quality of the display screen will be an important issue for those skilled in the art.
Disclosure of Invention
The invention provides a pixel circuit and a driving method thereof, which can increase the compensation time of the critical voltage of a driving transistor by adjusting the enabling time of a compensation control signal, thereby effectively improving the quality of a display picture.
A pixel circuit of the present invention includes a driving transistor, an initialization circuit, a data writing circuit, a voltage compensation circuit, a light emitting element, and a first light emission control circuit. The driving transistor has a driving end and a first end coupled to a first system voltage. The initialization circuit is coupled to the input end and the driving end and adjusts voltage levels of the input end and the driving end according to a previous stage grid driving signal. The data writing circuit is coupled to the input end and provides a data voltage to the input end according to the grid driving signal. The voltage compensation circuit is coupled to the input end and the driving end and adjusts the voltage level of the driving end according to the compensation control signal. The light emitting element has a cathode terminal and an anode terminal coupled to a second system voltage. The first light-emitting control circuit is coupled to the cathode terminal of the light-emitting element, the voltage compensation circuit and the second terminal of the driving transistor, and controls the light-emitting state of the light-emitting element according to the light-emitting control signal, wherein the enabling time of the compensation control signal is between the falling edge of the previous stage of the gate driving signal and the rising edge of the gate driving signal.
The driving method of a pixel circuit of the present invention includes: providing a driving transistor having a driving end, a first end and a second end; providing an initialization circuit to adjust the voltage levels of the input end and the driving end according to the previous stage grid driving signal; providing a data writing circuit to provide a data voltage to the input end according to the grid driving signal; providing a voltage compensation circuit to adjust the voltage level of the driving end according to the compensation control signal; providing a light emitting element having a cathode terminal and an anode terminal; and providing a first light-emitting control circuit to control the light-emitting state of the light-emitting element according to the light-emitting control signal, wherein the enabling time of the compensation control signal is between the falling edge of the previous stage gate driving signal and the rising edge of the gate driving signal.
The pixel circuit of the present invention includes a driving transistor, an initialization circuit, a data writing circuit, a voltage compensation circuit, a light emitting element, and a light emission control circuit. The driving transistor has a driving end and a first end coupled to a first system voltage. The initialization circuit is coupled to the input terminal and the driving terminal and is used for adjusting the voltage levels of the input terminal and the driving terminal according to the gate driving signal and the previous stage gate driving signal based on the reference voltage. The data writing circuit is coupled to the input end and provides a data voltage to the input end according to the grid driving signal. The voltage compensation circuit is coupled to the initialization circuit and used for adjusting the voltage level of the driving end in the compensation stage according to the gate driving signal and the previous stage gate driving signal. The light emitting element has a cathode terminal and an anode terminal coupled to a second system voltage. The light-emitting control circuit is coupled to the cathode end of the light-emitting element, the voltage compensation circuit and the second end of the driving transistor, and controls the light-emitting state of the light-emitting element according to the control signal, wherein the compensation stage is between the falling edge of the previous stage gate driving signal and the rising edge of the gate driving signal.
The driving method of a pixel circuit of the present invention includes: providing a driving transistor having a driving end, a first end and a second end; providing an initialization circuit to adjust the voltage levels of the input end and the driving end based on the reference voltage and according to the gate driving signal and the preceding stage gate driving signal; providing a data writing circuit to provide a data voltage to the input end according to the grid driving signal; providing a voltage compensation circuit to adjust the voltage level of the driving end according to the grid driving signal and the preceding stage grid driving signal in the compensation stage; providing a light emitting element having a cathode terminal and an anode terminal; and providing a light-emitting control circuit to control the light-emitting state of the light-emitting element according to the control signal, wherein the compensation stage is between the falling edge of the previous stage of the gate driving signal and the rising edge of the gate driving signal.
In view of the above, the pixel circuit according to the embodiments of the invention can set the enabling time of the compensation control signal to be between the falling edge of the previous gate driving signal and the rising edge of the gate driving signal, so as to serve as the compensation time for compensating the threshold voltage of the driving transistor. Therefore, compared with the prior pixel circuit which can only compensate the critical voltage of the driving transistor in the limited enabling period of the grid driving signal, the pixel circuit of the invention can increase the compensating time of the critical voltage of the driving transistor by prolonging the enabling time of the compensating control signal, thereby effectively improving the quality of the display picture.
Drawings
Fig. 1 is a schematic diagram of a pixel circuit according to an embodiment of the invention.
Fig. 2A to 2G are circuit diagrams of the pixel circuit according to the embodiment of fig. 1, illustrating the pixel circuit according to different embodiments of the invention.
Fig. 3 is a waveform diagram of the pixel circuit of fig. 2A to 2G according to an embodiment of the invention.
Fig. 4 is a waveform diagram illustrating another embodiment of the pixel circuit of fig. 2A to 2G according to the present invention.
Fig. 5 is a schematic diagram of a pixel circuit according to another embodiment of the invention.
Fig. 6A to 6B are circuit diagrams of the pixel circuit according to the embodiment of fig. 5, which illustrate the pixel circuit according to different embodiments of the present invention.
Fig. 7 is a waveform diagram of the pixel circuit of fig. 6A-6B according to the present invention.
Fig. 8 is a circuit diagram of a pixel circuit according to the embodiment of fig. 5, illustrating a pixel circuit according to a different embodiment of the invention.
Fig. 9 is a waveform schematic diagram of the pixel circuit of fig. 8 according to the present invention.
Fig. 10 is a circuit diagram of a pixel circuit according to the embodiment of fig. 5, illustrating a pixel circuit according to a different embodiment of the invention.
Fig. 11 is a waveform schematic diagram of the pixel circuit of fig. 10 according to the present invention.
Fig. 12 is a flow chart of a driving method of the pixel circuit of fig. 1 according to the embodiment of the invention.
Fig. 13 is a flowchart of a driving method of the pixel circuit of fig. 5 according to the embodiment of the invention.
Description of reference numerals:
100-1300: pixel circuit
110-1310: initialization circuit
120-1320: voltage compensation circuit
130-1330: data write circuit
140 to 1340: light emission control circuit
450 to 850: leakage current compensation circuit
460 to 860: light emission control circuit
C1: capacitor with a capacitor element
CS: control signal
EM: light emission control signal
EL: light emitting element
ID: conducting current
PIN: input terminal
PD: drive end
RN: compensating control signals
SN: gate drive signal
SN-m: preceding stage gate drive signal
SN + i: back stage gate drive signal
S1210-S1260, S1310-S1360: step (ii) of
T1-T8: transistor with a metal gate electrode
TD: driving transistor
TDA: data writing phase
TE: stage of luminescence
TR: reset phase
TC: compensation phase
VGH: high voltage of gate
VDATA: data voltage
VREF: reference voltage
VDD, VSS: system voltage
VREF: reference voltage
Detailed Description
The term "coupled" as used throughout this disclosure, including the claims, may refer to any direct or indirect connection means. For example, if a first device couples (or connects) to a second device, it should be construed that the first device may be directly connected to the second device or the first device may be indirectly connected to the second device through some other device or some connection means. Further, wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts. Elements/components/steps in different embodiments using the same reference numerals or using the same terms may be referred to one another in relation to the description.
Fig. 1 is a schematic diagram of a pixel circuit 100 according to an embodiment of the invention. Referring to fig. 1, the pixel circuit 100 includes a driving transistor TD, an initialization circuit 110, a voltage compensation circuit 120, a data writing circuit 130, a light-emitting control circuit 140, and a light-emitting element EL. The anode terminal of the light emitting element EL is coupled to the system voltage VDD, and the cathode terminal of the light emitting element EL is coupled to the light emission control circuit 140. The light emitting element EL can be correspondingly lighted according to the on current ID. The Light Emitting element EL of the present embodiment may be, for example, an Organic Light Emitting Diode (OLED), a Light Emitting Diode (LED) or other Light Emitting elements, which is not limited in the invention.
A first terminal (i.e., a source terminal) of the driving transistor TD is coupled to the system voltage VSS, a second terminal (i.e., a drain terminal) of the driving transistor TD is coupled to the light-emitting control circuit 140, and a driving terminal PD (i.e., a gate terminal) of the driving transistor TD is coupled to the voltage compensation circuit 120. The system voltage VDD of the present embodiment may be a system high voltage, the system voltage VSS may be a system low voltage, and a voltage value of the system voltage VDD may be greater than a voltage value of the system voltage VSS.
The initialization circuit 110 is coupled to the input PIN and the driving terminal PD. The initialization circuit 110 is configured to adjust the voltage levels of the input terminal PN and the driving terminal PD according to the previous gate driving signal SN-m. The voltage compensation circuit 120 is coupled to the input PIN and the driving terminal PD. The voltage compensation circuit 120 can adjust the voltage level of the driving terminal PD according to the voltage at the input terminal PIN and/or the compensation control signal RN.
On the other hand, the data write circuit 130 is coupled to the input terminal PIN. The data writing circuit 130 is configured to provide the data voltage VDATA to the input PIN according to the gate driving signal SN. The light-emitting control circuit 140 is coupled to the cathode terminal of the light-emitting element EL, the voltage compensation circuit 120 and the second terminal of the driving transistor TD. The emission control circuit 140 can control the emission state of the light emitting element EL according to the emission control signal EM.
Particularly, in the present embodiment, the gate driving signal SN, the previous stage gate driving signal SN-m, the compensation control signal RN, and the emission control signal EM may be generated by a control signal generator (not shown). The control signal generator (not shown) may be implemented by three sets of Gate-Driver-on-Array (GOA) circuits. In other words, since the present embodiment can control the pixel circuit 100 by only three sets of GOA circuits, the entire area can be effectively saved.
In addition, in the present embodiment, the gate driving signal SN may be an nth-level gate driving signal generated by a GOA circuit (not shown), and the previous-level gate driving signal SN-m may be an nth-m-level gate driving signal generated by the GOA circuit (not shown). The N and m may be positive integers greater than 1, and may be determined according to design requirements of the pixel circuit 100, which is not limited in the invention.
For the operation of the pixel circuit 100, specifically, when the pixel circuit 100 operates in the compensation phase of a pixel period, the voltage compensation circuit 120 can adjust the voltage level of the driving terminal PD of the driving transistor TD according to the voltage at the input terminal PIN and/or the pulled-up compensation control signal RN, thereby compensating the threshold voltage of the driving transistor TD.
It should be noted that the pixel circuit 100 can improve the compensation effect of the threshold voltage of the driving transistor TD by adjusting the previous stage gate driving signal SN-m and the compensation control signal RN. For example, in the present embodiment, the enabling time of the compensation control signal RN received by the voltage compensation circuit 120 can be set to be between the falling edge of the previous gate driving signal SN-m and the rising edge of the gate driving signal SN.
Further, the pixel circuit 100 may continue to set the compensation control signal RN to the enabled state (e.g., high voltage level) after the previous stage of the gate driving signal SN-m (i.e., the nth stage of the gate driving signal) is converted from the enabled state to the disabled state (e.g., from the high voltage level to the low voltage level) until the gate driving signal SN (i.e., the nth stage of the gate driving signal) is to be converted from the disabled state to the enabled state (e.g., from the low voltage level to the high voltage level).
That is, the present embodiment may use a time interval between a falling edge of the previous stage gate driving signal SN-m and a rising edge of the gate driving signal SN as a compensation time for compensating the threshold voltage of the driving transistor TD. Therefore, compared to the conventional pixel circuit that can only compensate the threshold voltage of the driving transistor in the limited enabling period of the gate driving signal, the pixel circuit 100 of the present embodiment can increase the compensation time for the threshold voltage of the driving transistor TD by lengthening the enabling time of the compensation control signal RN, thereby effectively improving the quality of the display.
Fig. 2A to 2G are circuit diagrams of the pixel circuit 100 according to the embodiment of fig. 1, illustrating pixel circuits 200 to 800 according to different embodiments of the invention. Referring to fig. 2A, the pixel circuit 200 includes a driving transistor TD, an initialization circuit 210, a voltage compensation circuit 220, a data writing circuit 230, a light-emitting control circuit 240, and a light-emitting element EL.
The initialization circuit 210 includes transistors T1-T2. A first terminal (i.e., a source terminal) of the transistor T1 is coupled to the input PIN, and a second terminal (i.e., a drain terminal) and a control terminal (i.e., a gate terminal) of the transistor T1 may commonly receive the previous stage of the gate driving signal SN-m. The transistor T1 may be connected in a Diode configuration (Diode Connection) to form a Diode. A first terminal (i.e., a source terminal) of the transistor T2 is coupled to the driving terminal PD, a second terminal (i.e., a drain terminal) of the transistor T2 is coupled to the system voltage VDD and an anode terminal of the light emitting element EL, and a control terminal (i.e., a gate terminal) of the transistor T2 may receive the previous stage gate driving signal SN-m.
The voltage compensation circuit 220 includes transistors T3-T4 and a capacitor C1. The first terminal (i.e., the source terminal) of the transistor T3 is coupled to the driving terminal PD, the second terminal (i.e., the drain terminal) of the transistor T3 is coupled to the second terminal of the driving transistor TD, and the control terminal (i.e., the gate terminal) of the transistor T3 receives the compensation control signal RN. A first terminal (i.e., a source terminal) of the transistor T4 is coupled to the reference voltage VREF, a second terminal (i.e., a drain terminal) of the transistor T4 is coupled to the input terminal PIN, and a control terminal (i.e., a gate terminal) of the transistor T4 receives the compensation control signal RN. The first terminal of the capacitor C1 is coupled to the input PIN, and the second terminal of the capacitor C1 is coupled to the driving terminal PD.
The data writing circuit 230 includes a transistor T5. A first terminal (i.e., a source terminal) of the transistor T5 is coupled to the input PIN, a second terminal (i.e., a drain terminal) of the transistor T5 receives the data voltage VDATA, and a control terminal (i.e., a gate terminal) of the transistor T5 receives the gate driving signal SN.
The light emission control circuit 240 includes a transistor T6. A first terminal (i.e., a source terminal) of the transistor T6 is coupled to the second terminal of the driving transistor TD, a second terminal (i.e., a drain terminal) of the transistor T6 is coupled to the cathode terminal of the light emitting element EL, and a control terminal (i.e., a gate terminal) of the transistor T6 receives the light emission control signal EM.
A first terminal of the driving transistor TD is coupled to the system voltage VSS, a second terminal of the driving transistor TD is coupled to the first terminal of the transistor T6, and a driving terminal PD of the driving transistor TD is coupled to the second terminal of the capacitor C1.
FIG. 3 is a waveform diagram illustrating an embodiment of the pixel circuits 200-800 of FIGS. 2A-2G according to the invention. For details of the operation of the pixel circuit 200, please refer to fig. 2A and fig. 3. In detail, when the pixel circuit 200 operates in the reset period TR, the previous stage gate driving signal SN-m may be set to an enabled state (e.g., a high voltage level), and the emission control signal EM, the gate driving signal SN, and the compensation control signal RN may be set to a disabled state (e.g., a low voltage level).
In this case, the transistor T1 of the initialization circuit 210 can provide the gate high voltage VGH to the input PIN according to the pulled-up previous gate driving signal SN-m, and the transistor T2 of the initialization circuit 210 can provide the system voltage VDD (i.e., the system high voltage) to the driving terminal PD according to the pulled-up previous gate driving signal SN-m. Therefore, the initialization circuit 210 can pull up the voltage levels of the input PIN and the driving terminal PD to perform the reset operation on the input PIN and the driving terminal PD, and turn on the driving transistor TD, thereby ensuring that the subsequent compensation operation can be performed smoothly.
On the other hand, when the pixel circuit 200 operates in the compensation phase TC, the compensation control signal RN may be set to an enabled state (e.g., a high voltage level), and the emission control signal EM, the previous stage gate driving signal SN-m, and the gate driving signal SN may be set to a disabled state (e.g., a low voltage level).
In this case, the voltage compensation circuit 220 may provide the reference voltage VREF to the input PIN according to the compensation control signal RN being pulled up, and adjust the voltage level of the driving terminal PD to the sum of the voltage value of the system voltage VSS and the voltage value of the threshold voltage VTH of the driving transistor TD (i.e., VSS + VTH (where VSS is the voltage value of the system voltage VSS; VTH is the voltage value of the threshold voltage of the driving transistor TD)).
Then, when the pixel circuit 200 operates in the data writing period TDA, the gate driving signal SN may be set to an enabled state (e.g., a high voltage level), and the emission control signal EM, the previous stage gate driving signal SN-m, and the compensation control signal RN may be set to a disabled state (e.g., a low voltage level).
In this case, the data writing circuit 230 may provide the data voltage VDATA to the input terminal PIN according to the pulled-up gate driving signal SN. At the same time, the voltage compensation circuit 220 may further raise the voltage level of the driving terminal PD to a voltage value of VSS + VTH + Δ V by the coupling effect of the capacitor C1, where Δ V is a variation amount of the voltage value when the input terminal PIN operates between the reset phase TR and the compensation phase TC (i.e., VDATA-VREF (where VDATA is a voltage value of the data voltage VDATA; VREF is a voltage value of the reference voltage VREF)).
On the other hand, when the pixel circuit 200 operates in the light-emitting period TE, the light-emitting control signal EM may be set to an enabled state (e.g., a high voltage level), and the previous gate driving signal SN-m, the gate driving signal SN, and the compensation control signal RN may be set to a disabled state (e.g., a low voltage level).
In this operation, the voltage level of the driving terminal PD of the driving transistor TD may be maintained at the voltage level (i.e., VSS + VTH + (VDATA-VREF)) during the data writing period TDA. Therefore, when the pixel circuit 200 is operated in the light-emitting period TE and the driving transistor TD is operated in the saturation region, the driving transistor TD can generate the on-current ID, thereby driving the light-emitting element EL. At this time, the on current ID flowing through the light emitting element EL can be represented by the following formula:
ID＝K((VSS+VTH+VDATA-VREF)-VSS)-VTH)2
wherein, the ID is the current value of the conducting current ID; k is a process parameter of the driving transistor TD; VSS is the voltage value of system voltage VSS; VTH is a voltage value of a threshold voltage VTH of the driving transistor TD; VDATA is a voltage value of the data voltage VDATA; VREF is the voltage value of the reference voltage VREF.
In other words, in the light-emitting period TE, the pixel circuit 200 can effectively eliminate the offset of the threshold voltage of the driving transistor TD caused by process variation. In addition, in the embodiment, since the enabling time of the compensation control signal RN is between the falling edge of the previous gate driving signal SN-m and the rising edge of the gate driving signal SN, the pixel circuit 200 can compensate the threshold voltage VTH of the driving transistor TD in the compensation period TC (or compensation time) for a long enough time, thereby improving the compensation effect of the pixel circuit 200.
Referring to fig. 2B, the pixel circuit 300 includes a driving transistor TD, an initialization circuit 310, a voltage compensation circuit 320, a data writing circuit 330, a light-emitting control circuit 340, and a light-emitting element EL. The pixel circuit 300 is substantially the same as or similar to the pixel circuit 200, wherein the same or similar elements are given the same or similar reference numerals. Unlike the embodiment of fig. 2A, in the initialization circuit 310, the first terminal of the transistor T2 is coupled to the driving terminal PD, and the second terminal and the control terminal of the transistor T2 can commonly receive the previous stage of the gate driving signal SN-m.
In other words, in the embodiment shown in fig. 2B, when the pixel circuit 300 operates in the reset period TR (as shown in fig. 3), the transistor T2 of the initialization circuit 310 provides the gate high voltage VGH to the driving terminal PD according to the pulled-up previous stage gate driving signal SN-m to reset the driving terminal PD.
The details of the driving transistor TD, the initialization circuit 310, the voltage compensation circuit 320, the data writing circuit 330, the light-emitting control circuit 340, and the light-emitting element EL shown in fig. 2B during the reset phase TR, the compensation phase TC, the data writing phase TDA, and the light-emitting phase TE can be analogized with reference to the related description of fig. 2A, and therefore, the details are not repeated.
It should be noted that in the embodiment of fig. 2A and 2B, the pixels 200 and 300 can be formed by only 7 transistors, so that the pixels 200 and 300 can have the advantages of area saving and cost saving.
Referring to fig. 2C, the pixel circuit 400 includes a driving transistor TD, an initialization circuit 410, a voltage compensation circuit 420, a data writing circuit 430, a light-emitting control circuit 440, and a light-emitting element EL. The pixel circuit 400 is substantially the same or similar to the pixel circuits 200, 300, wherein the same or similar elements are given the same or similar reference numerals. Unlike the embodiment of fig. 2A and 2B, the pixel circuit 400 further includes a leakage current compensation circuit 450 and a light emission control circuit 460.
The light emission control circuit 460 includes a transistor T8. A first terminal (i.e., a source terminal) of the transistor T8 is coupled to the system voltage VSS, a second terminal (i.e., a drain terminal) of the transistor T8 is coupled to a first terminal of the driving transistor TD, and a control terminal (i.e., a gate terminal) of the transistor T8 receives the light emission control signal EM.
The leakage current compensating circuit 450 includes a transistor T7. The first terminal (i.e., the source terminal) of the transistor T7 is coupled to the first terminal of the transistor T8, the second terminal (i.e., the drain terminal) of the transistor T7 is coupled to the second terminal of the transistor T8, and the control terminal (i.e., the gate terminal) of the transistor T7 receives the compensation control signal RN.
For details of the operation of the pixel circuit 400, please refer to fig. 2C and fig. 3. In detail, when the pixel circuit 400 operates in the reset period TR, the transistor T1 of the initialization circuit 410 provides the gate high voltage VGH to the input terminal PIN according to the pulled-up previous gate driving signal SN-m, and the transistor T2 of the initialization circuit 410 provides the gate high voltage VGH to the driving terminal PD according to the pulled-up previous gate driving signal SN-m. Therefore, the initialization circuit 410 can pull up the voltage levels of the input PIN and the driving terminal PD to perform the reset operation on the input PIN and the driving terminal PD, and make the driving transistor TD turned on to ensure that the subsequent compensation operation can be performed smoothly.
On the other hand, when the pixel circuit 400 operates in the compensation phase TC, the voltage compensation circuit 420 provides the reference voltage VREF to the input terminal PIN according to the pulled-up compensation control signal RN, and adjusts the voltage level of the driving terminal PD to be the sum of the voltage value of the system voltage VSS and the voltage value of the threshold voltage VTH of the driving transistor TD (i.e., VSS + VTH).
It should be noted that, in order to avoid the pixel circuit 400 generating an excessive leakage current in the driving transistor TD during the compensation period of a long time, when the pixel circuit 400 operates in the compensation stage TC, the transistor T7 of the leakage current compensation circuit 450 can be turned on according to the compensation control signal RN being pulled high, thereby forming a leakage current leakage path. Therefore, the leakage current compensation circuit 450 can drain the leakage current generated by the driving transistor TD to the system voltage VSS (i.e. the system low voltage) through the leakage current drain path during the compensation phase TC. As such, the pixel circuit 400 of the present embodiment can effectively suppress the transient leakage current generated by the driving transistor TD.
Particularly, in order to avoid the excessive leakage current, in the design of the leakage current compensation circuit 450, the aspect ratio of the transistor T7 may be designed to be smaller than the aspect ratio of the transistor T8, but the invention is not limited thereto.
Then, when the pixel circuit 400 operates in the data writing period TDA, the data writing circuit 430 can provide the data voltage VDATA to the input terminal PIN according to the pulled-up gate driving signal SN. At the same time, the voltage compensation circuit 420 can further raise the voltage level of the driving terminal PD to a voltage value of VSS + VTH + Δ V by the coupling effect of the capacitor C1, where Δ V is a variation amount of the voltage value (i.e., VDATA-VREF) when the input terminal PIN operates between the reset phase TR and the compensation phase TC.
On the other hand, when the pixel circuit 400 operates in the light-emitting phase TE, the voltage level of the driving terminal PD of the driving transistor TD can be maintained at the voltage level (i.e., VSS + VTH + (VDATA-VREF)) in the data writing phase TDA. Therefore, when the pixel circuit 400 operates in the light-emitting period TE and the driving transistor TD operates in the saturation region, the driving transistor TD can generate the on-current ID, thereby driving the light-emitting element EL. At this time, the on current ID flowing through the light emitting element EL can be represented by the following formula:
ID＝K((VSS+VTH+VDATA-VREF)-VSS)-VTH)2
in other words, the pixel circuit 400 can also effectively eliminate the shift of the threshold voltage of the driving transistor TD caused by process variation during the light-emitting period TE. In addition, the pixel circuit 400 can also perform a compensation operation on the threshold voltage VTH of the driving transistor TD in the compensation phase TC (or compensation time) for a long enough time, thereby improving the compensation effect of the pixel circuit 400.
Referring to fig. 2D, the pixel circuit 500 includes a driving transistor TD, an initialization circuit 510, a voltage compensation circuit 520, a data writing circuit 530, light emitting control circuits 540 and 560, a leakage current compensation circuit 550, and a light emitting element EL. The pixel circuit 500 is substantially the same or similar to the pixel circuit 400, wherein the same or similar elements are given the same or similar reference numerals. Unlike the embodiment of fig. 2C, in the voltage compensation circuit 520, the first terminal of the transistor T4 is coupled to the second terminal of the transistor T7.
Referring to fig. 2D and fig. 3, details of the implementation of the pixel circuit 500 in the reset phase TR can be analogized with reference to the related description of fig. 2C, and thus are not repeated.
On the other hand, when the pixel circuit 500 operates in the compensation phase TC, the transistors T3, T4, T7 can be turned on according to the compensation control signal RN being pulled high. In this case, the transistors T4, T7 may supply the system voltage VSS to the input PIN through a conduction path. The voltage compensation circuit 520 and the leakage current compensation circuit 550 can adjust the voltage level of the driving terminal PD to the sum of the system voltage VSS and the threshold voltage VTH of the driving transistor TD (i.e., VSS + VTH) according to the pulled-up compensation control signal RN.
Similar to the embodiment shown in fig. 2C, in the present embodiment, the pixel circuit 500 can also leak the instantaneous leakage current generated by the driving transistor TD to the system voltage VSS (i.e., the system low voltage) through the leakage current leakage path formed by the leakage current compensation circuit 550 during the compensation phase TC.
Then, when the pixel circuit 500 operates in the data writing period TDA, the transistor T5 can be turned on according to the pulled-up gate driving signal SN. In this case, the data writing circuit 530 may provide the data voltage VDATA to the input terminal PIN according to the pulled-up gate driving signal SN. At the same time, the voltage compensation circuit 520 can further pull up the voltage level of the driving terminal PD to a voltage value of VDATA + VTH by the coupling effect of the capacitor C1.
On the other hand, when the pixel circuit 500 operates in the light-emitting period TE, the transistors T6 and T8 can be turned on according to the pulled-up light-emitting control signal EM. In this operation, the voltage level of the driving terminal PD of the driving transistor TD can be maintained at the voltage level (i.e., VDATA + VTH) in the data writing period TDA. Therefore, when the pixel circuit 500 operates in the light-emitting period TE and the driving transistor TD operates in the saturation region, the driving transistor TD can generate the on-current ID, thereby driving the light-emitting element EL. At this time, the on current ID flowing through the light emitting element EL can be represented by the following formula:
ID＝K((VDATA+VTH)-VSS)-VTH)2
in other words, in the light-emitting period TE, the pixel circuit 500 can also effectively eliminate the threshold voltage offset of the driving transistor TD caused by process variations. Moreover, the pixel circuit 500 can also perform a compensation operation on the threshold voltage VTH of the driving transistor TD in the compensation phase TC (or compensation time) for a long enough time, thereby improving the compensation effect of the pixel circuit 500.
Referring to fig. 2E, the pixel circuit 600 includes a driving transistor TD, an initialization circuit 610, a voltage compensation circuit 620, a data writing circuit 630, light emitting control circuits 640 and 660, a leakage current compensation circuit 650, and a light emitting device EL. The pixel circuit 600 is substantially the same or similar to the pixel circuit 500, wherein the same or similar elements are given the same or similar reference numerals. Unlike the embodiment shown in fig. 2D, in the initialization circuit 610, the first terminal of the transistor T2 is coupled to the driving terminal PD, the second terminal of the transistor T2 is coupled to the system voltage VDD, and the control terminal of the transistor T2 receives the previous stage gate driving signal SN-m.
In other words, in the embodiment shown in fig. 2E, when the pixel circuit 600 operates in the reset phase TR (as shown in fig. 3), the transistor T2 of the initialization circuit 610 provides the system voltage VDD (i.e. the system high voltage) to the driving terminal PD according to the pulled-up previous stage gate driving signal SN-m to reset the driving terminal PD.
The details of the driving transistor TD, the initialization circuit 610, the voltage compensation circuit 620, the data writing circuit 630, the light-emitting control circuits 640 and 660, the leakage current compensation circuit 650, and the light-emitting element EL shown in fig. 2E when operating in the reset phase TR, the compensation phase TC, the data writing phase TDA, and the light-emitting phase TE can be analogized with reference to the related description of fig. 2D, and therefore, the details are not repeated.
Referring to fig. 2F, the pixel circuit 700 includes a driving transistor TD, an initialization circuit 710, a voltage compensation circuit 720, a data writing circuit 730, light-emitting control circuits 740 and 760, a leakage current compensation circuit 750, and a light-emitting element EL. Wherein like or similar elements are provided with like or similar reference numerals. Unlike the embodiment of fig. 2D, in the leakage current compensation circuit 750, a first terminal of the transistor T7 is coupled to the input PIN, a second terminal of the transistor T7 is coupled to the reference voltage VREF, and a control terminal of the transistor T7 receives the compensation control signal RN.
Further, in the embodiment shown in fig. 2F, when the pixel circuit 700 operates in the compensation phase TC (as shown in fig. 3), the transistors T3, T4, T7 can be turned on according to the compensation control signal RN being pulled high. In this case, the leakage current compensation circuit 750 may provide the reference voltage VREF to the input PIN according to the raised compensation control signal RN, and the voltage compensation circuit 720 may adjust the voltage level of the driving terminal PD to the sum of the voltage value of the reference voltage VREF and the voltage value of the threshold voltage VTH of the driving transistor TD (i.e., VREF + VTH) according to the raised compensation control signal RN.
Similar to the embodiment shown in fig. 2D, the pixel circuit 700 can release the transient leakage current generated by the driving transistor TD to the reference voltage VREF through the leakage current release path formed by the transistor T7 of the leakage current compensation circuit 750 and the transistor T4 of the voltage compensation circuit 720 during the compensation phase TC.
The details of the driving transistor TD, the initialization circuit 710, the voltage compensation circuit 720, the data writing circuit 730, the light-emitting control circuits 740 and 760, the leakage current compensation circuit 750, and the light-emitting element EL shown in fig. 2F when operating in the reset phase TR, the compensation phase TC, the data writing phase TDA, and the light-emitting phase TE can be analogized with reference to the related description of fig. 2D, and therefore, the details are not repeated.
Referring to fig. 2G, the pixel circuit 800 includes a driving transistor TD, an initialization circuit 810, a voltage compensation circuit 820, a data writing circuit 830, light-emitting control circuits 840 and 860, a leakage current compensation circuit 850, and a light-emitting device EL. Wherein like or similar elements are provided with like or similar reference numerals. Unlike the embodiment of fig. 2C, in the initialization circuit 810, a first terminal of the transistor T2 is coupled to the driving terminal PD, a second terminal of the transistor T2 is coupled to the system voltage VDD, and a control terminal of the transistor T2 receives the previous stage gate driving signal SN-m.
In other words, in the embodiment shown in fig. 2G, when the pixel circuit 800 operates in the reset phase TR (as shown in fig. 3), the transistor T2 of the initialization circuit 810 provides the system voltage VDD (i.e. the system high voltage) to the driving terminal PD according to the pulled-up previous stage gate driving signal SN-m to reset the driving terminal PD.
The details of the driving transistor TD, the initialization circuit 810, the voltage compensation circuit 820, the data writing circuit 830, the light-emitting control circuits 840 and 860, the leakage current compensation circuit 850 and the light-emitting element EL shown in fig. 2G when operating in the reset phase TR, the compensation phase TC, the data writing phase TDA and the light-emitting phase TE can be analogized with the related description of fig. 2C, and therefore, the details are not repeated.
It is noted that, for the embodiments of fig. 1, 2A to 2G and 3, the compensation control signal RN received by each pixel circuit (e.g., the pixel circuits 100-800) may be set to an enabled state (e.g., a high voltage level) in the current Frame (Frame) according to some design requirements. That is, each pixel circuit can compensate the threshold voltage VTH of the driving transistor TD in the current frame.
On the other hand, referring to fig. 4, fig. 4 is a waveform diagram illustrating another embodiment of the pixel circuit of fig. 2A to 2G according to the invention. In other design requirements, each pixel circuit may also pre-enable the compensation control signal RN in a previous frame, so that the pixel circuit may pre-start the compensation operation on the threshold voltage VTH of the driving transistor TD in the previous frame. Therefore, the pixel circuit of the present embodiment can further extend the time interval of the compensation phase TC to improve the effect of the threshold voltage on the quality of the display image.
Fig. 5 is a schematic diagram of a pixel circuit 900 according to another embodiment of the invention. Referring to fig. 5, the pixel circuit 900 includes a driving transistor TD, an initialization circuit 910, a voltage compensation circuit 920, a data writing circuit 930, a light-emitting control circuit 940, and a light-emitting device EL. An anode terminal of the light emitting element EL is coupled to the system voltage VDD, and a cathode terminal of the light emitting element EL is coupled to the light emission control circuit 940. The light emitting element EL can be correspondingly lighted according to the on current ID.
A first terminal (i.e., a source terminal) of the driving transistor TD is coupled to the system voltage VSS, a second terminal (i.e., a drain terminal) of the driving transistor TD is coupled to the light-emitting control circuit 940, and a driving terminal PD (i.e., a gate terminal) of the driving transistor TD is coupled to the initialization circuit 910.
The initialization circuit 910 is coupled to the input PIN and the driving terminal PD. The initialization circuit 910 is configured to adjust the voltage levels of the input terminal PN and the driving terminal PD according to the gate driving signal SN and the previous stage gate driving signal SN-m based on the reference voltage VREF (or the system voltage VDD). The voltage compensation circuit 920 is coupled to the initialization circuit 920. The voltage compensation circuit 920 may be configured to adjust the voltage level of the driving terminal PD according to the gate driving signal SN and the previous stage gate driving signal SN-m in the compensation stage.
On the other hand, the data write circuit 930 is coupled to the input PIN. The data write circuit 930 is configured to provide the data voltage VDATA to the input PIN according to the gate driving signal SN. The light-emitting control circuit 940 is coupled to the cathode terminal of the light-emitting element EL, the voltage compensation circuit 920 and the second terminal of the driving transistor TD. The light-emitting control circuit 940 controls the light-emitting state of the light-emitting element EL according to the control signal CS.
It should be noted that the control signal CS of the present embodiment can be, for example, the gate driving signal SN, the emission control signal EM, or the post-stage gate driving signal SN + i. The control signal CS may be generated by a control signal generator (not shown), for example. The control signal generator (not shown) may be implemented by one or more GOA circuits.
For the operation of the pixel circuit 900, specifically, when the pixel circuit 900 operates in the compensation phase of a pixel period, the voltage compensation circuit 920 adjusts the voltage level of the driving end PD of the driving transistor TD according to the pulled-down gate driving signal SN and the previous stage gate driving signal SN-m, thereby compensating the threshold voltage of the driving transistor TD.
Further, in this embodiment, the compensation phase may be set to be between the falling edge of the previous gate driving signal SN-m and the rising edge of the gate driving signal SN. For example, the pixel circuit 900 may continue to perform the compensation operation for compensating the threshold voltage of the driving transistor TD after the previous stage gate driving signal SN-m is switched from the enabled state to the disabled state (e.g., from a high voltage level to a low voltage level) until the gate driving signal SN is to be switched from the disabled state to the enabled state (e.g., from a low voltage level to a high voltage level).
That is, the present embodiment may use a time interval between a falling edge of the previous stage gate driving signal SN-m and a rising edge of the gate driving signal SN as a compensation time for compensating the threshold voltage of the driving transistor TD. Therefore, compared to the conventional pixel circuit that can only compensate the threshold voltage of the driving transistor in the limited enabling period of the gate driving signal, the pixel circuit 900 of the present embodiment can increase the compensation time for the threshold voltage of the driving transistor TD by lengthening the operation time of the compensation stage, thereby effectively improving the quality of the display screen.
Fig. 6A to 6B are circuit diagrams illustrating the pixel circuits 1000 and 1100 according to different embodiments of the invention of the pixel circuit of the embodiment of fig. 5. Referring to fig. 6A, the pixel circuit 1000 includes a driving transistor TD, an initialization circuit 1010, a voltage compensation circuit 1020, a data writing circuit 1030, a light-emitting control circuit 1040, and a light-emitting element EL.
The initialization circuit 1010 includes transistors T1-T4 and a capacitor C1. The second terminal (i.e., the drain terminal) and the control terminal (i.e., the gate terminal) of the transistor T1 may commonly receive the previous stage of the gate driving signal SN-m. The transistor T1 may be connected in a diode configuration to form a diode. A first terminal (i.e., a source terminal) of the transistor T2 is coupled to a first terminal (i.e., a source terminal) of the transistor T1, a second terminal (i.e., a drain terminal) of the transistor T2 receives a previous stage gate driving signal SN-m, and a control terminal (i.e., a gate terminal) of the transistor T2 receives the gate driving signal SN.
A first terminal (i.e., a source terminal) of the transistor T3 is coupled to the input PIN, a second terminal (i.e., a drain terminal) of the transistor T3 is coupled to the reference voltage VREF, and a control terminal (i.e., a gate terminal) of the transistor T3 is coupled to the first terminal of the transistor T2. The first terminal (i.e., the source terminal) of the transistor T4 is coupled to the driving terminal PD, and the second terminal (i.e., the drain terminal) and the control terminal (i.e., the gate terminal) of the transistor T4 commonly receive the previous stage of the gate driving signal SN-m. The transistor T4 may be connected in a diode configuration to form a diode. The first terminal of the capacitor C1 is coupled to the input PIN, and the second terminal of the capacitor C1 is coupled to the driving terminal PD.
The voltage compensation circuit 1020 includes a transistor T5. A first terminal (i.e., a source terminal) of the transistor T5 is coupled to the driving terminal PD, a second terminal (i.e., a drain terminal) of the transistor T5 is coupled to the light emitting control circuit 1040, and a control terminal (i.e., a gate terminal) of the transistor T5 is coupled to the first terminal of the transistor T2.
The data write circuit 1030 includes a transistor T6. A first terminal (i.e., a source terminal) of the transistor T6 is coupled to the input PIN, a second terminal (i.e., a drain terminal) of the transistor T6 receives the data voltage VDATA, and a control terminal (i.e., a gate terminal) of the transistor T6 receives the gate driving signal SN.
The light emission control circuit 1040 includes a transistor T7. A first terminal (i.e., a source terminal) of the transistor T7 is coupled to the second terminal of the transistor T5, a second terminal (i.e., a drain terminal) of the transistor T7 is coupled to the cathode terminal of the light emitting element EL, and a control terminal (i.e., a gate terminal) of the transistor T7 receives the gate driving signal SN.
A first terminal of the driving transistor TD is coupled to the system voltage VSS, a second terminal of the driving transistor TD is coupled to the first terminal of the transistor T7, and a driving terminal PD of the driving transistor TD is coupled to the second terminal of the capacitor C1.
Fig. 7 is a waveform diagram of the pixel circuits 1000, 1100 of fig. 6A-6B according to the invention. For details of the operation of the pixel circuit 1000, please refer to fig. 6A and fig. 7 at the same time. In detail, when the pixel circuit 1000 operates in the reset phase TR, the previous stage gate driving signal SN-m may be set to an enabled state (e.g., a high voltage level), and the gate driving signal SN may be set to a disabled state (e.g., a low voltage level).
In this case, the transistor T1 of the initialization circuit 1010 can provide the gate high voltage VGH to the control terminal of the transistors T3 and T5 according to the pulled-up previous gate driving signal SN-m, so that the transistors T3 and T5 are turned on. Then, the transistor T5 can provide the gate high voltage VGH to the driving terminal PD through a conducting path. In addition, the transistor T3 may also provide the reference voltage VREF to the input PIN through the conducting path. Therefore, the initialization circuit 1010 can pull up the voltage levels of the input PIN and the driving terminal PD to perform the reset operation on the input PIN and the driving terminal PD, and turn on the driving transistor TD, thereby ensuring that the subsequent compensation operation can be performed smoothly.
On the other hand, when the pixel circuit 1000 operates in the compensation phase TC, the previous gate driving signal SN-m and the previous gate driving signal SN may be both set to the disable state (e.g., low voltage level). In this case, the transistor T5 of the voltage compensation circuit 1020 maintains the voltage level of the control terminal at the voltage value of the gate high voltage VGH according to the pulled-down previous gate driving signal SN-m and the gate driving signal SN. The transistor T5 adjusts the voltage level of the driving terminal PD to the sum of the system voltage VSS and the threshold voltage VTH of the driving transistor TD (i.e., VSS + VTH) through the conduction path.
In addition, the transistor T3 can still maintain the voltage level of the input PIN at the voltage value of the reference voltage VREF through the conduction path.
Then, when the pixel circuit 1000 operates in the light-emitting period TE, the gate driving signal SN may be set to an enabled state (e.g., a high voltage level), and the previous-stage gate driving signal SN-m may be set to a disabled state (e.g., a low voltage level). In this case, the data writing circuit 1030 may provide the data voltage VDATA to the input terminal PIN according to the pulled-up gate driving signal SN. At the same time, the initialization circuit 1010 may further raise the voltage level of the driving terminal PD to a voltage value of VSS + VTH + Δ V by the coupling effect of the capacitor C1, where Δ V is a change amount of the voltage value when the input terminal PIN operates between the reset phase TR and the compensation phase TC (i.e., VDATA — VREF (where VDATA is a voltage value of the data voltage VDATA; VREF is a voltage value of the reference voltage VREF)).
Besides, in the light-emitting period TE, the transistor T7 of the light-emitting control circuit 1040 can be turned on according to the pulled-up gate driving signal SN, and the driving transistor TD can generate the on-current ID according to the voltage on the driving terminal PD, thereby driving the light-emitting element EL. At this time, the on current ID flowing through the light emitting element EL can be represented by the following formula:
ID＝K((VSS+VTH+VDATA-VREF)-VSS)-VTH)2
in other words, in the light-emitting period TE, the pixel circuit 1000 can simultaneously provide the data voltage VDATA to the input terminal PIN and light the light-emitting element EL. In addition, the pixel circuit 1000 can also effectively eliminate the threshold voltage offset of the driving transistor TD caused by process variations. In addition, the pixel circuit 1000 can also perform a compensation operation on the threshold voltage VTH of the driving transistor TD in a compensation period TC (or compensation time) that is long enough, thereby improving the compensation effect of the pixel circuit 1000.
Referring to fig. 6B, the pixel circuit 1100 includes a driving transistor TD, an initialization circuit 1110, a voltage compensation circuit 1120, a data writing circuit 1130, a light-emitting control circuit 1140, and a light-emitting element EL. The pixel circuit 1100 is substantially the same or similar to the pixel circuit 1000, wherein the same or similar elements are given the same or similar reference numerals. Unlike the embodiment of fig. 6A, in the initialization circuit 1110, the second terminal of the transistor T3 may be coupled to the system voltage VDD.
In other words, in the embodiment shown in fig. 6B, when the pixel circuit 1100 operates in the reset phase TR, the transistor T3 can provide the system voltage VDD to the input PIN according to the voltage of the control terminal thereof, so as to reset the input PIN.
The details of the driving transistor TD, the initialization circuit 1110, the voltage compensation circuit 1120, the data writing circuit 1130, the light-emitting control circuit 1140, and the light-emitting element EL shown in fig. 6B when operating in the reset phase TR, the compensation phase TC, and the light-emitting phase TE can be analogized with the description of fig. 6A, and therefore, the details are not repeated.
It should be noted that in the embodiments of fig. 6A and 6B, the pixel circuits 1000 and 1100 are controlled only by the previous gate driving signal SN-m and the gate driving signal SN. In other words, the present embodiment can control the pixel circuits 1000 and 1100 by only one set of GOA circuits, thereby effectively saving the overall area.
Fig. 8 is a circuit diagram of a pixel circuit 1200 according to the embodiment of fig. 5. Referring to fig. 8, the pixel circuit 1200 includes a driving transistor TD, an initialization circuit 1210, a voltage compensation circuit 1220, a data writing circuit 1230, a light emitting control circuit 1240 and a light emitting element EL. The pixel circuit 1200 is substantially the same as or similar to the pixel circuit 1000, wherein the same or similar elements are denoted by the same or similar reference numerals.
Unlike the embodiment of fig. 6A, in the light emission control circuit 1240, the transistor T7 may be controlled by the light emission control signal EM. Fig. 9 is a waveform diagram of the pixel circuit 1200 of fig. 8 according to the invention. Referring to fig. 8 and fig. 9, when the pixel circuit 1200 is operating in the light-emitting phase TE, the light-emitting control circuit 1240 generates the driving current ID according to the pulled-up light-emitting control signal EM, and lights the light-emitting element EL by the driving current ID.
The details of the driving transistor TD, the initialization circuit 1210, the voltage compensation circuit 1220, the data writing circuit 1230, the light emitting control circuit 1240 and the light emitting element EL shown in fig. 8 during the reset phase TR, the compensation phase TC, the data writing phase TDA and the light emitting phase TE can be analogized with reference to the related description of fig. 6A, and therefore, the details are not repeated.
FIG. 10 is a pixel circuit according to the embodiment of FIG. 5 illustrating various implementations of the invention
A circuit diagram of an example pixel circuit 1300. Referring to fig. 10, the pixel circuit 1300 includes a driving transistor TD, an initialization circuit 1310, a voltage compensation circuit 1320, a data writing circuit 1330, a light-emitting control circuit 1340, and a light-emitting element EL. The pixel circuit 1300 is substantially the same or similar to the pixel circuit 1100, wherein the same or similar elements are given the same or similar reference numerals.
Unlike the embodiment of fig. 6B, in the light emission control circuit 1340, the transistor T7 may be controlled by the subsequent stage gate driving signal SN + i. Fig. 11 is a waveform diagram of the pixel circuit 1300 of fig. 10 according to the present invention. Referring to fig. 10 and fig. 11, when the pixel circuit 1300 operates in the light-emitting period TE, the light-emitting control circuit 1340 generates the driving current ID according to the pulled-up subsequent gate driving signal SN + i, and lights the light-emitting element EL by the driving current ID. Wherein i is a positive integer greater than 1.
The details of the driving transistor TD, the initialization circuit 1310, the voltage compensation circuit 1320, the data writing circuit 1330, the light-emitting control circuit 1340, and the light-emitting element EL shown in fig. 10 during the reset phase TR, the compensation phase TC, the data writing phase TDA, and the light-emitting phase TE can be analogized with reference to the related descriptions in fig. 6A and fig. 6B, and therefore, the details are not repeated.
Fig. 12 is a flowchart of a driving method of the pixel circuit 100 according to the embodiment of the invention in fig. 1. Referring to fig. 1 and 12, in step S1210, the pixel circuit 100 may provide a driving transistor having a driving terminal, a first terminal and a second terminal. In step S1220, the pixel circuit 100 may provide an initialization circuit to adjust the voltage levels of the input terminal and the driving terminal according to the previous stage of the gate driving signal. In step S1230, the pixel circuit 100 can provide a data writing circuit to provide a data voltage to the input terminal according to the gate driving signal. In step S1240, the pixel circuit 100 may provide a voltage compensation circuit to adjust the voltage level of the driving terminal according to the compensation control signal. In step S1250, the pixel circuit 100 may provide a light emitting element having a cathode terminal and an anode terminal. In step S1260, the pixel circuit 100 may provide a first light-emitting control circuit to control the light-emitting state of the light-emitting element according to a light-emitting control signal, wherein an enabling time of the compensation control signal is between a falling edge of the previous gate driving signal and a rising edge of the gate driving signal.
Fig. 13 is a flowchart of a driving method of the pixel circuit 900 according to the embodiment of the invention in fig. 5. Referring to fig. 5 and fig. 13, in step S1310, the pixel circuit 900 may provide a driving transistor having a driving end, a first end and a second end. In step S1320, the pixel circuit 900 may provide an initialization circuit to adjust the voltage levels of the input terminal and the driving terminal according to the gate driving signal and the previous stage gate driving signal based on the reference voltage. In step S1330, the pixel circuit 900 can provide a data writing circuit to provide a data voltage to the input terminal according to the gate driving signal. In step S1340, the pixel circuit 900 may provide a voltage compensation circuit to adjust the voltage level of the driving terminal according to the gate driving signal and the previous stage gate driving signal in the compensation stage. In step S1350, the pixel circuit 900 may provide a light emitting element having a cathode terminal and an anode terminal. In step S1360, the pixel circuit 900 may provide a light-emitting control circuit to control the light-emitting state of the light-emitting element according to the control signal, wherein the compensation stage is between the falling edge of the previous gate driving signal and the rising edge of the gate driving signal.
Details of the steps in fig. 12 and fig. 13 are described in detail in the foregoing embodiments and implementations, and are not repeated herein.
In summary, the pixel circuit according to the embodiments of the invention can set the enabling time of the compensation control signal to be between the falling edge of the previous gate driving signal and the rising edge of the gate driving signal, so as to serve as the compensation time for compensating the threshold voltage of the driving transistor. Therefore, compared with the prior pixel circuit which can only compensate the critical voltage of the driving transistor in the limited enabling period of the grid driving signal, the pixel circuit of the invention can increase the compensating time of the critical voltage of the driving transistor by prolonging the enabling time of the compensating control signal, thereby effectively improving the quality of the display picture.

Claims (31)

1. A pixel circuit, comprising:
a driving transistor having a driving terminal and a first terminal coupled to a first system voltage;
the initialization circuit is coupled to an input end and the driving end and adjusts the voltage levels of the input end and the driving end according to a previous stage grid driving signal;
a data write circuit coupled to the input terminal for providing a data voltage to the input terminal according to a gate driving signal;
a voltage compensation circuit coupled to the input terminal and the driving terminal for adjusting the voltage level of the driving terminal according to a compensation control signal;
a light emitting device having a cathode terminal and an anode terminal coupled to a second system voltage; and
a first light-emitting control circuit coupled to the cathode terminal of the light-emitting device, the voltage compensation circuit and the second terminal of the driving transistor for controlling the light-emitting state of the light-emitting device according to a light-emitting control signal,
the enabling time of the compensation control signal is between the falling edge of the previous stage grid driving signal and the rising edge of the grid driving signal.
2. The pixel circuit according to claim 1, wherein the initialization circuit pulls up the voltage levels of the input terminal and the driving terminal according to the previous stage of pulled-up gate driving signal during a reset phase.
3. The pixel circuit according to claim 1, wherein in a compensation phase, the voltage compensation circuit makes the voltage level of the driving terminal be a sum of the voltage value of the first system voltage and the voltage value of the threshold voltage of the driving transistor according to the compensation control signal pulled up.
4. The pixel circuit according to claim 1, wherein the voltage compensation circuit makes the voltage level of the driving terminal be a difference between a sum of the voltage value of the data voltage, the voltage value of the threshold voltage of the driving transistor and the voltage value of the first system voltage and a voltage value of a reference voltage according to the compensation control signal pulled down during a data writing phase and a lighting phase.
5. The pixel circuit according to claim 1, wherein the voltage compensation circuit makes the voltage level of the driving terminal be the sum of the voltage value of the data voltage and the voltage value of the threshold voltage of the driving transistor according to the compensation control signal pulled down during a data writing phase and a light emitting phase.
6. A pixel circuit as claimed in claim 1, wherein the pixel circuit further comprises:
and a second light-emitting control circuit coupled to the first end of the driving transistor and the first system voltage, wherein in a light-emitting stage, the first light-emitting control circuit and the second light-emitting circuit are turned on according to the pulled-up light-emitting control signal, and the light-emitting element is turned on.
7. A pixel circuit as claimed in claim 6, wherein the pixel circuit further comprises:
and a leakage current compensation circuit coupled in parallel to the second light-emitting control circuit and providing a leakage current leakage path according to the boosted compensation control signal in a compensation stage.
8. A pixel circuit as claimed in claim 7, wherein the second emission control circuit comprises:
a first transistor having a first terminal coupled to the first system voltage, a second terminal coupled to the first terminal of the driving transistor, a control terminal receiving the light emission control signal,
wherein the leakage current compensation circuit includes:
a second transistor having a first terminal coupled to the first terminal of the first transistor, a second terminal coupled to the second terminal of the first transistor, and a control terminal receiving the compensation control signal,
wherein the aspect ratio of the second transistor is smaller than the aspect ratio of the first transistor.
9. A pixel circuit as claimed in claim 6, wherein the pixel circuit further comprises:
and a leakage current compensation circuit coupled to a reference voltage and the input terminal, wherein the leakage current compensation circuit and the voltage compensation circuit provide a leakage current leakage path in a compensation stage according to the compensation control signal which is pulled up.
10. A pixel circuit as claimed in claim 9, wherein the second emission control circuit comprises:
a first transistor having a first terminal coupled to the first system voltage, a second terminal coupled to the first terminal of the driving transistor, a control terminal receiving the light emission control signal,
wherein the leakage current compensation circuit includes:
a second transistor having a first terminal coupled to the input terminal, a second terminal coupled to the reference voltage, and a control terminal receiving the compensation control signal,
wherein the aspect ratio of the second transistor is smaller than the aspect ratio of the first transistor.
11. A driving method of a pixel circuit, comprising:
providing a driving transistor having a driving end, a first end and a second end;
providing an initialization circuit to adjust the voltage levels of an input end and the driving end according to a previous stage grid driving signal;
providing a data writing circuit to provide a data voltage to the input end according to a grid driving signal;
providing a voltage compensation circuit to adjust the voltage level of the driving end according to a compensation control signal;
providing a light emitting device having a cathode terminal and an anode terminal; and
providing a first light-emitting control circuit to control the light-emitting state of the light-emitting device according to a light-emitting control signal,
the enabling time of the compensation control signal is between the falling edge of the previous stage grid driving signal and the rising edge of the grid driving signal.
12. The driving method according to claim 11, further comprising:
in a reset stage, the initialization circuit pulls up the voltage levels of the input end and the driving end according to the pulled-up previous stage grid driving signal.
13. The driving method according to claim 11, further comprising:
in a compensation stage, the voltage compensation circuit makes the voltage level of the driving end be the sum of the voltage value of the first system voltage and the voltage value of the critical voltage of the driving transistor according to the raised compensation control signal.
14. The driving method according to claim 11, further comprising:
in a data writing stage and a light emitting stage, the voltage compensation circuit makes the voltage level of the driving end be a difference value between the sum of the voltage value of the data voltage, the voltage value of the critical voltage of the driving transistor and the voltage value of the first system voltage and the voltage value of a reference voltage according to the compensation control signal which is pulled down.
15. The driving method according to claim 11, further comprising:
in a data writing stage and a light emitting stage, the voltage compensation circuit makes the voltage level of the driving end be the sum of the voltage value of the data voltage and the voltage value of the critical voltage of the driving transistor according to the compensation control signal which is pulled down.
16. The driving method according to claim 11, further comprising:
providing the first light-emitting control circuit and the second light-emitting control circuit to be conducted according to the pulled-up light-emitting control signal in a light-emitting stage, and enabling the light-emitting element to be lightened.
17. The driving method according to claim 16, further comprising:
providing a leakage current compensation circuit to provide a leakage current leakage path in a compensation stage according to the pulled-up compensation control signal.
18. The driving method according to claim 16, further comprising:
providing the voltage compensation circuit and a leakage current compensation circuit to provide a leakage current leakage path in a compensation stage according to the compensation control signal which is pulled up.
19. A pixel circuit, comprising:
a driving transistor having a driving terminal and a first terminal coupled to a first system voltage;
the initialization circuit is coupled to an input end and the driving end and used for adjusting the voltage levels of the input end and the driving end according to a grid driving signal and a preceding stage grid driving signal based on a reference voltage;
a data write circuit coupled to the input terminal for providing a data voltage to the input terminal according to the gate driving signal;
a voltage compensation circuit coupled to the initialization circuit for adjusting the voltage level of the driving end in a compensation stage according to the gate driving signal and the preceding stage gate driving signal;
a light emitting device having a cathode terminal and an anode terminal coupled to a second system voltage; and
a light-emitting control circuit coupled to the cathode terminal of the light-emitting device, the voltage compensation circuit and the second terminal of the driving transistor for controlling the light-emitting state of the light-emitting device according to a control signal,
the compensation stage is between the falling edge of the previous stage gate driving signal and the rising edge of the gate driving signal.
20. The pixel circuit of claim 19, wherein the control signal is the gate driving signal, a light emitting control signal or a post-stage gate driving signal.
21. The pixel circuit of claim 19, wherein the reference voltage is the second system voltage.
22. The pixel circuit according to claim 19, wherein the initialization circuit pulls up the voltage levels of the input terminal and the driving terminal according to the previous stage of pulled-up gate driving signal during a reset phase.
23. The pixel circuit according to claim 19, wherein in the compensation phase, the voltage compensation circuit makes the voltage level of the driving terminal be a sum of the voltage value of the first system voltage and the voltage value of the threshold voltage of the driving transistor according to the pulled-down gate driving signal and the previous stage gate driving signal.
24. The pixel circuit according to claim 19, wherein during a light-emitting period, the data writing circuit is turned on according to the gate driving signal being pulled up to provide the data voltage to the input terminal, and the initialization circuit and the voltage compensation circuit are turned off according to the previous gate driving signal being pulled down, so that the voltage level of the driving terminal is a difference between a sum of the voltage value of the data voltage, the voltage value of the threshold voltage of the driving transistor and the voltage value of the first system voltage and the voltage value of the second system voltage or the reference voltage.
25. A pixel circuit as claimed in claim 19, wherein the initialization circuit comprises:
a first transistor, the second end and the control end of which jointly receive the preceding stage grid driving signal;
a second transistor, having a first terminal coupled to the first terminal of the first transistor, a second terminal receiving the previous stage gate driving signal, and a control terminal receiving the gate driving signal;
a third transistor, having a first terminal coupled to the input terminal, a second terminal coupled to the reference voltage, and a control terminal coupled to the first terminal of the second transistor;
a fourth transistor, the first end and the control end of which receive the previous stage gate driving signal together, and the second end of which is coupled to the driving end; and
a capacitor having a first terminal coupled to the input terminal and a second terminal coupled to the driving terminal.
26. A driving method of a pixel circuit, comprising:
providing a driving transistor having a driving end, a first end and a second end;
providing an initialization circuit to adjust a voltage level of an input end and a driving end based on a reference voltage according to a grid driving signal and a preceding stage grid driving signal;
providing a data writing circuit to provide a data voltage to the input end according to the grid driving signal;
providing a voltage compensation circuit to adjust the voltage level of the driving end according to the grid driving signal and the preceding stage grid driving signal in a compensation stage;
providing a light emitting device having a cathode terminal and an anode terminal; and
providing a light-emitting control circuit to control the light-emitting state of the light-emitting device according to a control signal,
the compensation stage is between the falling edge of the previous stage gate driving signal and the rising edge of the gate driving signal.
27. The driving method as claimed in claim 26, wherein the control signal is the gate driving signal, a light emitting control signal or a post-stage gate driving signal.
28. The driving method according to claim 26, wherein the reference voltage is a second system voltage.
29. The driving method of claim 26, further comprising:
in a reset stage, the initialization circuit pulls up the voltage levels of the input end and the driving end according to the pulled-up previous stage grid driving signal.
30. The driving method of claim 26, further comprising:
in the compensation stage, the voltage compensation circuit makes the voltage level of the driving end be the sum of the voltage value of a first system voltage and the voltage value of the critical voltage of the driving transistor according to the pulled-down gate driving signal and the previous stage gate driving signal.
31. The driving method of claim 26, further comprising:
in a lighting phase, the data writing circuit is turned on according to the pulled-up gate driving signal to provide the data voltage to the input end, and the initialization circuit and the voltage compensation circuit are turned off according to the pulled-down previous stage gate driving signal, so that the voltage level of the driving end is a difference value between the sum of the voltage value of the data voltage, the voltage value of the threshold voltage of the driving transistor and the voltage value of a first system voltage and the voltage value of a second system voltage or the reference voltage.
CN202110397659.5A 2020-07-30 2021-04-14 Pixel circuit and driving method thereof Active CN113096584B (en)

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