CN113096580B - Control circuit of display panel and display panel - Google Patents
Control circuit of display panel and display panel Download PDFInfo
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- CN113096580B CN113096580B CN202110378063.0A CN202110378063A CN113096580B CN 113096580 B CN113096580 B CN 113096580B CN 202110378063 A CN202110378063 A CN 202110378063A CN 113096580 B CN113096580 B CN 113096580B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Abstract
The invention provides a control circuit of a display panel and the display panel, and relates to the technical field of display. The embodiment of the present disclosure provides a control circuit of a display panel, in which an applied display panel includes a plurality of sub-panels; a first transmission unit is arranged on the first side of each sub-panel and comprises a data driving sub-circuit and an acquisition sub-circuit; the control circuit of the display panel comprises a first control unit and a plurality of signal processing units; the first end of a signal processing unit is connected with a first transmission unit, and the second end of the signal processing unit is connected with a first control unit; the first control unit generates a data driving signal according to the received first timing signal, transmits the data driving signal to the corresponding data driving sub-circuit, receives first information data of the sub-panel returned by each acquisition sub-circuit, and generates second information data according to each first information data; each signal processing unit is used for carrying out anti-attenuation processing on the data driving signal or the first information data.
Description
Technical Field
The invention belongs to the technical field of display, and particularly relates to a control circuit of a display panel and the display panel.
Background
Aiming at a display panel formed by splicing a plurality of sub-panels, a plurality of control units are required to be respectively adopted for control, and the wiring distance from a driving circuit of each sub-panel to the control units is long, so that the attenuation of signals is caused, the delay of data driving signals of each sub-panel by the control units is different, and first information data returned by each sub-panel received by the control units cannot be synchronized.
Disclosure of Invention
The present invention is directed to at least one of the problems of the prior art, and provides a control circuit of a display panel, which can reduce the difference of signals between sub-panels.
In a first aspect, the disclosed embodiments provide a control circuit for a display panel, in which a display panel includes a plurality of sub-panels; a first transmission unit is arranged on the first side of each sub-panel and comprises a data driving sub-circuit and a data collecting sub-circuit; the control circuit of the display panel includes: a first control unit and a plurality of signal processing units;
the first end of one signal processing unit is connected with the data driving sub-circuit and the acquisition sub-circuit of one first transmission unit, the second end of the signal processing unit is connected with the first control unit, and different signal processing units are connected with the data driving sub-circuit and the acquisition sub-circuit of different first transmission units;
the first control unit generates the data driving signal according to the received first timing signal, transmits the data driving signal to the corresponding data driving sub-circuit, receives first information data of the sub-panel returned by each acquisition sub-circuit, and generates second information data of the display panel according to each first information data for the main control unit to process;
each signal processing unit is used for carrying out attenuation prevention processing on the data driving signal or the first information data.
According to the control circuit of the display panel provided by the embodiment of the disclosure, since the signal processing units are arranged between each first transmission unit and each first control unit, each signal processing unit can perform anti-attenuation processing on the data driving signal transmitted to the first transmission unit by the first control unit, and each signal processing unit can perform anti-attenuation processing on the first information data returned to the first control unit by the first control unit, therefore, the delay of the data driving signal transmitted to each sub-panel and the first information data returned to the first control unit by each sub-panel can be effectively reduced, and the synchronism of signals (including the data driving signal and the first information data) between each sub-panel and the first control unit can be improved.
In some examples, the signal processing unit includes a first amplification sub-circuit to amplify the data driving signal or the first information data by a preset amplification factor.
In some examples, the first amplification sub-circuit includes a first transistor, a first buffer capacitor, a second buffer capacitor, a first resistor, a second resistor;
the first end of the first buffer capacitor is connected with the control electrode of the first transistor, and the second end of the first buffer capacitor is connected with the data driving sub-circuit and the data acquisition sub-circuit of the first transmission unit; the first end of the first resistor is connected with the control electrode of the first transistor, and the second end of the first resistor is connected with the second electrode of the first transistor; the first end of the second buffer capacitor is connected with the first pole of the first transistor, and the second end of the second buffer capacitor is connected with the first control unit; the first end of the second resistor is connected with the first pole of the first transistor, and the second end of the second resistor is connected with the second pole of the first transistor.
In some examples, the control circuit of the display panel further includes: a plurality of second control units for preprocessing the first information data; wherein the content of the first and second substances,
the first end of each second control unit is connected with one signal processing unit, and the second end of each second control unit is connected with one data driving sub-circuit and one data acquisition sub-circuit of the first transmission unit; the different second control units are connected with the different signal processing units, and the different second control units are connected with the different data driving sub-circuits and the different acquisition sub-circuits of the first transmission units.
In some examples, further comprising: a plurality of second amplification sub-circuits; the first end of each second amplification sub-circuit is connected with one second control unit, and the second end of each second amplification sub-circuit is connected with the data driving sub-circuit and the data acquisition sub-circuit of one first transmission unit; different second amplifying sub-circuits are connected with different second control units, and different second amplifying sub-circuits are connected with different data driving sub-circuits and different data collecting sub-circuits of the first transmission units.
In some examples, each of the display panels further includes a gate driving circuit disposed at least one of the second and third sides of the sub-panel, wherein the first side is disposed between the second and third sides;
the second end of each second control unit is connected with the gate drive circuit.
In some examples, each of the signal processing units comprises a first differential to single-terminal circuit, a second differential to single-terminal circuit, a first single-ended to differential molecular circuit, and a second single-ended to differential molecular circuit; wherein the content of the first and second substances,
in one signal processing unit, a first end of the first differential-to-single-terminal circuit is connected to the first control unit, and a second end of the first differential-to-single-terminal circuit is connected to a first end of the first single-ended differential-to-differential molecular circuit; the second end of the first single-ended slip molecular circuit is connected with the acquisition sub-circuit of the first transmission unit connected with the signal processing unit;
the first end of the second differential to single-terminal circuit is connected with the data driving subcircuit of the first transmission unit connected with the signal processing unit, and the second end of the second differential to single-terminal circuit is connected with the first end of the second single-terminal differential conversion molecular circuit; and the second end of the second single-ended slipping molecular circuit is connected with the first control unit.
In some examples, each of the display panels further includes a gate driving circuit disposed at least one of the second and third sides of the sub-panel, wherein the first side is disposed between the second and third sides;
the first control unit is connected with each gate drive circuit.
In some examples, further comprising: and the time sequence controller is connected with the first control unit and provides the first time sequence signal for the first control unit.
In a second aspect, an embodiment of the present disclosure provides a display panel, including the control circuit of the display panel.
Drawings
FIG. 1 is a schematic diagram of an exemplary display panel;
FIG. 2 is a schematic diagram of a sub-panel structure (light exit side) of an exemplary display panel;
FIG. 3 is a schematic illustration (backside) of a sub-panel structure of an exemplary display panel;
fig. 4 is a schematic structural diagram of a driving board of a display panel provided in the disclosed embodiment;
fig. 5 is a schematic structural diagram of a first transmission unit of a display panel according to the disclosed embodiment;
fig. 6 is a schematic structural diagram (back side) of a display panel provided in an embodiment of the present disclosure;
fig. 7 is one of the architecture diagrams of the control circuit of the display panel provided by the embodiment of the disclosure;
fig. 8 is a circuit diagram of a first amplifying sub-circuit in a control circuit of a display panel according to an embodiment of the present disclosure;
fig. 9 is a second structural diagram of a control circuit of a display panel according to the second embodiment of the disclosure;
fig. 10 is a third structural diagram of a control circuit of a display panel according to an embodiment of the disclosure;
fig. 11 is a fourth schematic diagram of a control circuit of a display panel according to an embodiment of the disclosure;
fig. 12 is an architecture diagram of a first control unit of a control circuit of a display panel according to an embodiment of the present disclosure;
fig. 13 is a schematic structural diagram (light exit side) of a sub-panel of the display panel provided in the embodiment of the present disclosure.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The shapes and sizes of the various elements in the drawings are not to scale and are merely intended to facilitate an understanding of the contents of the embodiments of the invention.
Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. Also, the use of the terms "a," "an," or "the" and similar referents do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used only to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
The transistors used in the embodiments of the present disclosure may be thin film transistors or field effect transistors or other devices of the same characteristics, and since the source and the drain of the transistors used are interchangeable under certain conditions, the source and the drain are not different from the description of the connection relationship. In the embodiments of the present invention, to distinguish the source and the drain of the transistor, one of the poles is referred to as a first pole, the other pole is referred to as a second pole, and the gate is referred to as a control pole. Further, transistors can be classified into N-type and P-type according to their characteristics, and the following embodiments will be described with reference to the transistors as P-type transistors. When a P-type transistor is adopted, the first electrode is the source electrode of the P-type transistor, the second electrode is the drain electrode of the P-type transistor, when the grid electrode inputs a low level, the source electrode and the drain electrode are conducted, and the N type is opposite. It is contemplated that the implementation of the transistors as N-type transistors will be readily apparent to those skilled in the art without inventive effort and is therefore within the scope of the embodiments of the present invention.
It should be noted that, for convenience of description, the first direction and the second direction may be any directions, and the first direction and the second direction intersect, for example, the display panel may include a first side and a second side opposite to each other, and a third side and a fourth side opposite to each other, wherein the first side is connected between the third side and the fourth side, the first direction may be an extending direction (e.g., a row direction) of the first side of the display panel, and the second direction may be an extending direction (e.g., a column direction) of the third side of the display panel.
Referring to fig. 1-3, an exemplary structure of a display panel is shown, where the display panel includes a plurality of sub-panels 100, and the plurality of sub-panels 100 are spliced to form a whole display panel. Referring to fig. 2, taking one of the sub-panels 100 as an example, each sub-panel 100 includes a plurality of sub-pixels arranged in an array, wherein each of the three sub-pixels with different colors constitutes a pixel unit. For example, each pixel unit may include a red subpixel R, a green subpixel G, and a blue subpixel B. The sub-panel 100 further includes a plurality of DATA lines DATA extending in a first direction (e.g., X direction in fig. 2) and a plurality of GATE lines GATE extending in a second direction (e.g., Y direction in fig. 2), the plurality of GATE lines GATE and the plurality of DATA lines DATA crossing each other and defining sub-pixels at crossing positions; the color of the sub-pixels in the same column is the same, and every three adjacent sub-pixels along a first direction (X direction in the figure) form a pixel unit; the sub-pixels in the pixel units in the same row are connected to the same GATE line GATE, and the sub-pixels in the pixel units in the same column are connected to the same DATA line DATA.
With continued reference to fig. 1 and fig. 2, taking the example that each sub-panel 100 of the display panel is a rectangular panel, each sub-panel 100 may include a first side and a second side disposed oppositely, and a third side and a fourth side disposed oppositely, wherein the first side is located between the second side and the third side. Taking the display panel including four sub-panels 100 as an example, fig. 2 is the sub-panel 100 at the bottom left of fig. 1, and taking the sub-panel 100 as an example for explanation, the first side is the lower side, the second side is the upper side, the third side is the left side, and the fourth side is the right side, the left side and the right side of the sub-panel 100 are respectively provided with a Gate Driver on Array (GOA), the first ends of the Gate lines Gate are connected to the GOA at the left side, the second ends of the Gate lines Gate are connected to the GOA at the right side, and the GOAs at the left side and the right side respectively output Gate driving signals to the Gate lines Gate. On the lower side of the sub-panel 100, a plurality of first transmission units 20 are provided, each first transmission unit 20 is connected with a plurality of DATA lines DATA, see fig. 5, each first transmission unit 20 includes an acquisition sub-circuit 21 and a DATA driving sub-circuit 22, specifically, the acquisition sub-circuit 21 and the DATA driving sub-circuit 22 are both connected with the plurality of DATA lines DATA of the sub-panel 100, and the acquisition sub-circuit 21 is used for acquiring first information DATA of the sub-panel 100 through the DATA lines DATA; the DATA driving sub-circuit 22 is used to write DATA voltages to the respective sub-pixels in the sub-panel 100 through the DATA lines DATA. The display panel further comprises a plurality of driving boards 10, one driving board 10 is respectively connected with a plurality of first transmission units 20 at the lower side of one sub-panel 100 through a plurality of first connecting lines 001, and is connected with the acquisition sub-circuit 21 and the data driving sub-circuit 22 of each first transmission unit 20; one driving board 10 is connected to the GOAs located at the left and right sides of one sub-panel 100 through two second connection lines 002, respectively. Referring to fig. 4, each of the driving boards 10 is provided with a control circuit of the display panel, which may include a first control unit 1, a power management unit 4, and a timing control unit 5, and the timing control unit 5 and the power management unit 4 are connected to the first control unit 1. The power management unit 4 is used to supply an operating voltage to the sub-panel 100 and manage the operating voltage. In the display stage, the timing control unit 5 generates a second timing signal and transmits the first control unit 1, the first control unit 1 generates a gate driving signal according to the second timing signal and transmits the gate driving signal to the GOAs on the left and right sides of the sub-panel 100, so that the GOAs drive the gate lines to sequentially open the driving transistors of the sub-pixels on each row, the timing control unit 5 generates a first timing signal and transmits the first timing signal to the first control unit 1, the first control unit 1 generates a data driving signal according to the first timing signal and transmits the data driving signal to the data driving sub-circuit 22 in the first transmission unit 20 on the lower side of the sub-panel 100, and the data driving sub-circuit 22 sequentially writes a data voltage into the activated sub-pixels on the sub-panel 100 according to the data driving signal, so that the sub-panel 100 performs display; in the acquisition phase, the first control unit 1 generates an enable control signal and transmits the enable control signal to the acquisition sub-circuit 21 in the first transmission unit 20 on the lower side of the sub-panel 100, so that the acquisition sub-circuit 21 acquires the first information data of the sub-panel 100 and returns to the first control unit 1.
It should be noted that the display panel may be a display panel with an interactive function, the first information data of each sub-panel 100 of the display panel may include a plurality of data, for example, in a display state, the first information data of the sub-panel 100 may include display data, and the display data may include information such as gray scale voltages of the sub-pixels of the sub-panel 100; in the interactive state, the first information data of the sub-panel 100 may include display data and interactive data, the display data may include information such as gray scale voltages of sub-pixels of the sub-panel 100, and the interactive data may include interactive control information of various types of operations performed by the user, for example, in a conference scenario, the interactive data may include coordinate information of a position pointed by a laser pen of the user; in a game scenario, the interaction data may include captured motion information of the user, and the like, which is not limited herein. From the first information data of the sub-panel 100 received by the respective first control units 1, second information data may be generated, the second information data including the display screen of the complete display panel and the interactive control information generated from the interactive information.
Referring to fig. 3, the first transmission unit 20 may be packaged by a Chip On Flex (COF) method, and then the first transmission unit 20 is folded to the back of the sub-panel 100 (the side away from the light emitting surface) and connected to the driving board 10 fixed On the back of the sub-panel 100 through the first connection line 001. Since the plurality of first transmission units 20 on the lower side of each sub-panel 100 are connected to the first control unit 10 in one driving board 10, signals (including data driving signals and first information data, etc.) transmitted between the first control unit 1 and the plurality of first transmission units 20 need to pass through a long wiring (for example, the first transmission line 001), so that the signals are greatly attenuated, and the first information data of the sub-panels received by the respective first control units 1 have a delay, so that the display screens of the respective sub-panels of the entire display panel are not synchronized.
In order to solve the above problem, embodiments of the present disclosure provide a control circuit of a display panel, which is described in detail below.
In a first aspect, referring to fig. 6, fig. 6 is a back side (a side away from the light exit surface) of the display panel provided in the embodiment of the present disclosure, and the display panel applied by the control circuit may include a plurality of sub-panels, and the plurality of sub-panels are spliced to form a whole display panel. Wherein, a first transmission unit 20 is disposed on a first side of each sub-panel 100, referring to fig. 5, the first transmission unit 20 includes a DATA driving sub-circuit 22 and a collecting sub-circuit 21, specifically, the collecting sub-circuit 21 is used for collecting first information DATA of the sub-panel 100 through a DATA line DATA; the DATA driving sub-circuit 22 is used to write DATA voltages to the respective sub-pixels in the sub-panel 100 through the DATA lines DATA.
Further, the control circuit of the display panel includes a first control unit 1 and a plurality of signal processing units 30, and referring to fig. 4, the first control unit 1 may be provided on the driving board 10. A first end of one signal processing unit 30 is connected to the data driving sub-circuit 22 and the collecting sub-circuit 21 of one first transmission unit 20, a second end of the signal processing unit 30 is connected to the first control unit 1, different signal processing units 30 are connected to the data driving sub-circuit 22 and the collecting sub-circuit 21 of different first transmission units 20, and each signal processing unit 30 is used for performing anti-attenuation processing on signals between the first control unit 1 and the first transmission unit 20.
Further, a second side and a third side of each sub-panel 100 are provided with a GOA, the second side and the third side are opposite sides, the first side is located between the second side and the third side, and the first control unit 1 is connected to the GOAs on both sides of each sub-panel 100. Referring to fig. 4, each of the driving boards 10 may further include a power management unit 4 and a timing control unit 5, the timing control unit 5 and the power management unit 4 are connected to the first control unit 1, and the power management unit 4 is configured to supply an operating voltage to the respective sub-panels 100 and manage the operating voltage.
The working principle of the control circuit of the display panel is as follows: in the display stage, the timing control unit 5 generates a second timing signal and transmits the first control unit 1, the first control unit 1 generates a gate driving signal according to the second timing signal and transmits the gate driving signal to the corresponding GOAs on the left and right sides of the sub-panel 100, so that the GOAs drive the gate lines to sequentially open the driving transistors of the sub-pixels on each row, the timing control unit 5 generates a first timing signal and transmits the first timing signal to the first control unit 1, the first control unit 1 generates a data driving signal according to the first timing signal, the data driving signal is subjected to attenuation prevention processing by the corresponding signal processing unit 30 and then transmitted to the data driving sub-circuit 22 in the first transmission unit 20 on the lower side of the corresponding sub-panel 100, and the data driving sub-circuit 22 sequentially writes data voltages into the opened sub-pixels in the sub-panel 100 according to the data driving signal, so that the sub-panel 100 performs display; in the collecting stage, the first control unit 1 generates an enable control signal, and transmits the enable control signal to the collecting sub-circuit 21 in the first transmission unit 20 at the lower side of the corresponding sub-panel 100, so that the collecting sub-circuit 21 collects first information data of the sub-panel 100, the first information data is returned to the first control unit 1 after being subjected to attenuation prevention processing by the signal processing unit 30, the first control unit 1 generates second information data of the display panel according to the first information data returned by each sub-panel 100, and the second information data is provided for processing by the main control unit 200, wherein the first information data and the second information data are the same as above, which is not described herein again.
Since the signal processing units 30 are disposed between each first transmission unit 20 and the first control unit 1, and each signal processing unit 30 can perform anti-fading processing on the data driving signal transmitted 20 from the first control unit 1 to the first transmission unit 1, and each signal processing unit 30 can perform anti-fading processing on the first information data returned from the first control unit 1 to the first control unit 1, it is possible to effectively reduce attenuation of the data driving signal transmitted to each sub-panel 100 and the first information data returned from each sub-panel 100 to the first control unit 1, and it is possible to effectively improve the synchronism of the signals between each sub-panel 100 and the first control unit 1 on the basis of reducing attenuation of the signals between the first transmission unit 20 on the first side of each sub-panel 100 and the first control unit 1, including the data driving signal and the first information data), so that the pictures of each sub-panel 100 can be displayed synchronously, and the interactive operation can be performed quickly.
In some examples, referring to fig. 6, the first transmission units 20 of each sub-panel 100 may be packaged in a COF manner, and then the first transmission units 20 are folded to the back surface (the side away from the light exit surface) of the sub-panel 100 to which they belong, and connected to the driving board 10 fixed on the back surface of the display panel. The driving board 10 may be disposed at a central region of the rear surface of the display panel to make the length of a connection line between the first control unit 1 on the driving board 10 and the first transmission unit 20 of each sub-panel 10 substantially the same, so that it is possible to reduce a difference in signals between the first transmission unit 20 of each sub-panel 100 and the first control unit 1.
In some examples, referring to fig. 7, in the control circuit of the display panel provided in the disclosed embodiment, the signal processing unit 30 in the control circuit may include a first amplification sub-circuit 301, and the first amplification sub-circuit 301 is configured to amplify the data driving signal or the first information data by a preset amplification factor to compensate for a transmission loss (i.e., attenuation) of the data driving signal or the first information data. The preset amplification factor of the first amplification sub-circuit 301 may be determined according to the size of the line resistance-parasitic capacitance delay (RC delay) on the connection line between the first transmission unit 20 and the first control unit 1, and is not limited herein.
In some examples, referring to fig. 8, a specific circuit structure of the first amplification sub-circuit 301 as the signal processing unit 30 may include various forms, for example, the first amplification sub-circuit 301 may include a first transistor T1, a first buffer capacitor C1, a second buffer capacitor C2, a first resistor R1, and a second resistor R2. A first end of the first buffer capacitor C1 is connected to a control electrode of the first transistor T1, a second end of the first buffer capacitor C1 is used as a first transmission end P1 of the first amplification sub-circuit 301, and a second end of the first buffer capacitor C1 is connected to the data driving sub-circuit 22 and the acquisition sub-circuit 21 of the first transmission unit 20 corresponding to the first amplification sub-circuit 301; a first end of the first resistor R1 is connected to the control electrode of the first transistor T1, and a second end of the first resistor R1 is connected to the second electrode of the first transistor T1; a first end of the second buffer capacitor C2 is connected to the first pole of the first transistor T1, a second end of the second buffer capacitor C2 is used as a second transmission segment P2 of the first amplification sub-circuit 301, and a second end of the second buffer capacitor C2 is connected to the first control unit 1; a first terminal of the second resistor R2 is connected to the first pole of the first transistor T1, and a second terminal of the second resistor R2 is connected to the second pole of the first transistor T1. In the first amplification sub-circuit 301, the current of the first electrode of the first transistor T1 is controlled by the current of the control electrode, wherein a small change in the current of the first electrode causes a large change in the current of the first electrode, and the change satisfies a certain proportional relationship, that is, the change amount of the current of the first electrode is β times of the change amount of the current of the control electrode, that is, the current change is amplified by β times, where β is the amplification factor of the first transistor T1. Applying a signal from the first transmission terminal P1 to the space between the control electrode and the second electrode of the first transistor T1 causes a change in the current of the first electrode of the first transistor T1, the amplified current of the first electrode flows through the second resistor R2, and the values of the first resistor R1 and the second resistor R2 are selected according to the required amplification factor β, so that the amplified signal is transmitted from the second transmission terminal P2 to the first control unit 1 to compensate for the attenuation of the signal.
In some examples, referring to fig. 9, the control circuit of the display panel may further include a plurality of second control units 6, the second control units 6 being used to pre-process the first information data. The first end of each second control unit 6 is connected to one signal processing unit 30, the signal processing unit 30 is a first amplification sub-circuit 301, the first end of each second control unit 6 is connected to a first transmission end P1 of the first amplification sub-circuit 301, and the second end of each second control unit 6 is connected to a data driving sub-circuit 22 and a data collecting sub-circuit 21 of the first transmission unit 20. Different second control units 6 are connected with different signal processing units 30, and different second control units 6 are connected with different data driving sub-circuits 22 and collecting sub-circuits 21 of the first transmission units 20. The second control unit 6 may act as a relay to share part of the data transmission and processing tasks for the first control unit 1 to reduce the data throughput of the first control unit 1. For example, in the collecting stage, in the process that the collecting sub-circuit 21 in the first transmission unit 20 of each sub-panel 100 returns the first information data to the first control unit 1, the first information data may be transmitted to the second control unit 6 first, the second control unit 6 performs label processing on the first information data, that is, the frame header of a frame of the first information data is placed in the serial number of the sub-panel 100 to which the first information data belongs, and the second control unit 6 transmits the labeled first information data to the first control unit 1, so that the first control unit 1 identifies the frame header to perform frame splicing.
In some examples, referring to fig. 10, the control circuit of the display panel may further include a plurality of second amplification sub-circuits 7, a first terminal of each second amplification sub-circuit 7 is connected to one second control unit 6, and a second terminal of each second amplification sub-circuit 7 is connected to one data driving sub-circuit 22 and one collecting sub-circuit 21 of the first transmission unit 20. Different second amplifying sub-circuits 7 are connected with different second control units 6, and different second amplifying sub-circuits 7 are connected with data driving sub-circuits 22 and collecting sub-circuits 21 of different first transmission units 20. The second amplification sub-circuit 7 is arranged to amplify signals (including the first information data and the data driving signals) between the second control unit 6 and the first transmission unit 2, such that further direction signal attenuation is possible in cooperation with the first amplification sub-circuit 301. The circuit structure of the second amplifying sub-circuit 7 may include various structures, for example, the circuit structure of the second amplifying sub-circuit 7 and the circuit structure of the first amplifying sub-circuit 301 shown in fig. 8, which is not limited herein.
In some examples, each of the sub-panels 100 in the display panel further includes a GOA disposed on at least one of the second side and the third side of the sub-panel 100, that is, the sub-panel 100 may employ single-side gate driving or double-side gate driving, and the following description will take the example that the sub-panel 100 employs double-side gate driving as an example. A first end of each second control unit 6 is connected to a first amplifying sub-circuit 301, and a second end of each second control unit 6 is connected to the GOA on the sub-panel 100 corresponding to the second control unit 6. In the display stage, the timing control unit 5 generates a second timing signal and transmits the first control unit 1, the first control unit 1 generates a gate driving signal according to the second timing signal, the gate driving signal is amplified by the first amplification sub-circuit 301 so as to compensate for the attenuation of the gate driving signal, and then the gate driving signal is transmitted to the corresponding GOA on the sub-panel 100, so that the GOA drives each gate line to sequentially open the driving transistors of each row of sub-pixels.
In some examples, the display panel further includes a general control unit 200, the first control unit 1 inputs the second information data into the general control unit 200, and the general control unit 200 performs subsequent processing on the second information data, for example, generates corresponding operation data according to the interactive control information in the second information data, and controls the display panel to perform interactive operation.
Referring to fig. 12, the first control unit 1 may include an enable control sub-module 11, a data synchronization sub-module 12, an image stitching sub-module 13, and an algorithm processing sub-module 14 connected thereto. Wherein, the enable control sub-module 11 provides an enable control signal to control the acquisition sub-circuit 21 in each first transmission unit 20 to start working; the data synchronization sub-module 12 is configured to identify first information data returned by each sub-panel 100, and determine whether the first information data of all sub-panels 100 are received, so as to ensure integrity and synchronization of a display screen; the image splicing submodule 13 is configured to splice a complete display picture of the display panel according to the display data in the first information data of each sub-panel 100; the algorithm processing sub-module 14 is configured to process the interactive data in the first information data of each sub-panel 100 according to a preset algorithm to generate interactive control information, where the second information data includes a complete display image and interactive control information, and the subsequent main control unit 200 may perform interactive control according to the interactive control information.
Taking the control circuit of the display panel shown in fig. 9 as an example, the driving method of the display panel includes the following steps:
in the display stage:
s101, the first control unit generates a data driving signal according to the received first time sequence signal, generates a gate driving signal according to the second time sequence signal, and sends the data driving signal and the gate driving signal to the corresponding first amplification sub-circuit.
Specifically, before the first control unit 1 receives the first timing signal, the power management unit 4 is further included to supply power to the first control unit 1, the timing control unit 5, each first transmission unit 20, and the like; the timing control unit 5 generates a first timing signal and a second timing signal and transmits them to the first control unit 1.
S102, the first amplification sub-circuit amplifies the data driving signal and the grid driving signal and sends the data driving signal and the grid driving signal to a second control unit connected with the first amplification sub-circuit.
And S103, the second control unit sends the gate driving signal to the GOA on the corresponding sub-panel and sends the data driving signal to the data driving sub-circuit in each first data transmission unit on the first side of the sub-panel, so that each sub-pixel of the sub-panel is lightened to display the picture.
In the acquisition stage:
and S111, the first control unit sends the enabling control signals to the acquisition sub-circuits in the first transmission units, so that the acquisition sub-circuits acquire the first information data of the corresponding sub-panels, and the first information data are returned to the second control unit connected with the acquisition sub-circuits.
S112, the second control units respectively perform label processing on the received first information data and send the first information data subjected to label processing to the first amplifying sub-circuit.
Specifically, each of the second control units performs label processing on the received first information data, may generate a number for identifying the sub-panel for the second control unit according to the sub-panel to which the first information data belongs, and may pack the number to the frame header of the first information data.
And S113, amplifying the first information data subjected to label processing by each first amplifying sub-circuit, and sending the first information data to the first control unit.
S114, the first control unit generates second information data of the display panel according to the first information data of each sub-panel and sends the second information data to the main control unit for processing.
Specifically, the data synchronization sub-module 12 in the first control unit 1 determines, according to the frame header of each first information data, that the first information data sent by all the sub-panels 100 has been received, and then sends the first information data of each sub-panel 100 to the image stitching sub-module 13; the image splicing submodule 13 splices a complete display picture of the display panel according to the display data in the first information data of each sub-panel 100, and transmits the display picture to the algorithm processing submodule 14; the algorithm processing sub-module 14 is configured to process the interactive data in the first information data of each sub-panel 100 according to a preset algorithm to generate interactive control information, where the second information data includes a complete display image and interactive control information, and the subsequent master control unit 200 may perform interactive control according to the interactive control information.
In some examples, the signal processing units 30 may also have other structures, for example, referring to fig. 11, each signal processing unit 30 in the control single circuit of the display panel includes a first differential to single-terminal circuit 3021, a first single-ended to differential molecular circuit 3022, a second single-ended to differential molecular circuit 3023, and a second differential to single-terminal circuit 3024. The first differential-to-single-terminal circuit 3021 and the first single-ended differential-to-molecular circuit 3022 form a first transmission channel, and the acquisition sub-circuit 21 returns first information data to the first control unit 1 through the first transmission channel; the second single-ended differential sub-circuit 3023 and the second differential sub-circuit 3024 form a second transmission channel, and the first control unit 1 transmits the data driving signal to the data driving sub-circuit 22 through the second transmission channel. The single-ended signal comprises a reference end and a signal end, in the embodiment, the reference end is a ground end, and the input or the output of each chip end usually adopts the single-ended signal; the differential signal is obtained by carrying out differential conversion on a single-end signal to convert the single-end signal into two signals, wherein one signal is in phase with the original signal, the other signal is in phase opposition with the original signal, the two signals have equal amplitude, 180-degree phase difference and opposite polarity, and the characteristic enables the differential signal to have strong common-mode interference resistance and hardly generate loss in long-distance transmission. Therefore, in the process of transmitting signals between the first transmission unit 20 and the first control unit 1, after the signals are output from one of the two, the signals which are single-ended signals are converted into differential signals to avoid signal attenuation by using the characteristics of the differential signals, and then the differential signals are converted into single-ended signals before being input into the other one, so that the signals can be normally input into the first transmission unit 20 or the first control unit 1.
Specifically, with reference to fig. 11, in one signal processing unit 30, a first end of a first differential to single-ended circuit 3021 is connected to the first control unit 1, a second end of the first differential to single-ended circuit 3021 is connected to a first end of a first single-ended circuit 3022, a second end of the first single-ended circuit 3022 is connected to an acquisition sub-circuit 21 of the first transmission unit 20 connected to the signal processing unit 30. In the collecting phase, the first control unit 1 generates an enable control signal and transmits the enable control signal to the collecting sub-circuit 21 in the first transmission unit 20 on the lower side of the corresponding sub-panel 100, so that the collecting sub-circuit 21 collects the first information data of the sub-panel 100 and transmits the first information data to the first single-ended slipping sub-circuit 3022; the first single-ended differential-to-single-terminal circuit 3022 converts the first information data into a differential signal to reduce attenuation of the first information data in a transmission process, and transmits the first information data which is the differential signal to the first differential-to-single-terminal circuit 3021; the first differential-to-single-terminal circuit 3021 converts the first information data, which is a differential signal, into a single-ended signal, and inputs the single-ended signal to the first control unit 1; the first control unit 1 generates second information data of the display panel according to the first information data returned by each sub-panel 100, so as to be processed by the total control unit 200.
Further, with continued reference to fig. 11, in one signal processing unit 30, a first end of the second differential to single-ended circuit 3024 is connected, the data driving sub-circuit 22 of the first transmission unit 20 connected to the signal processing unit 30, a second end of the second differential to single-ended circuit 3024 is connected to a first end of the second single-ended circuit 3023, and a second end of the second single-ended circuit 3023 is connected to the first control unit 1. In the display stage, the first control unit 1 generates a data driving signal according to the received first timing signal, and transmits the data driving signal to the corresponding second single-ended slipping sub-circuit 3023; the second single-ended trans-single-ended sub-circuit 3023 converts the data driving signal into a differential signal to reduce attenuation of the data driving signal in a transmission process, and transmits the data driving signal, which is a differential signal, to the second differential-to-single-ended sub-circuit 3024; the second differential to single-terminal circuit 3024 converts the data driving signal, which is a differential signal, into a single-ended signal, and inputs the single-ended signal into the corresponding data driving sub-circuit 22 in the first transmission unit 20, and the data driving sub-circuit 22 writes the data voltage into each row of sub-pixels in the sub-panel 100 according to the data driving signal.
In the single signal processing unit 30, the first differential-to-single-ended circuit 3021 and the second single-ended circuit 3023 are connected to different ports of the first control unit 1; the first differential to single terminal circuits 3021 of the different signal processing units 30 are connected to different ports of the first control unit 1; the second single-ended slip molecule circuit 3023 of a different signal processing unit 30 is connected to a different port of the first control unit 1. Therefore, in the present embodiment, the first control unit 1 can directly identify the sub-panel 100 to which the first information data is addressed by the port number without performing label processing on the first information data.
In some examples, with continued reference to fig. 11, each sub-panel 100 in the display panel further includes a GOA disposed on at least one of the second side and the third side of the sub-panel 100, that is, the sub-panel 100 may adopt a single-side gate driving or a double-side gate driving, and the following description will take the example that the sub-panel 100 adopts the double-side gate driving as an example. Since the gate driving signals have timing signals and are not suitable for differential conversion, the GOA of each sub-panel 100 may be directly connected to the first control unit 1 in this embodiment.
Taking the control circuit of the display panel shown in fig. 11 as an example, the driving method of the display panel includes the following steps:
in the display stage:
and S131, the first control unit generates a data driving signal according to the received first timing signal, generates a gate driving signal according to the second timing signal, transmits the data driving signal to the second single-ended differential conversion molecular circuit, and sends the gate driving signal to the corresponding GOA.
Specifically, before the first control unit 1 receives the first timing signal, the power management unit 4 is further included to supply power to the first control unit 1, the timing control unit 5, each first transmission unit 20, and the like; the timing control unit 5 generates a first timing signal and a second timing signal and transmits them to the first control unit 1.
And S142, the second single-ended to single-ended conversion molecular circuit converts the data driving signal into a differential signal and transmits the differential signal to the second differential to single-ended circuit.
S143, the second differential to single-terminal conversion circuit converts the data driving signal, which is a differential signal, into a single-terminal signal, and transmits the single-terminal signal to the data driving sub-circuits in the first data transmission units on the first side of the corresponding sub-panel, so that the sub-pixels of the sub-panel are turned on to display the image.
In the acquisition stage:
and S151, the first control unit sends the enabling control signals to the acquisition sub-circuits in the first transmission units, so that the acquisition sub-circuits acquire the first information data of the corresponding sub-panels and return the first information data to the first single-ended slip molecular circuits connected with the acquisition sub-circuits.
S152, the first single-ended differential conversion molecular circuit converts the first information data into differential signals and transmits the differential signals to the first differential-to-single-ended terminal circuit.
S153, the first differential-to-single-terminal circuit converts the first information data, which is a differential signal, into a single-ended signal, and transmits the single-ended signal to the first control unit.
S154, the first control unit generates second information data of the display panel according to the first information data of each sub-panel, and sends the second information data to the main control unit for processing.
Specifically, the data synchronization sub-module 12 in the first control unit 1 determines, according to the port numbers (i.e., the numbers of the ports of the first control unit 1) for receiving the respective first information data, that the first information data sent by all the sub-panels 100 has been received, and then sends the first information data of each sub-panel 100 to the image stitching sub-module 13; the image splicing submodule 13 splices the complete display picture of the display panel according to the display data in the first information data of each sub-panel 100, and transmits the complete display picture to the algorithm processing submodule 14; the algorithm processing sub-module 14 is configured to process the interactive data in the first information data of each sub-panel 100 according to a preset algorithm to generate interactive control information, where the second information data includes a complete display image and interactive control information, and the subsequent master control unit 200 may perform interactive control according to the interactive control information.
It should be noted that the data synchronization sub-module 12 of the first control unit 1 may include a buffer, and after receiving the first information data returned by one sub-panel 100, temporarily store the first information data in the buffer until determining that the first information data returned by all sub-panels 100 are received, and then transmit each first information data to the image stitching sub-module 13.
In a second aspect, an embodiment of the present disclosure further provides a display panel, including the control circuit of the display panel.
Referring to fig. 6, the display panel includes a plurality of sub-panels 100, and the plurality of sub-panels 100 are spliced to form a whole display panel. Referring to fig. 13, taking one of the sub-panels 100 as an example, each sub-panel 100 includes a plurality of sub-pixels arranged in an array, wherein each of the three sub-pixels with different colors constitutes a pixel unit. For example, each pixel unit may include a red subpixel R, a green subpixel G, and a blue subpixel B. The sub-panel 100 further includes a plurality of DATA lines DATA and a plurality of GATE lines GATE, the plurality of GATE lines GATE extending in a first direction (e.g., X direction in fig. 1), the plurality of DATA lines DATA extending in a second direction (e.g., Y direction in fig. 1), the plurality of GATE lines GATE crossing the plurality of DATA lines DATA and defining sub-pixels at crossing positions; the color of the sub-pixels positioned in the same column is the same, and every three adjacent sub-pixels along the first direction (X direction in the figure) form a pixel unit; the sub-pixels in the pixel units in the same row are connected to the same GATE line GATE, and the sub-pixels in the pixel units in the same column are connected to the same DATA line DATA.
Taking the example that each sub-panel 100 of the display panel is a rectangular panel, each sub-panel 100 may include a first side and a second side disposed opposite to each other, and a third side and a fourth side disposed opposite to each other, wherein the first side is located between the second side and the third side. Taking the display panel including four sub-panels 100 as an example, fig. 13 is the sub-panel 100 at the bottom left corner of fig. 6, and taking the sub-panel 100 as an example for explanation, the first side is the lower side, the second side is the upper side, the third side is the left side, and the fourth side is the right side, the left side and the right side of the sub-panel 100 are respectively provided with a Gate Driver on Array (GOA), the first ends of the Gate lines Gate are connected to the GOA at the left side, the second ends of the Gate lines Gate are connected to the GOA at the right side, and the GOAs at the left side and the right side respectively output Gate driving signals to the Gate lines Gate. On the lower side of the sub-panel 100, a plurality of first transmission units 20 are provided, each first transmission unit 20 being connected to a plurality of DATA lines DATA, see fig. 5, each first transmission unit 20 including an acquisition sub-circuit 21 and a DATA driving sub-circuit 22, in particular, the acquisition sub-circuit 21 and the DATA driving sub-circuit 22 are both connected to the plurality of DATA lines DATA of the sub-panel 100, the acquisition sub-circuit 21 being configured to acquire first information DATA of the sub-panel 100 through the DATA lines DATA; the DATA driving sub-circuit 22 is used to write DATA voltages to the respective sub-pixels in the sub-panel 100 through the DATA lines DATA.
The display panel further comprises a driving board 10 and a plurality of signal processing units 30, wherein the driving board 10 is provided with a first control unit 1, and a circuit on the driving board 10 and the plurality of signal processing units 30 form a control circuit of the display panel. A signal processing unit 30 is connected between the first transmission unit 20 at the lower side of one sub-panel 100 and the first control unit 1 on the driving board 10, and the signal processing unit 30 performs anti-attenuation processing on the signal between the first transmission unit 20 and the first control unit 1 to reduce the signal loss between the sub-panels 100 and increase the synchronism of the sub-panels 100 of the display panel.
It should be noted that, for convenience of description, fig. 13 shows that one driving board 10 (including the first control unit 1) is connected to a plurality of first transmission units 20 on the lower side of one sub-panel 100, but the first control units 1 on the driving board 10 connected to the first transmission units 20 of the respective sub-panels 100 of the display panel provided in the embodiment of the present disclosure are the same first control unit 1.
It should be noted that the sub-panel 100 of the display panel may include various shapes, such as a rectangular panel, a circular panel, a polygonal panel, a shaped panel, etc., and is not limited herein.
Alternatively, the display panel may be a liquid crystal display panel or an electroluminescent display panel, such as a liquid crystal panel, an OLED panel, a micro led panel, a MiniLED panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and any other product or component with a display function.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and scope of the invention, and such modifications and improvements are also considered to be within the scope of the invention.
Claims (10)
1. A control circuit of a display panel is disclosed, wherein the display panel comprises a plurality of sub-panels; the display panel is characterized in that a first transmission unit is arranged on the first side of each sub-panel, and each first transmission unit comprises a data driving sub-circuit and a data collecting sub-circuit; the control circuit of the display panel includes: a first control unit and a plurality of signal processing units;
the first end of one signal processing unit is connected with the data driving sub-circuit and the acquisition sub-circuit of one first transmission unit, the second end of the signal processing unit is connected with the first control unit, and different signal processing units are connected with the data driving sub-circuit and the acquisition sub-circuit of different first transmission units;
the first control unit generates a data driving signal according to the received first time sequence signal, transmits the data driving signal to the corresponding data driving sub-circuit, receives first information data of the sub-panel returned by each acquisition sub-circuit, and generates second information data of the display panel according to each first information data for the main control unit to process;
each signal processing unit is used for carrying out attenuation prevention processing on the data driving signal or the first information data.
2. The control circuit of the display panel according to claim 1, wherein the signal processing unit includes a first amplification sub-circuit for amplifying the data driving signal or the first information data by a preset amplification factor.
3. The control circuit of the display panel according to claim 2, wherein the first amplifying sub-circuit comprises a first transistor, a first buffer capacitor, a second buffer capacitor, a first resistor, and a second resistor;
the first end of the first buffer capacitor is connected with the control electrode of the first transistor, and the second end of the first buffer capacitor is connected with the data driving sub-circuit and the data acquisition sub-circuit of the first transmission unit; the first end of the first resistor is connected with the control electrode of the first transistor, and the second end of the first resistor is connected with the second electrode of the first transistor; the first end of the second buffer capacitor is connected with the first pole of the first transistor, and the second end of the second buffer capacitor is connected with the first control unit; the first end of the second resistor is connected with the first pole of the first transistor, and the second end of the second resistor is connected with the second pole of the first transistor.
4. The control circuit of the display panel according to claim 2, further comprising: a plurality of second control units for preprocessing the first information data; wherein the content of the first and second substances,
the first end of each second control unit is connected with one signal processing unit, and the second end of each second control unit is connected with one data driving sub-circuit and one data acquisition sub-circuit of the first transmission unit; and different second control units are connected with different signal processing units, and different second control units are connected with different data driving sub-circuits and different data acquisition sub-circuits of the first transmission units.
5. The control circuit of the display panel according to claim 4, further comprising: a plurality of second amplification sub-circuits; the first end of each second amplification sub-circuit is connected with one second control unit, and the second end of each second amplification sub-circuit is connected with the data driving sub-circuit and the data acquisition sub-circuit of one first transmission unit; the different second amplification sub-circuits are connected with the different second control units, and the different second amplification sub-circuits are connected with the different data driving sub-circuits and the different acquisition sub-circuits of the first transmission units.
6. The control circuit of the display panel according to claim 4, wherein each of the sub-panels further comprises a gate driving circuit provided at least one of the second and third sides of the sub-panel, wherein the first side is provided between the second and third sides;
the second end of each second control unit is connected with the gate drive circuit.
7. The control circuit of the display panel according to claim 1, wherein each of the signal processing units comprises a first differential-to-single-terminal circuit, a second differential-to-single-terminal circuit, a first single-ended differential-to-differential molecular circuit, and a second single-ended differential-to-differential molecular circuit; wherein the content of the first and second substances,
in one signal processing unit, a first end of the first differential-to-single-terminal circuit is connected to the first control unit, and a second end of the first differential-to-single-terminal circuit is connected to a first end of the first single-ended differential-to-differential molecular circuit; the second end of the first single-ended slip molecular circuit is connected with the acquisition sub-circuit of the first transmission unit connected with the signal processing unit;
the first end of the second differential-to-single-terminal circuit is connected with the data driving sub-circuit of the first transmission unit connected with the signal processing unit, and the second end of the second differential-to-single-terminal circuit is connected with the first end of the second single-ended differential-to-differential molecular circuit; and the second end of the second single-ended slip molecular circuit is connected with the first control unit.
8. The control circuit of claim 7, wherein each of the sub-panels of the display panel further comprises a gate driving circuit disposed at least one of the second side and the third side of the sub-panel, wherein the first side is disposed between the second side and the third side;
the first control unit is connected with each gate drive circuit.
9. The control circuit of the display panel according to any one of claims 1 to 8, further comprising: and the time sequence controller is connected with the first control unit and provides the first time sequence signal for the first control unit.
10. A display panel comprising the control circuit of the display panel according to any one of claims 1 to 9.
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