CN113094295A - Data storage management method, NAND Flash controller and computer storage medium - Google Patents

Data storage management method, NAND Flash controller and computer storage medium Download PDF

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CN113094295A
CN113094295A CN202110406670.3A CN202110406670A CN113094295A CN 113094295 A CN113094295 A CN 113094295A CN 202110406670 A CN202110406670 A CN 202110406670A CN 113094295 A CN113094295 A CN 113094295A
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data
block
physical
stored
nand flash
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余恒昌
谢长华
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Chipsbank Technologies Shenzhen Co ltd
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Chipsbank Technologies Shenzhen Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0253Garbage collection, i.e. reclamation of unreferenced memory

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  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The embodiment of the application discloses a data storage management method, a NAND Flash controller and a computer storage medium, so that a NAND Flash memory has sufficient empty blocks when executing write operation, and the problem of blocking caused by insufficient number of the empty blocks is avoided. The embodiment of the application comprises the following steps: when the NAND Flash controller executes the write operation of data, the effective data in the garbage blocks can be continuously recovered, and the effective data in the garbage blocks are moved to the recovery blocks, so that the garbage blocks become empty blocks, and the empty block resources of the NAND Flash can be continuously supplemented, thereby ensuring that sufficient empty blocks can be used when the data is written in, and solving the problem of blocking caused by insufficient empty block quantity.

Description

Data storage management method, NAND Flash controller and computer storage medium
Technical Field
The embodiment of the application relates to the field of data storage, in particular to a data storage management method, a NAND Flash controller and a computer storage medium.
Background
NAND Flash is a large-capacity memory device and has the characteristics of large capacity, high read-write speed and the like. A NAND Flash device is divided into blocks (physical blocks) from the internal structure. One block is divided into pages (physical pages). block is the minimum unit of erase for NAND Flash. page is the minimum read-write unit of NAND Flash.
When the NAND Flash adopts a block mapping method for data storage management, a plurality of physical blocks are used to store valid data, invalid data, and a blank space to be written of one logical block. When data of a plurality of logic blocks need to be written in a short time, if the data of the logic blocks do not have too many spare blocks to write in, defragmentation is needed, and valid data stored in a certain physical block is moved to another physical block, so that the storage space of the physical block is released and becomes an empty block. The empty block refers to a physical block that does not store valid data, i.e., a blank physical block.
However, the existing defragmentation technology still cannot ensure that the NAND Flash has enough empty blocks to write data. The read operation and the write operation of the NAND Flash are in page units, the erase operation is in block units, and the erase operation must be performed before the write operation, that is, the defragmentation is performed in block units, and data can be written into the block after the block erase. With the updating and upgrading of NAND Flash products, the storage capacity of a single block is larger and larger, and if the block is still used as a basic mapping unit, the NAND Flash can generate a stuck phenomenon every time the defragmentation operation is performed, so that the use of a user is seriously influenced.
Disclosure of Invention
The embodiment of the application provides a data storage management method, a NAND Flash controller and a computer storage medium, so that the NAND Flash memory has sufficient empty blocks when executing write operation, and the problem of blocking caused by insufficient number of the empty blocks is avoided.
A first aspect of an embodiment of the present application provides a data storage management method, where the method is applied to a NAND Flash controller, and the method includes:
receiving a data writing instruction;
responding to the data writing instruction, receiving data to be stored indicated by the data writing instruction, and writing the data to be stored into an empty block, wherein the empty block is a blank physical block which does not store valid data;
updating a VPC value of an effective page count value of a physical block, wherein the VPC value is the number of physical pages storing effective data in one physical block, and the type of the physical block comprises a data block;
determining a VPC value of each data block, determining the data block with the smallest VPC value and not zero in all the data blocks as a garbage block, and arbitrarily designating at least one empty block as a recovery block;
and moving the valid data in the garbage block to the recovery block until the VPC value of the garbage block is reduced to zero and becomes an empty block.
A second aspect of the embodiments of the present application provides a NAND Flash controller, where the NAND Flash controller is applied to a NAND Flash memory, and the NAND Flash controller includes:
the receiving unit is used for receiving a data writing instruction, responding to the data writing instruction, receiving data to be stored indicated by the data writing instruction, and writing the data to be stored into an empty block, wherein the empty block is a blank physical block which does not store valid data;
the device comprises an updating unit, a storage unit and a processing unit, wherein the updating unit is used for updating a valid page count value VPC value of a physical block, the VPC value is the number of physical pages storing valid data in one physical block, and the type of the physical block comprises a data block;
the determining unit is used for determining the VPC value of each data block, determining the data block with the VPC value which is the minimum and is not zero in all the data blocks as a garbage block, and arbitrarily appointing at least one empty block as a recovery block;
and the recovery unit is used for moving the valid data in the garbage block to the recovery block until the VPC value of the garbage block is reduced to zero and becomes an empty block.
A third aspect of the embodiments of the present application provides a NAND Flash controller, where the NAND Flash controller is applied to a NAND Flash memory, and the NAND Flash controller includes:
a memory for storing a computer program; a processor for implementing the steps of the data storage management method according to the first aspect when executing the computer program.
A fourth aspect of embodiments of the present application provides a computer storage medium having instructions stored therein, which when executed on a computer, cause the computer to perform the method of the first aspect.
According to the technical scheme, the embodiment of the application has the following advantages:
in the embodiment of the application, the NAND Flash controller can continuously recover the effective data in the garbage block when executing the write operation of data, and move the effective data in the garbage block to the recovery block, so that the garbage block becomes an empty block, and the empty block resource of the NAND Flash can be continuously supplemented, thereby ensuring that sufficient empty blocks can be used when the data is written in, and solving the problem of blocking caused by insufficient number of the empty blocks.
Drawings
FIG. 1 is a schematic flow chart illustrating a data storage management method according to an embodiment of the present application;
FIG. 2 is a schematic flow chart illustrating a data storage management method according to an embodiment of the present application;
FIG. 3 is a schematic structural diagram of a NAND Flash controller in the embodiment of the present application;
fig. 4 is a schematic diagram of another structure of the NAND Flash controller in the embodiment of the present application.
Detailed Description
The embodiment of the application provides a data storage management method, a NAND Flash controller and a computer storage medium, so that the NAND Flash memory has sufficient empty blocks when executing write operation, and the problem of blocking caused by insufficient number of the empty blocks is avoided.
Referring to fig. 1, an embodiment of a data storage management method in the embodiment of the present application includes:
101. receiving data to be stored, and writing the data to be stored into an empty block;
the method of the embodiment can be applied to a NAND Flash controller, the NAND Flash controller can be arranged in a NAND Flash memory, and the NAND Flash controller can realize management of the data storage process of the NAND Flash when executing the method of the embodiment. Further, the NAND Flash can be applied to any computer device, the computer device serving as the upper computer can perform operations such as data writing, data reading, data erasing and the like on the NAND Flash, and the NAND Flash controller performs management operations on data stored in the NAND Flash according to instructions of the upper computer.
Therefore, when data needs to be written in, the NAND Flash controller receives a data writing instruction issued by the upper computer, so that the NAND Flash controller responds to the data writing instruction, receives the data to be stored indicated by the data writing instruction, takes an empty block in the NAND Flash as a cache block of cache data, and writes the data to be stored in the cache block. The empty block is a blank physical block which does not store valid data.
102. Updating the VPC value of the effective page count value of the physical block;
in the process of writing data into the empty block, the NAND Flash controller continuously updates a valid page count value VPC (VPC) of each physical block. The VPC value is the number of physical pages storing valid data in one physical block. For example, if the number of physical pages storing valid data in a certain physical block is 3, the VPC value of the physical block is 3, and so on, the VPC value of any physical block can be determined according to the number of physical pages storing valid data.
In this embodiment, the physical block has multiple categories, including a data block, a cache block, a recycle block, a table block, a bad block, and the like, where the data block is used to store user data, and the table block is used to store a table.
103. Determining a VPC value of each data block, determining the data block with the smallest VPC value and not zero in all the data blocks as a garbage block, and arbitrarily designating at least one empty block as a recovery block;
in this embodiment, if a plurality of physical blocks of the NAND Flash include data blocks, the NAND Flash controller determines a VPC value of each data block, and determines a data block with a VPC value that is the smallest and is not zero among all the data blocks as a garbage block. The NAND Flash controller can randomly designate at least one empty block as a recovery block, and the recovery block is used for recovering effective data in the garbage block.
104. Moving the valid data in the garbage block to a recovery block until the VPC value of the garbage block is reduced to zero and becomes an empty block;
after the garbage block and the recovery block are determined, the valid data in the garbage block is moved to the recovery block, that is, the valid data in the garbage block is stored in the recovery block, so that the data volume of the valid data stored in the garbage block is reduced, which also means that the VPC value of the garbage block is reduced along with the movement of the valid data, and when the VPC value of the garbage block is reduced to zero, it means that the valid data of the garbage block is completely moved, and the garbage block becomes an empty block. The NAND Flash controller can continuously recover the effective data in the garbage blocks and release the physical page space occupied by the invalid data in the garbage blocks, thereby obtaining continuous empty blocks and ensuring that sufficient empty blocks can be used when data is written.
In this embodiment, when the NAND Flash controller executes a data write operation, the NAND Flash controller may continuously recover the valid data in the garbage block, and move the valid data in the garbage block to the recovery block, so that the garbage block becomes an empty block, and the empty block resource of the NAND Flash may be continuously supplemented, thereby ensuring that sufficient empty blocks may be used when data is written, and solving a stutter problem caused by insufficient empty block quantity.
The embodiments of the present application will be described in further detail below on the basis of the aforementioned embodiment shown in fig. 1. Referring to fig. 2, another embodiment of the data storage management method in the embodiment of the present application includes:
201. establishing a global page mapping table;
in this embodiment, the NAND Flash controller further establishes a global page mapping table, where the global page mapping table is used to record a mapping relationship between a logical page address and a physical page address, and a physical page address mapped to any logical page address can be determined according to the mapping relationship recorded by the global page mapping table.
Meanwhile, the NAND Flash controller can also establish a VPC table according to the VPC value of the physical block, and the VPC table records the VPC value of any physical block. When determining the garbage block, only traversing the VPC table can determine that the data block with the VPC value being minimum and not zero in the VPC table is the garbage block.
In addition, the present embodiment may also establish a block characteristic table, record the usage and characteristics of each physical block using the block characteristic table, and distinguish the types of physical blocks according to the usage and characteristics of the physical blocks recorded in the block characteristic table. For example, the types of physical blocks include, but are not limited to, data blocks, cache blocks, recycle blocks, table blocks, bad blocks, etc., where the data blocks are used to store user data, and the table blocks are used to store tables, the block property table may record the use and properties of any physical block, and all data blocks may be determined from the plurality of physical blocks when selecting garbage blocks according to the recorded use and properties of the data blocks.
202. Receiving data to be stored, and writing the data to be stored into an empty block;
in this embodiment, the NAND Flash controller receives a data write instruction issued by the upper computer, where the data write instruction indicates to write data to be stored. When the data to be stored is user data, the data to be stored can be written into the cache block. And tables such as the global page mapping table, the VPC table and the like can be stored in the table block.
After the global page mapping table is established, when the storage address of the data changes, the global page mapping table needs to be updated. In one of the updating scenarios, after the NAND Flash controller writes the data to be stored into the empty block, the mapping relationship in the global page mapping table needs to be updated, that is, after the data to be stored is written into the empty block, the current physical page address of the data to be stored is determined, and the mapping relationship between the logical page address of the data to be stored in the global page mapping table and the original physical page address is modified into the mapping relationship between the logical page address of the data to be stored and the current physical page address of the data to be stored. And the original physical page address of the data to be stored is a physical page address corresponding to a physical block where the data to be stored is located before the data to be stored is written into the empty block.
For example, the data to be stored is already stored in the physical block 1 before the empty block is written, and the mapping relationship recorded by the global page mapping table is the mapping relationship between the logical page address of the data to be stored and the physical page address corresponding to the physical block 1; after the data to be stored is written into the cache block, because the storage address of the data to be stored is changed, the original mapping relation is updated, and the mapping relation between the logical page address of the data to be stored and the physical page address corresponding to the physical block 1 is modified into the mapping relation between the logical page address of the data to be stored and the current physical page address of the data to be stored.
In addition, if the data to be stored is not stored in any physical block before, after the data to be stored is written into an empty block, the NAND Flash controller only needs to add a new mapping relationship in the global page mapping table, that is, the new mapping relationship between the logical page address of the data to be stored and the current physical page address of the data to be stored.
By establishing the global page mapping table and updating and maintaining the global page mapping table, the physical page address corresponding to the storage position of the data can be conveniently searched when the data is read, and the data reading is convenient.
Specifically, when data is read from the NAND Flash, the NAND Flash controller receives a data reading instruction of an upper computer (i.e., a computer device where the NAND Flash is located), the data reading instruction carries a target logical address, after the NAND Flash controller receives the target logical address, the target logical address is converted into a target logical page address, a target physical page address corresponding to the target logical page address is determined from a global page mapping table, then the data is read from a physical page indicated by the target physical page address, and the read data is returned to the upper computer.
Therefore, when the data storage is changed, the mapping relationship recorded in the global page mapping table needs to be updated, so that the subsequent data reading step can be accurately completed.
203. Updating the VPC value of the effective page count value of the physical block;
in this embodiment, a specific manner of updating the VPC value of the physical block may be that, when each pair of target physical pages writes data to be stored, 1 is added to the VPC value of the physical block where the target physical page is located, and 1 is subtracted from the VPC value of the physical block where the data to be stored is located before the target physical page is written.
For example, the physical block where the data to be stored is located before the data to be stored is written into the target physical page is physical block 1, the physical block where the target physical page is located is physical block 2, after the data to be stored is written into the physical block 2, the VPC value of the physical block 1 is decreased by 1, and the VPC value of the physical block 2 is increased by 1, which indicates that the number of physical pages where the physical block 1 stores valid data is decreased by 1, and the number of physical pages where the physical block 2 stores valid data is increased by 1.
In this embodiment, the data write instruction carries a logical address, where the logical address carried by the data write instruction is used to indicate a logical address corresponding to a physical block where the data to be stored is located before the data to be stored is written into the target physical page. Therefore, when the physical block where the data to be stored is located before the target physical page is written is determined, the determination can be performed according to the logical address carried by the data writing instruction, and then the VPC value of the physical block indicated by the logical address carried by the data writing instruction can be directly subtracted by 1. For example, following the above example, if the physical block indicated by the logical address carried by the data write instruction is physical block 1, the VPC value of physical block 1 may be directly decremented by 1.
204. Determining a VPC value of each data block, determining the data block with the smallest VPC value and not zero in all the data blocks as a garbage block, and arbitrarily designating at least one empty block as a recovery block;
in this embodiment, the VPC table is established and the VPC value of the physical block recorded in the VPC table is updated, so that the garbage block can be quickly determined by querying the VPC table and the block property table, and an empty block in which at least one VPC value in the VPC table is zero can be arbitrarily designated as the recycle block.
205. Moving the valid data in the garbage block to a recovery block until the VPC value of the garbage block is reduced to zero and becomes an empty block;
similarly, after the valid data in the garbage block is moved to the recycle block, the VPC value of the garbage block and the VPC value of the recycle block also need to be updated.
When all available physical pages of the recycle block are written with data, that is, the recycle block is full, the recycle block cannot write data again, other empty blocks need to be additionally designated as recycle blocks, the newly designated recycle block is used for continuously recycling the valid data in the garbage block, and the recycle block full of data is converted into a common data block.
In this embodiment, another scenario of updating the global page mapping table is that, after the valid data in the garbage block is moved to the recovery block, the current physical page address of the valid data of the recovery block is determined, and a mapping relationship between the logical page address of the valid data of the recovery block in the global page mapping table and the original physical page address is modified to a mapping relationship between the logical page address of the valid data of the recovery block and the current physical page address of the valid data of the recovery block. If the valid data of the recovery block is the valid data moved from the garbage block to the recovery block, the original physical page address of the valid data of the recovery block is the physical page address corresponding to the garbage block.
For example, before the valid data 1 in the garbage block is moved to the recovery block, the mapping relationship recorded by the global page mapping table is the mapping relationship between the logical page address of the valid data 1 and the physical page address corresponding to the garbage block where the valid data 1 is located; after the valid data 1 is moved to the recycle block, the mapping relationship should be modified to the mapping relationship between the logical page address of the valid data 1 and the physical page address corresponding to the recycle block.
In the embodiment, the effective data in the garbage block is moved, so that the NAND Flash can continuously obtain the empty block, meanwhile, the read-write operation of the data and the moving of the effective data of the garbage block can be alternately performed, sufficient empty blocks are ensured to be available during the data read-write, the pressure of writing the data is reduced, and the problem of blocking is avoided.
In the above description on the data storage management method in the embodiment of the present application, the following description is made on the NAND Flash controller in the embodiment of the present application, referring to fig. 3, and an embodiment of the NAND Flash controller in the embodiment of the present application includes:
the NAND Flash controller is applied to the NAND Flash memory, and comprises:
a receiving unit 301, configured to receive a data writing instruction, respond to the data writing instruction, receive data to be stored indicated by the data writing instruction, and write the data to be stored into an empty block, where the empty block is a blank physical block in which valid data is not stored;
an updating unit 302, configured to update a VPC value of a valid page count value of a physical block, where the VPC value is the number of physical pages storing valid data in one physical block, and the type of the physical block includes a data block;
a determining unit 303, configured to determine a VPC value of each data block, determine a data block with a VPC value that is the smallest and is not zero among all the data blocks as a garbage block, and arbitrarily designate at least one empty block as a recovery block;
and the recovery unit 304 is used for moving the valid data in the garbage block to the recovery block until the VPC value of the garbage block is reduced to zero and becomes an empty block.
In a preferred embodiment of this embodiment, the NAND Flash controller further includes:
the establishing unit 305 is configured to establish a global page mapping table, where the global page mapping table is used to record a mapping relationship between a logical page address and a physical page address.
In a preferred implementation manner of this embodiment, the updating unit 302 is further configured to determine a current physical page address of the data to be stored; and modifying the mapping relation between the logic page address of the data to be stored and the original physical page address in the global page mapping table into the mapping relation between the logic page address of the data to be stored and the current physical page address of the data to be stored.
In a preferred embodiment of this embodiment, the NAND Flash controller further includes:
a data reading unit 306, configured to receive a data reading instruction, where the data reading instruction carries a target logical address; converting the target logical address into a target logical page address, and determining a target physical page address corresponding to the target logical page address according to a global page mapping table; and reading data from the physical page indicated by the target physical page address.
In a preferred implementation manner of this embodiment, the updating unit 302 is further configured to determine a current physical page address of valid data of the recycle block; and modifying the mapping relation between the logical page address of the effective data of the recovery block and the original physical page address in the global page mapping table into the mapping relation between the logical page address of the effective data of the recovery block and the current physical page address of the effective data of the recovery block.
In a preferred implementation manner of this embodiment, the updating unit 302 is specifically configured to, when data to be stored is written into each pair of target physical pages, add 1 to the VPC value of the physical block in which the target physical page is located, and subtract 1 from the VPC value of the physical block in which the data to be stored is located before the data to be stored is written into the target physical page;
the data writing instruction carries a logical address, and the logical address carried by the data writing instruction is used for representing a logical address corresponding to a physical block where the data to be stored is located before the data to be stored is written into the target physical page; the update unit 302 is specifically configured to subtract 1 from the VPC value of the physical block indicated by the logical address carried by the data write instruction.
In a preferred implementation manner of this embodiment, the creating unit 305 is further configured to create a block property table, and record the usage and the property of each physical block by using the block property table;
the determining unit 303 is specifically configured to determine all data blocks from the multiple physical blocks according to the usage and characteristics of the data blocks recorded in the block characteristic table, and determine a data block with a minimum VPC value and no zero in all data blocks as a garbage block.
In this embodiment, operations performed by each unit in the NAND Flash controller are similar to those described in the embodiments shown in fig. 1 to fig. 2, and are not described again here.
In this embodiment, when the NAND Flash controller executes a data write operation, the NAND Flash controller may continuously recover the valid data in the garbage block, and move the valid data in the garbage block to the recovery block, so that the garbage block becomes an empty block, and the empty block resource of the NAND Flash may be continuously supplemented, thereby ensuring that sufficient empty blocks may be used when data is written, and solving a stutter problem caused by insufficient empty block quantity.
Referring to fig. 4, a description is given below of a NAND Flash controller in an embodiment of the present application, where an embodiment of the NAND Flash controller in the embodiment of the present application includes:
the NAND Flash controller 400 may include one or more Central Processing Units (CPUs) 401 and a memory 405, where the memory 405 stores one or more applications or data.
Memory 405 may be volatile storage or persistent storage, among other things. The program stored in memory 405 may include one or more modules, each of which may include a series of instruction operations in a NAND Flash controller. Further, central processor 401 may be configured to communicate with memory 405 to perform a series of instruction operations in memory 405 on NAND Flash controller 400.
NAND Flash controller 400 may also include one or more power supplies 402, one or more wired or wireless network interfaces 403, one or more input-output interfaces 404, and/or one or more operating systems, such as Windows ServerTM, Mac OS XTM, UnixTM, LinuxTM, FreeBSDTM, etc.
The central processing unit 401 may perform the operations performed by the NAND Flash controller in the embodiments shown in fig. 1 to fig. 2, and details thereof are not described herein.
An embodiment of the present application further provides a computer storage medium, where one embodiment includes: the computer storage medium stores instructions that, when executed on a computer, cause the computer to perform the operations performed by the NAND Flash controller in the embodiments of fig. 1-2.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or contributed to by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and the like.

Claims (10)

1. A data storage management method is applied to a NAND Flash controller, and comprises the following steps:
receiving a data writing instruction;
responding to the data writing instruction, receiving data to be stored indicated by the data writing instruction, and writing the data to be stored into an empty block, wherein the empty block is a blank physical block which does not store valid data;
updating a VPC value of an effective page count value of a physical block, wherein the VPC value is the number of physical pages storing effective data in one physical block, and the type of the physical block comprises a data block;
determining a VPC value of each data block, determining the data block with the smallest VPC value and not zero in all the data blocks as a garbage block, and arbitrarily designating at least one empty block as a recovery block;
and moving the valid data in the garbage block to the recovery block until the VPC value of the garbage block is reduced to zero and becomes an empty block.
2. The method of claim 1, further comprising:
and establishing a global page mapping table, wherein the global page mapping table is used for recording the mapping relation between the logical page address and the physical page address.
3. The method of claim 2, wherein after writing the data to be stored to an empty block, the method further comprises:
determining the current physical page address of the data to be stored;
and modifying the mapping relation between the logic page address of the data to be stored and the original physical page address in the global page mapping table into the mapping relation between the logic page address of the data to be stored and the current physical page address of the data to be stored.
4. The method of claim 2, further comprising:
receiving a data reading instruction, wherein the data reading instruction carries a target logic address;
converting the target logic address into a target logic page address, and determining a target physical page address corresponding to the target logic page address according to the global page mapping table;
and reading data from the physical page indicated by the target physical page address.
5. The method of claim 2, wherein after moving the valid data in the garbage block to the reclaim block, the method further comprises:
determining the current physical page address of the valid data of the recovery block;
and modifying the mapping relation between the logical page address of the effective data of the recovery block and the original physical page address in the global page mapping table into the mapping relation between the logical page address of the effective data of the recovery block and the current physical page address of the effective data of the recovery block.
6. The method of claim 1, wherein updating the valid page count Value (VPC) value of the physical block comprises:
when the data to be stored is written into a target physical page, adding 1 to the VPC value of the physical block where the target physical page is located, and subtracting 1 from the VPC value of the physical block where the data to be stored is located before the data to be stored is written into the target physical page;
the data writing instruction carries a logical address, and the logical address carried by the data writing instruction is used for representing a logical address corresponding to a physical block where the data to be stored is located before the data to be stored is written into the target physical page; then subtracting 1 from the VPC value of the physical block in which the data to be stored is located before being written into the target physical page includes:
and subtracting 1 from the VPC value of the physical block indicated by the logical address carried by the data writing instruction.
7. The method according to any one of claims 1 to 6, further comprising:
establishing a block characteristic table, and recording the use and the characteristics of each physical block by using the block characteristic table;
the determining a data block with a minimum VPC value and not zero among all data blocks as a garbage block includes:
and determining all data blocks from the plurality of physical blocks according to the purpose and the characteristics of the data blocks recorded by the block characteristic table, and determining the data block with the minimum VPC value and not zero in all the data blocks as a garbage block.
8. A NAND Flash controller, wherein the NAND Flash controller is applied to a NAND Flash memory, the NAND Flash controller comprising:
the receiving unit is used for receiving a data writing instruction, responding to the data writing instruction, receiving data to be stored indicated by the data writing instruction, and writing the data to be stored into an empty block, wherein the empty block is a blank physical block which does not store valid data;
the device comprises an updating unit, a storage unit and a processing unit, wherein the updating unit is used for updating a valid page count value VPC value of a physical block, the VPC value is the number of physical pages storing valid data in one physical block, and the type of the physical block comprises a data block;
the determining unit is used for determining the VPC value of each data block, determining the data block with the VPC value which is the minimum and is not zero in all the data blocks as a garbage block, and arbitrarily appointing at least one empty block as a recovery block;
and the recovery unit is used for moving the valid data in the garbage block to the recovery block until the VPC value of the garbage block is reduced to zero and becomes an empty block.
9. A NAND Flash controller, wherein the NAND Flash controller is applied to a NAND Flash memory, the NAND Flash controller comprising:
a memory for storing a computer program; a processor for implementing the steps of the data storage management method according to any one of claims 1 to 7 when executing said computer program.
10. A computer storage medium having stored therein instructions that, when executed on a computer, cause the computer to perform the method of any one of claims 1 to 7.
CN202110406670.3A 2021-04-15 2021-04-15 Data storage management method, NAND Flash controller and computer storage medium Pending CN113094295A (en)

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Citations (3)

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Publication number Priority date Publication date Assignee Title
CN103150258A (en) * 2013-03-20 2013-06-12 中国科学院苏州纳米技术与纳米仿生研究所 Writing, reading and garbage collection method of solid-state memory system
CN109960663A (en) * 2017-12-22 2019-07-02 三星电子株式会社 Execute the storage device of garbage reclamation and the rubbish recovering method of storage device
CN111930301A (en) * 2020-06-29 2020-11-13 深圳佰维存储科技股份有限公司 Garbage recycling optimization method and device, storage medium and electronic equipment

Patent Citations (3)

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Publication number Priority date Publication date Assignee Title
CN103150258A (en) * 2013-03-20 2013-06-12 中国科学院苏州纳米技术与纳米仿生研究所 Writing, reading and garbage collection method of solid-state memory system
CN109960663A (en) * 2017-12-22 2019-07-02 三星电子株式会社 Execute the storage device of garbage reclamation and the rubbish recovering method of storage device
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