CN113093619A - Method and device for controlling power-on and power-off time sequence, chip and storage medium - Google Patents
Method and device for controlling power-on and power-off time sequence, chip and storage medium Download PDFInfo
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Abstract
The present disclosure provides a method and an apparatus for controlling power-on and power-off timing sequence, a chip, and a storage medium, including: when the upper computer is in a standby state or a working state, the state change of the upper computer is monitored, the prestored power-on or power-off time sequence information corresponding to the combined system is obtained when the state change of the upper computer is monitored, the power-on or power-off control signal is generated according to the time sequence information, the power-on or power-off of each functional device of the combined system is controlled according to the control signal, and the control signal is generated based on the prestored time sequence information when the state change of the upper computer is monitored, so that the corresponding power-on or power-off time sequence control of each device is carried out based on the control signal, the influence of artificial subjective factors on the power-on or power-off time sequence control is avoided, the automatic control of a power supply of the combined system is realized, the working reliability of the combined system is improved, and the cost caused by the arrangement of a plurality of switches is reduced.
Description
Technical Field
The present disclosure relates to the field of power control technologies, and in particular, to a method and an apparatus for controlling a power-on/power-off timing sequence, a chip, and a storage medium.
Background
With the development of scientific technology, modules and/or chips with different functions can be combined (or integrated) to obtain a combined system including modules and/or chips with different functions.
In the prior art, for a combined system, a plurality of switches may be provided, for example, each module and/or chip corresponds to one switch, and a worker manually starts the plurality of switches respectively, so as to control a power-on or power-off sequence of the combined system.
However, in the process of implementing the present disclosure, the inventors found that at least the following problems exist: when the power-on or power-off sequence of the combined system is controlled manually by a worker, the power-on or power-off sequence may be reversed due to the influence of human factors, so that the combined system cannot normally operate.
Disclosure of Invention
The present disclosure provides a method and an apparatus for controlling power-on and power-off timing, a chip, and a storage medium, so as to solve the problems in the prior art.
On one hand, the embodiment of the disclosure provides a control method of a power-on and power-off time sequence, which is applied to a combined system at least comprising an upper computer and N functional devices, wherein N is a positive integer, and the method comprises the following steps:
when the upper computer is in a standby state or a working state, monitoring the state change of the upper computer;
when the state of the upper computer is monitored to change, acquiring prestored power-on or power-off time sequence information of the combined system;
generating a power-on or power-off control signal according to the time sequence information;
and controlling the power-on or power-off of each functional device of the combined system according to the control signal.
In some embodiments, when it is monitored that the state of the upper computer is changed from a standby state to a working state, pre-stored power-on timing information of the combined system is acquired;
and when the state of the upper computer is monitored to be changed from the working state to the standby state, acquiring pre-stored power-off time sequence information of the combined system.
In some embodiments, the timing information includes sequence information of power-on or power-off of each functional device of the combined system; the generating of the power-on or power-off control signal according to the timing information includes: generating a control signal for controlling each functional module to be powered on or powered off according to the sequence information and a preset time interval;
alternatively, the first and second electrodes may be,
the time sequence information comprises sequence information and time interval information of power-on or power-off of each functional device of the combined system; the generating of the power-on or power-off control signal according to the timing information includes: and generating a control signal for controlling each functional module to be powered on or powered off according to the sequence information and the time interval.
In some embodiments, the power-on timing information of the combined system is designed according to the sequence of the functional devices in the combined system;
the power-down sequence of the combined system is opposite to the power-up sequence.
In some embodiments, said controlling the power-on or power-off of the functional devices of the combined system according to the control signal comprises:
and sequentially controlling the power-on or power-off of the N pieces of functional equipment in the combined system according to the time sequence information.
In some embodiments, the monitoring the change of the upper computer state includes:
in response to monitoring the operation information for starting the upper computer, collecting a first key value generated by the operation information and collecting a second key value corresponding to a preset delay;
judging whether the first key value and the second key value are the same;
and if so, determining that the state of the upper computer is changed.
In some embodiments, the functional devices include at least an ultrasound imaging device and an elasticity detection device.
In another aspect, an embodiment of the present disclosure further provides a device for controlling power-on and power-off timing, where the device includes:
the monitoring module is used for monitoring the state change of the upper computer when the upper computer is in a standby state or a working state;
the system comprises an acquisition module, a processing module and a control module, wherein the acquisition module is used for acquiring pre-stored power-on or power-off time sequence information corresponding to a combined system when the state of the upper computer changes, the combined system is provided with N pieces of functional equipment, and N is a positive integer;
the generating module is used for generating a power-on or power-off control signal according to the time sequence information;
and the control module is used for controlling the power-on or power-off of each functional device of the combined system according to the control signal.
In some embodiments, the obtaining module is configured to obtain pre-stored power-on timing information of the combination system when it is monitored that the state of the upper computer is changed from a standby state to a working state;
the acquisition module is used for acquiring pre-stored power-off time sequence information of the combined system when the state of the upper computer is monitored to be changed from a working state to a standby state.
In some embodiments, the timing information includes sequence information of power-on or power-off of each functional device of the combined system; the generating of the power-on or power-off control signal according to the timing information includes: generating a control signal for controlling each functional module to be powered on or powered off according to the sequence information and a preset time interval;
alternatively, the first and second electrodes may be,
the time sequence information comprises sequence information and time interval information of power-on or power-off of each functional device of the combined system; the generating of the power-on or power-off control signal according to the timing information includes: and generating a control signal for controlling each functional module to be powered on or powered off according to the sequence information and the time interval.
In some embodiments, the power-on timing information of the combined system is designed according to the sequence of the functional devices in the combined system;
the power-down sequence of the combined system is opposite to the power-up sequence.
In some embodiments, the control module is configured to control the N functional devices in the combined system to be powered on or powered off in sequence according to the timing information.
In some embodiments, the monitoring module is configured to, when operation information for starting the upper computer is monitored, acquire a first key value generated by the operation information, acquire a second key value corresponding to a preset delay, determine whether the first key value and the second key value are the same, and if so, determine that a state of the upper computer changes.
In another aspect, an embodiment of the present disclosure further provides a chip, including: a memory, a processor;
a memory for storing the processor-executable instructions;
wherein the processor, when executing the instructions in the memory, is configured to implement a method as in any of the embodiments above.
In another aspect, the disclosed embodiments also provide a computer-readable storage medium, in which computer-executable instructions are stored, and when executed by a processor, the computer-executable instructions are used to implement the method according to any one of the above embodiments.
The present disclosure provides a control method and apparatus for power-on and power-off timing sequence, a chip, and a storage medium, where the control method is applied to a combination system at least including an upper computer and configured with N functional devices, where N is a positive integer, and the method includes: when the upper computer is in a standby state or a working state, monitoring the state change of the upper computer, when the state change of the upper computer is monitored, acquiring prestored power-on or power-off time sequence information corresponding to the combined system, generating a power-on or power-off control signal according to the time sequence information, controlling the power-on or power-off of each functional device of the combined system according to the control signal, and when the state change of the upper computer is monitored, generating the control signal based on the prestored time sequence information so as to control the corresponding power-on or power-off time sequence of each device based on the control signal; on the other hand, cost reduction due to the provision of a plurality of switches can also be achieved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and together with the description, serve to explain the principles of the application.
Fig. 1 is a schematic flow chart illustrating a method for controlling power-on/power-off timing according to an embodiment of the disclosure;
fig. 2 is a schematic flowchart of a method for monitoring a state change of an upper computer according to an embodiment of the present disclosure;
fig. 3 is a schematic view of an application scenario of a control method of power-on/power-off timing sequence according to an embodiment of the disclosure;
FIG. 4 is a schematic diagram of a control device for power-up and power-down timing sequence according to an embodiment of the disclosure;
FIG. 5 is a schematic diagram of a chip according to an embodiment of the disclosure;
with the foregoing drawings in mind, certain embodiments of the disclosure have been shown and described in more detail below. These drawings and written description are not intended to limit the scope of the disclosed concepts in any way, but rather to illustrate the concepts of the disclosure to those skilled in the art by reference to specific embodiments.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
It can be understood that, for a combined system including a plurality of functional device combinations (or integrations), the power-on or power-off timings of the respective functional devices are different due to the operating parameters of the respective functional devices themselves and the association relationship of the cooperative operations between the respective functional devices. If the power-on sequence is improperly controlled, the combined system may not identify one or more functional devices, which may cause the combined system to fail to work normally; if the power-off time sequence is improperly controlled, the combined system may be abnormally shut down and cannot be normally started next time.
Based on the above description of the background art, in the prior art, in order to avoid the problem of improper timing control of power-on or power-off, the adopted scheme is as follows: switches are respectively arranged for each functional device in the combined system, and the on/off sequence of each switch is controlled in a manual mode, so that the power-on or power-off time sequence is controlled. However, the on/off sequence of each switch is manually controlled, which is easily affected by subjective factors, and causes an error in the on/off sequence of the switches, thereby causing a technical problem that the combined system cannot normally operate.
In order to solve the above technical problems, the inventors of the present disclosure have made creative efforts to obtain the inventive concept of the present disclosure: by monitoring the state change of the upper computer, when the state of the upper computer changes, a control signal is generated based on the prestored power-on or power-off time sequence information, and corresponding power-on or power-off time sequence control is performed on each functional device based on the control signal. On one hand, the problem that the control of the power-on or power-off time sequence is influenced by human subjective factors can be avoided, so that the automatic control of the power supply of the combined system is realized, and the working reliability of the combined system is improved; on the other hand, cost reduction due to the provision of a plurality of switches can also be achieved.
The following describes the technical solutions of the present disclosure and how to solve the above technical problems with specific embodiments. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments. Embodiments of the present disclosure will be described below with reference to the accompanying drawings.
According to an aspect of the embodiments of the present disclosure, a method for controlling a power-on/power-off timing sequence is provided, which may be applied to a combination system including at least an upper computer and N pieces of functional devices, where N is a positive integer.
That is to say, the method implemented by the present disclosure may be applied to a combined system including an upper computer and including a plurality of functional modules and/or chips.
Referring to fig. 1, fig. 1 is a schematic flow chart illustrating a method for controlling a power-on/power-off timing according to an embodiment of the disclosure.
As shown in fig. 1, the method includes:
s101: and when the upper computer is in a standby state or a working state, monitoring the state change of the upper computer.
The execution main body of the embodiment of the present disclosure may be a control device of a power-on or power-off timing sequence, and may be simply referred to as a control device of a power-on and power-off timing sequence. In some embodiments, the control device of the power-on and power-off sequence may be a power control device connected to the upper computer and the N functional devices respectively; in other embodiments, the control device of the power-on/power-off timing sequence may also be a chip integrated in the upper computer, and the chip is further connected to the upper computer and the N functional devices, and the like.
In some embodiments, two functional devices may be included in the combined system, i.e., N equals 2, and when the combined system includes two functional devices, the two functional devices may be an ultrasound imaging device and an elasticity detection device, respectively.
It should be noted that the above examples are only used for exemplarily illustrating the number of the functional devices that may be included in the combined system and the types of the functional devices that may exist, and are not to be construed as a limitation on the number of the functional devices and a limitation on the types of the functional devices.
And it should be understood that each functional device may be divided into independent devices based on the functions implemented by each device in the combined system, or may be an integrated device, and the embodiments of the present application are not limited thereto. For example, the following exemplary descriptions can be made in connection with the functional devices in the above examples including an ultrasound imaging device and an elasticity detection device:
in some embodiments, two devices may be referred to as an ultrasound imaging device and an elasticity detection device based on their functionality implemented in a combined system; in other embodiments, the ultrasound imaging device and the elasticity detection device may be integrated into an integrated device, and the integrated device may implement respective functions of the ultrasound imaging device and the elasticity detection device.
In some embodiments, prior to S101, the method further comprises: and when the upper computer and each functional device are in a standby state, receiving power supply provided by any entity in the upper computer and each functional device.
If the power control device of the power-on/power-off sequence is taken as the power control device and the functional device comprises the ultrasonic imaging device and the elastic detection device, the power control device can receive the power provided by the upper computer, can also receive the power provided by the ultrasonic imaging device and can also receive the power provided by the elastic detection device.
That is, the upper computer may be in a standby state or an operating state. Therefore, in this step, monitoring the state change of the upper computer corresponds to monitoring the upper computer in a standby state or monitoring the upper computer in an operating state.
Specifically, the state change of the upper computer is monitored, which is equivalent to monitoring whether the state of the upper computer changes or not. By monitoring the state change of the upper computer, whether the state of the upper computer changes or not can be determined, so that the power-on or power-off of each component of the combined system (such as the functional devices in the above example including the ultrasonic imaging device and the elastic detection device) can be controlled in time.
For example, if the state of the upper computer is in a standby state, the state change of the upper computer is monitored to determine whether the upper computer is switched from the standby state to a working state, and if so, power-on control can be performed; similarly, if the state of the upper computer is in a working state, the state change of the upper computer is monitored to determine whether the upper computer is switched from the working state to a working stopping state (closed), and if so, power-off control is performed.
S102: and when the state of the upper computer is monitored to change, acquiring prestored power-on or power-off time sequence information corresponding to the combined system.
In some embodiments, when it is monitored that the state of the upper computer is changed from the standby state to the working state, the pre-stored power-on timing information of the combined system is acquired.
And when the state of the upper computer is monitored to be changed from the working state to the standby state, acquiring the pre-stored power-off time sequence information of the combined system.
The time sequence information is used to represent the power-on or power-off time of each component of the combined system, for example, the time sequence information includes power-on or power-off sequence information of each functional device of the combined system, and for example, the time sequence information includes power-on or power-off sequence information and time interval information of each functional device of the combined system. In the embodiment of the present disclosure, the timing information may be information of the time when each component of the combined system is powered on or powered off.
For example, in connection with the above example, when the functional device includes an ultrasound imaging device and an elasticity detection device, the timing information may be information of the time when the ultrasound imaging device and the elasticity detection device are powered on or powered off. That is, in the embodiments of the present disclosure, the timing information may be used to characterize the power-on time of the ultrasound imaging device and the power-on time of the elasticity detection device. For example, the ultrasound imaging device is powered on, the time delay is 1 second, and the elasticity detection device is powered on, that is, the elasticity detection device is powered on after 1 second of completing the power on of the ultrasound imaging device.
S103: and generating a power-on or power-off control signal according to the time sequence information.
That is, in this step, a control signal for controlling power-on or power-off of each functional device is generated in accordance with the timing information.
It should be noted that the state of the upper computer after the state change may be an operating state or a stop operating state. If the upper computer is switched from the standby state to the working state, the control signal is a control signal for electrifying; and if the upper computer is switched from the standby state to the work stopping state, the control signal is a control signal for powering off.
In some embodiments, the control signals may be generated sequentially according to timing information.
Based on the above analysis, the time sequence information includes the power-on or power-off sequence information of each functional device of the combined system, and the generating the control signal according to the time sequence information includes: and generating a control signal for controlling the power-on or power-off of each functional module according to the sequence information and a preset time interval.
Based on the above analysis, if the timing information includes sequence information and time interval information of powering on or powering off each functional device of the combined system, the generating the control signal according to the timing information includes: and generating a control signal for controlling the power-on or power-off of each functional module according to the sequence information and the time interval.
For example, in connection with the above example, when the functional device includes an ultrasound imaging device and an elasticity detection device, a control signal of power-up corresponding to the ultrasound imaging device may be generated, and after 1 second, a control signal of power-up corresponding to the elasticity detection device may be generated.
The power-on time sequence information of the combined system is designed according to the sequence of the use of each functional device in the combined system;
the power-down sequence of the combined system is opposite to the power-up sequence.
In other embodiments, the control signals may also be generated simultaneously based on timing information.
S104: and controlling the power-on or power-off of each functional device of the combined system according to the control signal.
In some embodiments, S104 may include: and sequentially controlling the N functional devices in the combined system to be powered on or powered off according to the time sequence information.
In some embodiments, if the control signals are generated simultaneously according to the timing information, the control signals may carry power-on or power-off time information.
The time information can be used for representing the time when each functional device of the combined system is powered on or powered off.
If the control signal carries power-on or power-off time information, S104 may include: and sequentially controlling the N functional devices in the combined system to be powered on or powered off according to the time information.
For example, in connection with the above example, when the functional device includes an ultrasound imaging device and an elasticity detection device, based on the current time, the ultrasound imaging device is powered on or powered off after +0.1 seconds from the current time, and the elasticity detection device is powered on or powered off after +0.2 seconds from the current time.
As can be seen from fig. 2 (fig. 2 is a schematic flowchart of a method for monitoring a state change of an upper computer according to an embodiment of the present disclosure), in some embodiments, S101 includes:
s11: when the operation information of starting the upper computer is monitored, a first key value generated by the operation information is collected, and a second key value corresponding to the preset delay is collected.
Wherein, the step may specifically include: the method comprises the steps of monitoring the pressing operation of starting the upper computer in real time (or monitoring based on time intervals), if the operation information is monitored, collecting a first key value generated by the operation information, and collecting a second key value after preset delay.
The operation information may include operation information generated by operating the main body of the upper computer, operation information generated by operating software configured on the upper computer, and the like. That is, the operation information may be derived from at least two aspects, one of which is operation information generated by operating hardware of the upper computer, and the other of which is operation information generated by operating software of the upper computer.
For example, an entity on/off button is provided on the upper computer, and the operation information generated by operating the entity on/off button can be understood as operation information generated by operating the hardware of the upper computer; for example, an operating system is provided in the upper computer, and the operation information generated by operating the power on/off operation of the operating system can be understood as operation information generated by operating software of the upper computer.
The key value (including the first key value and the second key value) is used for representing a value corresponding to the key operated and a value corresponding to the key not operated.
For example, if the value corresponding to the key being operated is 1 and the value corresponding to the key not being operated is 0, that is, if 1 represents the value when the key is operated and 0 represents the value when the key is not operated, in the embodiment of the present disclosure, the first key value is 1.
S12: and judging whether the first key value and the second key value are the same, if so, executing S13.
Based on the above example, if the first key value is 1, in this step, it is determined whether the second key value is also 1, and if the second key value is also 1, S13 is executed.
In some embodiments, if the first key value and the second key value are not the same, that is, if the second key value is 0, it is determined that the state of the upper computer has not changed.
S13: and determining that the state of the upper computer changes.
In the embodiment of the disclosure, whether the state of the upper computer changes can be accurately determined by judging whether the first key value and the second key value are the same. For example, if the first key value and the second key value are the same, it is indicated that there may be operation information, and it may be determined that the state of the upper computer has changed; if the first key value is different from the second key value, the jitter possibly caused by the interference of external factors or misoperation is illustrated. And whether the state of the upper computer is changed or not is accurately determined, so that the misoperation of power-on or power-off can be avoided, and the reliability of power-on or power-off is realized.
In order to better understand the scheme of the embodiment of the present disclosure, the method for controlling the power-on/power-off timing of the embodiment of the present disclosure is described in detail with reference to the application scenario shown in fig. 3.
As shown in fig. 3, the combined system includes a computer 100 (i.e., a host computer), an ultrasound imaging apparatus 200 and an elasticity detection apparatus 300, and in the present embodiment, the operation information is operation information generated by operating hardware of the host computer, and for the convenience of reading and understanding of the reader, in the present embodiment, is represented by a pressing operation.
It should be noted that fig. 3 only exemplarily shows a part of the devices of the combined system, and is not to be construed as a limitation of the constituent parts of the combined system.
In the initial state, the main switch of the combined system is in an open state. That is, in the initial state, before the computer 100, the ultrasound imaging apparatus 200, and the elasticity inspection apparatus 300 are powered on, the computer 100, the ultrasound imaging apparatus 200, and the elasticity inspection apparatus 300 are all in the power-off state.
After the main switch is turned on, the computer 100, the ultrasound imaging apparatus 200, and the elasticity inspection apparatus 300 are in a standby state. The main switch may be turned on manually or in a soft start mode, which is not limited in the embodiments of the present disclosure.
For example, the power of the computer 100 and the power of the ultrasound imaging apparatus 200 may be in a standby state of 19V, and the power of the elasticity inspection apparatus 300 may be in a standby state of 5V.
Wherein, the computer 100 or the ultrasound imaging apparatus 200 can provide a standby voltage of 5V for the power control apparatus. Of course, the power control device may also be supplied with a standby voltage of 5V through the elastic detection device 300.
The power control apparatus monitors a state change of the computer 100 to monitor whether the state of the computer 100 is changed.
In some embodiments, the computer 100 may provide an indication of the status to the power control device so that the power control device determines the status of the computer 100 based on the indication.
The power control device monitors the state change of the computer 100, which is equivalent to monitoring whether the operation of pressing a key for starting/closing the computer 100 occurs, if so, judging whether the pressed operation is a valid pressing operation, if so, executing the subsequent steps, and if not, continuing the monitoring.
The determination of whether a certain pressing operation is a valid pressing operation or an invalid pressing operation may be performed based on the determination of whether two key values (e.g., a first key value and a second key value) are the same as described in the above example, and when the two key values are the same, the pressing operation is determined to be a valid pressing operation, and when the two key values are different, the pressing operation is determined to be an invalid pressing operation.
And if the power control equipment monitors that a certain pressing operation is a valid pressing operation, acquiring power-on or power-off time sequence information which is stored in a local memory in advance.
The time sequence information may be stored in the local memory as a whole, or may be stored in the local memories, that is, the local memories store the power-on time sequence information and the power-off time sequence information respectively.
For example, if the computer 100 is switched from the standby state to the operating state after an effective pressing operation, the power monitoring device obtains the power-on timing information pre-stored in the local memory; if the computer 100 is switched from the operating state to the stop operating state after the effective pressing operation, the power monitoring device obtains the power-off timing information pre-stored in the local memory.
Therefore, in the embodiment of the present disclosure, if the power control device monitors that the pressing operation is valid, that is, the pressing operation is used to represent an instruction for switching the computer 100 from the standby state to the operating state, the power control device obtains the power-on timing information pre-stored in the local memory.
The power control device determines that the ultrasonic imaging device 200 operates first based on the power-on timing sequence information, generates a control signal for powering on the ultrasonic imaging device 200, controls the power on of the ultrasonic imaging device 200 according to the control signal, and enters a working state after the power on of the ultrasonic imaging device 200.
And, the power control device determines that the computer 100 works after the ultrasound imaging device 200 is powered on for 0.5 second based on the power-on timing information, and then generates a control signal for powering on the computer 100 after 0.5 second, and controls the powering on of the computer 100 according to the control signal, and the computer 100 enters a working state.
And, the power control device determines that the elastic detection device 300 works after the computer 100 is powered on for 2 seconds based on the power-on timing information, and then generates a control signal for powering on the elastic detection device 300 after 2 seconds, and controls the power on of the elastic detection device 300 according to the control signal, so that the elastic detection device 300 enters a working state.
And, the power control apparatus still monitors the state change of the computer 100.
As can be seen from the above examples, the power control device monitors a state change of the computer 100, which corresponds to whether an operation for turning on/off a key of the computer 100 is pressed occurs, and if the power control device monitors that a certain pressed operation is a valid pressing operation, power-on or power-off timing information stored in advance in the local memory is acquired.
Based on the above example, if the computer 100 is already in an operating state, and when the power control device monitors that the key of the computer 100 is pressed, the power monitoring device acquires the power-off timing information pre-stored in the local memory.
The power control apparatus determines to turn off the computer 100 first based on the timing information of power down, generates a control signal for turning off the computer 100, and controls the power down of the computer 100 according to the control signal, and the computer 100 enters a stop state (i.e., is turned off) after the power down.
In some embodiments, the power control apparatus may determine whether the computer 100 has been turned off based on the indication signal of the computer 100.
If yes, and the power control device determines that the ultrasound imaging device 200 stops working after the computer is powered off for 0.5 second based on the power-off time sequence information, a power-off control signal for the ultrasound imaging device 200 is generated after 0.5 second, the power-off of the ultrasound imaging device 200 is controlled according to the power-off control signal, and the ultrasound imaging device 200 enters a working stop state, that is, the ultrasound imaging device 200 is turned off.
And, the power control device determines that the elasticity detection device 300 stops operating after the ultrasound imaging device 200 is powered down for 0.5 second based on the timing information of the power down, generates a control signal for powering down the elasticity detection device 300 after 0.5 second, and controls the powering down of the elasticity detection device 300 according to the control signal, and the elasticity detection device 300 enters a stop operating state, that is, the elasticity detection device 300 is turned off.
According to another aspect of the embodiments of the present disclosure, there is also provided a control device for power-on and power-off timing.
Referring to fig. 4, fig. 4 is a schematic diagram of a control device for power-up and power-down timing sequence according to an embodiment of the disclosure.
As shown in fig. 4, the apparatus includes:
the monitoring module 11 is used for monitoring the state change of the upper computer when the upper computer is in a standby state or a working state;
an obtaining module 12, configured to obtain pre-stored power-on or power-off timing sequence information corresponding to a combined system when a state of the upper computer changes, where the combined system is configured with N pieces of functional equipment, and N is a positive integer;
a generating module 13, configured to generate a power-on or power-off control signal according to the timing information;
and the control module 14 is configured to control power on or power off of each functional device of the combined system according to the control signal.
In some embodiments, the obtaining module 12 is configured to, when it is monitored that the state of the upper computer is changed from a standby state to a working state, obtain pre-stored power-on timing information of the combination system;
the obtaining module 12 is configured to obtain pre-stored power-off timing information of the combined system when it is monitored that the state of the upper computer is changed from the working state to the standby state.
In some embodiments, the timing information includes sequence information of power-on or power-off of each functional device of the combined system; the generating of the power-on or power-off control signal according to the timing information includes: generating a control signal for controlling each functional module to be powered on or powered off according to the sequence information and a preset time interval;
alternatively, the first and second electrodes may be,
the time sequence information comprises sequence information and time interval information of power-on or power-off of each functional device of the combined system; the generating of the power-on or power-off control signal according to the timing information includes: and generating a control signal for controlling each functional module to be powered on or powered off according to the sequence information and the time interval.
In some embodiments, the power-on timing information of the combined system is designed according to the sequence of the functional devices in the combined system;
the power-down sequence of the combined system is opposite to the power-up sequence.
In some embodiments, the control module 14 is configured to control the N functional devices in the combined system to be sequentially powered on or powered off according to the timing information.
In some embodiments, the monitoring module 11 is configured to, when operation information for starting the upper computer is monitored, acquire a first key value generated by the operation information, acquire a second key value corresponding to a preset delay, determine whether the first key value and the second key value are the same, and if so, determine that a state of the upper computer changes.
According to another aspect of the embodiments of the present disclosure, there is also provided a chip including: a memory, a processor;
a memory for storing processor-executable instructions;
wherein, when executing the instructions in the memory, the processor is configured to implement the method of any of the embodiments above.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a chip according to an embodiment of the disclosure.
As shown in fig. 5, the chip includes a memory and a processor, and the chip may further include a communication interface and a bus, wherein the processor, the communication interface and the memory are connected through the bus; the processor is used to execute executable modules, such as computer programs, stored in the memory.
The Memory may include a high-speed Random Access Memory (RAM) and may also include a non-volatile Memory (non-volatile Memory), such as at least one disk Memory. Via at least one communication interface, which may be wired or wireless), the communication connection between the network element of the system and at least one other network element may be implemented using the internet, a wide area network, a local network, a metropolitan area network, etc.
The bus may be an ISA bus, PCI bus, EISA bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc.
The memory is used for storing a program, and the processor executes the program after receiving an execution instruction.
The processor may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware in a processor or instructions in the form of software. The Processor may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and the like; the device can also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA) or other Programmable logic device, a discrete Gate or transistor logic device, or a discrete hardware component. The steps of the method disclosed in connection with the embodiments of the present disclosure may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in a memory, and a processor reads information in the memory and completes the steps of the method in combination with hardware of the processor.
According to another aspect of the embodiments of the present disclosure, there is also provided a computer-readable storage medium having stored therein computer-executable instructions, which when executed by a processor, are configured to implement the method according to any one of the embodiments.
The reader should understand that in the description of this specification, reference to the description of the terms "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present disclosure. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, a division of a unit is merely a logical division, and an actual implementation may have another division, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed.
Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiments of the present disclosure.
In addition, functional units in the embodiments of the present disclosure may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present disclosure may be substantially or partially contributed by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method of the embodiments of the present disclosure. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
It should also be understood that, in the embodiments of the present disclosure, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure.
While the present disclosure has been described with reference to specific embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.
Claims (14)
1. A control method of power-on and power-off time sequence is characterized in that the control method is applied to a combined system at least comprising an upper computer and N pieces of functional equipment, wherein N is a positive integer, and the method comprises the following steps:
when the upper computer is in a standby state or a working state, monitoring the state change of the upper computer;
when the state of the upper computer is monitored to change, acquiring prestored power-on or power-off time sequence information of the combined system;
generating a power-on or power-off control signal according to the time sequence information;
and controlling each functional device of the combined system to be powered on or powered off according to the control signal.
2. The method of claim 1,
when the state of the upper computer is monitored to be changed from a standby state to a working state, pre-stored power-on time sequence information of the combined system is obtained;
and when the state of the upper computer is monitored to be changed from the working state to the standby state, acquiring pre-stored power-off time sequence information of the combined system.
3. The method of claim 1,
the time sequence information comprises the power-on or power-off sequence information of each functional device of the combined system; the generating of the power-on or power-off control signal according to the timing information includes: generating a control signal for controlling each functional module to be powered on or powered off according to the sequence information and a preset time interval;
alternatively, the first and second electrodes may be,
the time sequence information comprises sequence information and time interval information of power-on or power-off of each functional device of the combined system; the generating of the power-on or power-off control signal according to the timing information includes: and generating a control signal for controlling each functional module to be powered on or powered off according to the sequence information and the time interval.
4. The method of claim 3,
the power-on time sequence information of the combined system is designed according to the sequence of the use of each functional device in the combined system;
the power-down sequence of the combined system is opposite to the power-up sequence.
5. The method of claim 1, wherein the controlling power-up or power-down of the functional devices of the combined system according to the control signal comprises:
and controlling the N pieces of functional equipment in the combined system to be sequentially powered on or powered off according to the time sequence information.
6. The method according to any one of claims 1 to 5, wherein the monitoring of the change in the upper computer state comprises:
when the operation information for starting the upper computer is monitored, collecting a first key value generated by the operation information and collecting a second key value corresponding to a preset delay;
judging whether the first key value and the second key value are the same;
and if so, determining that the state of the upper computer changes.
7. A power-up and power-down sequence control apparatus, comprising:
the monitoring module is used for monitoring the state change of the upper computer when the upper computer is in a standby state or a working state;
the system comprises an acquisition module, a processing module and a control module, wherein the acquisition module is used for acquiring pre-stored power-on or power-off time sequence information corresponding to a combined system when the state of the upper computer changes, the combined system is provided with N pieces of functional equipment, and N is a positive integer;
the generating module is used for generating a power-on or power-off control signal according to the time sequence information;
and the control module is used for controlling the power-on or power-off of each functional device of the combined system according to the control signal.
8. The apparatus according to claim 7, wherein the obtaining module is configured to obtain pre-stored power-on timing information of the combination system when it is monitored that the state of the upper computer is changed from a standby state to a working state;
the acquisition module is used for acquiring pre-stored power-off time sequence information of the combined system when the state of the upper computer is monitored to be changed from a working state to a standby state.
9. The apparatus of claim 7,
the time sequence information comprises the power-on or power-off sequence information of each functional device of the combined system; the generating of the power-on or power-off control signal according to the timing information includes: generating a control signal for controlling each functional module to be powered on or powered off according to the sequence information and a preset time interval;
alternatively, the first and second electrodes may be,
the time sequence information comprises sequence information and time interval information of power-on or power-off of each functional device of the combined system; the generating of the power-on or power-off control signal according to the timing information includes: and generating a control signal for controlling each functional module to be powered on or powered off according to the sequence information and the time interval.
10. The apparatus of claim 9,
the power-on time sequence information of the combined system is designed according to the sequence of the use of each functional device in the combined system;
the power-down sequence of the combined system is opposite to the power-up sequence.
11. The apparatus according to claim 7, wherein the control module is configured to control the N functional devices in the combined system to be sequentially powered on or powered off according to the timing information.
12. The device according to any one of claims 7 to 11, wherein the monitoring module is configured to, when monitoring operation information for starting the upper computer, acquire a first key value generated by the operation information, acquire a second key value corresponding to a preset delay, determine whether the first key value and the second key value are the same, and if so, determine that the state of the upper computer changes.
13. A chip, comprising: a memory, a processor;
a memory for storing the processor-executable instructions;
wherein the processor, when executing the instructions in the memory, is configured to implement the method of any of claims 1 to 6.
14. A computer-readable storage medium having computer-executable instructions stored therein, which when executed by a processor, are configured to implement the method of any one of claims 1 to 6.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113625637A (en) * | 2021-08-16 | 2021-11-09 | 浙江中控技术股份有限公司 | Robot linkage control system with one-key start-stop function |
| CN113721508A (en) * | 2021-08-24 | 2021-11-30 | 杭州迪普科技股份有限公司 | Power-on and power-off time sequence control device and method |
| CN113868101A (en) * | 2021-12-06 | 2021-12-31 | 苏州浪潮智能科技有限公司 | Server time sequence detection method, device and system |
| CN114537306A (en) * | 2022-02-14 | 2022-05-27 | 智道网联科技(北京)有限公司 | Domain controller, power-on and power-off control method and device thereof, and readable storage medium |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103293986A (en) * | 2012-03-02 | 2013-09-11 | 深圳市蓝韵实业有限公司 | One-key startup and shutdown control device for digital X-ray photography system |
| CN104635583A (en) * | 2015-01-15 | 2015-05-20 | 西安原创电子科技有限公司 | Intelligent power supply control device |
| CN106127001A (en) * | 2016-06-17 | 2016-11-16 | 广东欧珀移动通信有限公司 | A kind of method of start and terminal |
| CN108153370A (en) * | 2017-12-28 | 2018-06-12 | 杭州迪普科技股份有限公司 | A kind of lower electric time sequence control device and method |
| CN207571531U (en) * | 2017-12-25 | 2018-07-03 | 上海智臻智能网络科技股份有限公司 | A kind of energy consumption control circuit |
| CN207650607U (en) * | 2017-12-25 | 2018-07-24 | 上海智臻智能网络科技股份有限公司 | A kind of managing power consumption circuit |
| CN111308934A (en) * | 2020-02-27 | 2020-06-19 | 浪潮商用机器有限公司 | Power supply time sequence power-on monitoring circuit |
| CN111596851A (en) * | 2020-05-18 | 2020-08-28 | Oppo（重庆）智能科技有限公司 | Control method and device of electronic equipment, electronic equipment and storage medium |
-
2021
- 2021-04-06 CN CN202110369499.3A patent/CN113093619A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103293986A (en) * | 2012-03-02 | 2013-09-11 | 深圳市蓝韵实业有限公司 | One-key startup and shutdown control device for digital X-ray photography system |
| CN104635583A (en) * | 2015-01-15 | 2015-05-20 | 西安原创电子科技有限公司 | Intelligent power supply control device |
| CN106127001A (en) * | 2016-06-17 | 2016-11-16 | 广东欧珀移动通信有限公司 | A kind of method of start and terminal |
| CN207571531U (en) * | 2017-12-25 | 2018-07-03 | 上海智臻智能网络科技股份有限公司 | A kind of energy consumption control circuit |
| CN207650607U (en) * | 2017-12-25 | 2018-07-24 | 上海智臻智能网络科技股份有限公司 | A kind of managing power consumption circuit |
| CN108153370A (en) * | 2017-12-28 | 2018-06-12 | 杭州迪普科技股份有限公司 | A kind of lower electric time sequence control device and method |
| CN111308934A (en) * | 2020-02-27 | 2020-06-19 | 浪潮商用机器有限公司 | Power supply time sequence power-on monitoring circuit |
| CN111596851A (en) * | 2020-05-18 | 2020-08-28 | Oppo（重庆）智能科技有限公司 | Control method and device of electronic equipment, electronic equipment and storage medium |
Non-Patent Citations (1)
| Title |
|---|
| 曹新主编；李瑛达，窦乔，师访，杨涛副主编: "《51单片机入门、进阶与实战一本通》", 30 September 2019, 北京航空航天大学出版社 * |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113625637A (en) * | 2021-08-16 | 2021-11-09 | 浙江中控技术股份有限公司 | Robot linkage control system with one-key start-stop function |
| CN113721508A (en) * | 2021-08-24 | 2021-11-30 | 杭州迪普科技股份有限公司 | Power-on and power-off time sequence control device and method |
| CN113721508B (en) * | 2021-08-24 | 2024-02-27 | 杭州迪普科技股份有限公司 | Power-on and power-off time sequence control device and method |
| CN113868101A (en) * | 2021-12-06 | 2021-12-31 | 苏州浪潮智能科技有限公司 | Server time sequence detection method, device and system |
| WO2023103307A1 (en) * | 2021-12-06 | 2023-06-15 | 苏州浪潮智能科技有限公司 | Server time sequence detection method, device and system |
| CN114537306A (en) * | 2022-02-14 | 2022-05-27 | 智道网联科技(北京)有限公司 | Domain controller, power-on and power-off control method and device thereof, and readable storage medium |
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