CN113076140B - GPIO (general purpose input/output) configuration detection method and device and server - Google Patents
GPIO (general purpose input/output) configuration detection method and device and server Download PDFInfo
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- CN113076140B CN113076140B CN202110322679.6A CN202110322679A CN113076140B CN 113076140 B CN113076140 B CN 113076140B CN 202110322679 A CN202110322679 A CN 202110322679A CN 113076140 B CN113076140 B CN 113076140B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2289—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by configuration test
Abstract
The invention discloses a GPIO configuration detection method, a device and a server, which are characterized in that each GPIO and hardware are initialized; after initialization, sequentially reading pin logics of all GPIOs; comparing the read pin logic with standard logic in a pre-stored logic detection table, and judging whether the read pin logic is consistent with the standard logic; and outputting the comparison result, wherein if the comparison result is consistent with the comparison result, the GPIO configuration is normal, otherwise, the GPIO configuration is abnormal. The invention prestores a logic detection table, stores pin standard logic of the GPIO in the table, starts a machine to automatically collect pin information of the GPIO, matches the collected information with the prestored standard logic direction, carries out automatic detection, obtains a detection result and outputs the detection result. The method can obtain the correctness of the current GPIO configuration in the PCH, enhance the testability of the GPIO function, improve the test integrity and effectively improve the detection efficiency.
Description
Technical Field
The invention relates to the field of GPIO configuration detection, in particular to a GPIO configuration detection method, a GPIO configuration detection device and a server.
Background
With the updating and upgrading of the PCH chip of the server, GPIOs of the PCH become more and more. The setting of GPIO is determined by hardware, and a single GPIO is configured in the starting stage according to hardware design, and a Native function or a GPIO function is selected. Taking GPIO functionality as an example, GPIO functionality is configured to input and output signals, the number of inputs and outputs configured to be somewhat dependent on the hardware configuration. When configured as an output signal, it can be configured as a high level or a low level, the path bit of the GPIO allows inputting an SMI (system control interrupt), SCI (system management interrupt) or NMI (non maskable interrupt), each bit can be used as a path of the SMI or SCI, and some registers of the GPIO can be changed from lock down to read-only state.
Each GPIO corresponds to one function, the function can be ensured to normally run by checking the setting of each GPIO, and the abnormal test result of part of functions caused by the problem of the setting of part of GPIOs in the whole machine test can not occur. At present, part of set functions of the GPIO can be used for work function test, but most of the functions may not have corresponding function test cases, and the functions are generally read out through a tool during configuration verification, and the configuration of the GPIO is manually checked one by one. However, many GPIOs are in the PCH, manual inspection is time-consuming, errors are prone to occurring, and only developers can inspect the GPIOs, the tests cannot completely cover the functional tests, and functional abnormalities caused by GPIO configuration errors are prone to occurring.
Disclosure of Invention
In order to solve the above problems, the present invention provides a GPIO configuration detection method, apparatus, and server, which can automatically detect GPIO configuration and improve detection efficiency.
The technical scheme of the invention is as follows: a GPIO configuration detection method comprises the following steps:
s1, initializing each GPIO and hardware;
s2, sequentially reading pin logics of all GPIOs;
s3, comparing the read pin logic with standard logic in a pre-stored logic detection table, and judging whether the read pin logic is consistent with the standard logic;
and S4, outputting the comparison result, wherein if the comparison result is consistent with the comparison result, the GPIO configuration is normal, and otherwise, the GPIO configuration is abnormal.
Further, the method is performed during a BIOS boot process.
Further, steps S2-S4 are performed during the DXE phase of the BIOS boot process.
Further, step S1 is preceded by the steps of:
adding a detection variable in the BIOS, wherein the detection variable comprises an opening state and a closing state;
the following steps are also included after the step S1:
judging the state of the detection variable;
if the state of the detection variable is on, executing subsequent steps S2-S4, and continuing to start the BIOS after executing step S4;
and if the state of the detection variable is closed, skipping the steps S2-S4 and continuing to start the BIOS.
Further, the step S4 outputs the comparison result, specifically, outputs the comparison result through BIOS serial port printing.
Further, if the read pin logic does not match the standard logic in the pre-stored logic detection table, the output result includes the read pin logic and the corresponding standard logic.
The technical scheme of the invention also comprises a GPIO configuration detection device, which comprises,
an initialization module: initializing each GPIO and hardware;
a pin logic reading module: sequentially reading pin logics of all GPIOs;
a pin logic comparison module: comparing the read pin logic with standard logic in a pre-stored logic detection table, and judging whether the read pin logic is consistent with the standard logic;
a result output module: and outputting the comparison result, wherein if the comparison result is consistent with the comparison result, the GPIO configuration is normal, otherwise, the GPIO configuration is abnormal.
Further, the device operates during the BIOS boot process;
the pin logic reading module, the pin logic comparison module and the result output module operate in DXE stage of BIOS starting process.
Further, the device also comprises a control device,
a detection variable setting module: setting the state of a detection variable; wherein the sensed variable includes two states, on and off;
a detection variable state judgment module: judging the state of the detection variable; if the state of the detection variable is on, the BIOS is continuously started after the pin logic reading module, the pin logic comparison module and the result output module are operated; and if the state of the detection variable is closed, skipping over the pin logic reading module, the pin logic comparison module and the result output module and continuing to start the BIOS.
The technical scheme of the invention also comprises a server which executes any one of the methods when being started.
The GPIO configuration detection method, the device and the server provided by the invention pre-store a logic detection table, the table stores pin standard logic of the GPIO, a machine is started to automatically collect pin information of the GPIO, the collected information is matched with the pre-stored standard logic direction, automatic detection is carried out, and a detection result is obtained and output. The method can obtain the correctness of the current GPIO configuration in the PCH, enhance the testability of the GPIO function, improve the test integrity and effectively improve the detection efficiency.
Drawings
FIG. 1 is a schematic flow chart of a method according to an embodiment of the present invention;
FIG. 2 is a flow chart illustrating a method of one embodiment of the present invention;
fig. 3 is a schematic block diagram of a second structure according to an embodiment of the present invention.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings by way of specific examples, which are illustrative of the present invention and are not limited to the following embodiments.
The following explains some of the english terms referred to in this application:
BIOS: basic Input Output System, basic Input Output System;
GPIO: general-purpose input/output, general-purpose input/output;
DXE phase: driver Execution Environment, one of Execution phases of UEFI BIOS; the stage executes most of system initialization work, and when the stage is entered, the memory can be completely used, so that a large amount of complex work can be performed in the stage;
PCH: platform Controller Hub, intel corporation integrated south bridge.
Example one
As shown in fig. 1, the present embodiment provides a GPIO configuration detection method, which includes the following steps:
s1, initializing each GPIO and hardware;
s2, sequentially reading pin logics of all GPIOs;
s3, comparing the read pin logic with standard logic in a pre-stored logic detection table, and judging whether the read pin logic is consistent with the standard logic;
and S4, outputting the comparison result, if the comparison result is consistent with the comparison result, normally configuring the GPIO, and otherwise, abnormally configuring the GPIO.
The method comprises the steps of firstly pre-storing a logic detection table, storing pin standard logic of each GPIO in the table, automatically detecting the configuration of the GPIO in a mode of matching and comparing the pin standard logic with the pin standard logic in the table after reading the pin logic of each GPIO, and improving the detection efficiency without manual inspection.
The method of the embodiment is executed in the BIOS starting process, and the GPIO pin logic is automatically detected in the BIOS starting process to give a detection result. Specifically, the execution of detection is controlled by adding a detection variable in a setting menu of the BIOS, the detection variable includes two states of on and off, when the detection variable is in the on state, the method of the embodiment is executed to perform GPIO pin logic detection, otherwise, the detection is skipped to normally start the BIOS.
To further illustrate the present invention, an embodiment of the present invention is provided below with reference to the above steps, based on the principle of the present invention, as shown in fig. 2, the embodiment includes the following steps:
SS1, adding menu options of detection variables in BIOS;
the option is newly added for the tester to set according to the requirement, the states of the detection variables comprise an opening state and a closing state, and the detection function is opened or closed according to the requirement.
SS2, pre-storing a logic detection table;
and the tester prestores a logic detection table, and pin standard logic of each GPIO is stored in the table for subsequent detection.
SS3, setting the state of the detection variable;
as described above, the test variables include both on and off states, which the tester selects as needed.
SS4, starting BIOS, and initializing each GPIO and hardware;
initializing each GPIO and hardware after starting the BIOS, and completing pin configuration of the GPIO after initialization is completed;
SS5, judging the state of the detection variable; if the state of the detection variable is open, the step SS6 is carried out, and if the state of the detection variable is closed, the step SS9 is carried out;
and (4) performing GPIO pin logic detection in an opening state, otherwise, not performing detection, and continuing to normally start the BIOS.
It should be noted that step SS 5-step SS8 are performed during the DXE phase of the BIOS boot process.
SS6, reading the pin logic of each GPIO in sequence;
SS7, comparing the read pin logic with the standard logic in the pre-stored logic detection table, and judging whether the read pin logic and the standard logic are consistent;
after detection, the pin logic of each GPIO is firstly read, the read pin logic is compared and matched with the standard logic in the logic detection table, whether the pin logic and the standard logic are consistent or not is detected, if so, GPIO configuration is correct, and if not, GPIO configuration is wrong.
It should be noted that the comparison and matching can be performed once every time one GPIO is read.
SS8, outputting the comparison result, if the comparison result is consistent with the comparison result, the GPIO configuration is normal, otherwise, the GPIO configuration is abnormal;
and after all the comparison is finished, outputting the result through BIOS serial port printing. It should be noted that, for the case that the read pin logic does not match the standard logic in the pre-stored logic detection table, the output result includes the read pin logic and the corresponding standard logic. In addition, if the read pin logic is not matched with the standard logic in the pre-stored logic detection table, the configuration is displayed as abnormal on the output result, and if the read pin logic is not matched with the standard logic in the pre-stored logic detection table, the configuration is displayed as normal.
SS9, continuously starting BIOS;
after the detection is finished or when the detection is not carried out, the BIOS is normally started.
The method automatically completes the GPIO pin logic detection in the BIOS starting stage, thereby knowing whether the GPIO is configured correctly, displaying the result visually and having high detection efficiency.
Example two
As shown in fig. 3, on the basis of the first embodiment, the present embodiment provides a GPIO configuration detection apparatus, which executes the method of the first embodiment after operation, and includes the following functional modules.
The initialization module 101: initializing each GPIO and hardware;
pin logic read module 102: sequentially reading pin logics of all GPIOs;
pin logic comparison module 103: comparing the read pin logic with standard logic in a pre-stored logic detection table, and judging whether the read pin logic is consistent with the standard logic;
the result output module 104: and outputting the comparison result, if the comparison result is consistent with the GPIO, the GPIO configuration is normal, and otherwise, the GPIO configuration is abnormal.
The device runs in the BIOS starting process, wherein the pin logic reading module, the pin logic comparison module and the result output module run in the DXE stage of the BIOS starting process, namely, the GPIO and hardware are initialized in the initialization stage of the BIOS starting process to complete configuration, and then the GPIO configuration is detected in the DXE stage.
In addition, the present embodiment is configured with a detection control function in advance, and determines whether the detection function is turned on. Specifically, the apparatus further includes the following functional modules.
The detection variable setting module 105: setting the state of a detection variable; wherein the sensed variable includes two states, on and off;
the detection variable state judgment module 106: judging the state of the detection variable; if the state of the detection variable is on, the BIOS is continuously started after the pin logic reading module, the pin logic comparison module and the result output module are operated; and if the state of the detection variable is closed, skipping over the pin logic reading module, the pin logic comparison module and the result output module and continuing to start the BIOS.
EXAMPLE III
The embodiment provides a server, which executes the method of the first embodiment when the server is started, and realizes the configuration detection of the GPIO in the process of starting the BIOS of the server.
The above disclosure is only for the purpose of illustrating the preferred embodiments of the present invention, and the present invention is not limited thereto, and any modifications and variations which can be made by those skilled in the art without departing from the spirit of the present invention shall fall within the scope of the present invention.
Claims (5)
1. A GPIO configuration detection method is characterized by comprising the following steps:
s1, initializing each GPIO and hardware;
s2, sequentially reading pin logics of all GPIOs;
s3, comparing the read pin logic with standard logic in a pre-stored logic detection table, and judging whether the read pin logic is consistent with the standard logic;
s4, outputting the comparison result, if the comparison result is consistent with the comparison result, normally configuring the GPIO, and if not, abnormally configuring the GPIO;
the method is executed in the BIOS starting process;
steps S2-S4 are executed in the DXE stage of the BIOS starting process;
the method also comprises the following steps before the step S1:
adding a detection variable in the BIOS, wherein the detection variable comprises an opening state and a closing state;
the following steps are also included after the step S1:
judging the state of the detection variable;
if the state of the detection variable is open, executing subsequent steps S2-S4, and continuing to start the BIOS after executing step S4;
and if the state of the detection variable is closed, skipping the steps S2-S4 and continuing to start the BIOS.
2. The GPIO configuration detection method of claim 1, wherein the step S4 outputs the comparison result, specifically by BIOS serial port printing.
3. The GPIO configuration detection method of claim 2, wherein if the read pin logic does not match the standard logic in the pre-stored logic detection table, the output result comprises the read pin logic and the corresponding standard logic.
4. A GPIO configuration detection device is characterized by comprising,
an initialization module: initializing each GPIO and hardware;
a pin logic reading module: sequentially reading pin logics of all GPIOs;
a pin logic comparison module: comparing the read pin logic with standard logic in a pre-stored logic detection table, and judging whether the read pin logic is consistent with the standard logic;
a result output module: outputting the comparison result, if the comparison result is consistent with the comparison result, the GPIO configuration is normal, otherwise, the GPIO configuration is abnormal;
the device operates during the BIOS startup process;
the pin logic reading module, the pin logic comparison module and the result output module operate in the DXE stage of the BIOS starting process;
the device also comprises a control unit for controlling the operation of the device,
a detection variable setting module: setting the state of a detection variable; wherein the sensed variable includes two states, on and off;
a detection variable state judgment module: judging the state of the detection variable; if the state of the detection variable is on, the BIOS is continuously started after the pin logic reading module, the pin logic comparison module and the result output module are operated; and if the state of the detection variable is closed, skipping over the pin logic reading module, the pin logic comparison module and the result output module and continuing to start the BIOS.
5. A server, characterized in that the method of any of claims 1-3 is performed at start-up.
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