CN112765021A - Debugging and checking method, device, equipment and storage medium of boot program - Google Patents
Debugging and checking method, device, equipment and storage medium of boot program Download PDFInfo
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3644—Software debugging by instrumenting at runtime
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3648—Software debugging using additional hardware
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/366—Software debugging using diagnostics
Abstract
The application discloses a debugging and checking method of a bootstrap program, which comprises the following steps: acquiring a bootstrap program, and inputting the bootstrap program to a preset simulation verification platform; running a bootstrap program by utilizing a processor of a preset simulation verification platform; when the operation of the preset simulation verification platform is abnormal, analyzing the execution condition of each control instruction of the bootstrap program step by step according to a PC pointer register in the processor to determine an abnormal control instruction; and determining the abnormal positioning of the bootstrap program according to the abnormal control instruction. The method can more accurately locate the abnormal position of the bootstrap program when debugging and checking the bootstrap program, thereby improving the convenience of debugged of the bootstrap program. The application also discloses a debugging and checking device, equipment and a computer readable storage medium of the bootstrap program, which have the beneficial effects.
Description
Technical Field
The present invention relates to the field of program inspection, and in particular, to a method, an apparatus, a device, and a computer-readable storage medium for debugging and inspecting a boot program.
Background
The BMC (Baseboard Management Controller) is an essential part in a server architecture, and mainly implements control, monitoring, and the like of a server. Generally, in a server architecture, a BMC belongs to an independent System presented in a form of a Chip, and the BMC is essentially an SoC (System on Chip) Chip and is composed of a processor, a System bus and a plurality of hardware peripherals; and operating an independent embedded Linux operating system on the BMC to operate each hardware peripheral to complete the function of the BMC. Bootloader (boot loader/bootstrap program) refers to a program for booting an operating system, and after the BIOS is booted, the Bootloader takes over initializing hardware devices and creating mapping of a memory space, so as to prepare a correct software and hardware environment for an operating system kernel.
Since the boot program involves software and hardware peripherals of the BMC, debugging and checking are a big difficulty in the development process. In the prior art, usually, at a stage of prototype verification of an FPGA (Field Programmable Gate Array) developed by a chip, a compiled boot program is imported into an FPGA board for debugging, and a common method is to add debugging information in the boot program and observe and know an operating state of the boot program through serial port printing. The method has the advantages of high speed and easy understanding of the running state of the bootstrap program, but when the bootstrap program is wrong or abnormal, only the position of the corresponding hardware peripheral equipment when the bootstrap program is abnormal can be determined, so that debug of the bootstrap program is difficult.
Therefore, how to perform exception positioning on the boot program more accurately when performing debugging and checking on the boot program, so as to improve convenience of debugged on the boot program is a technical problem that needs to be solved by those skilled in the art at present.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a method for debugging and inspecting a boot program, which can more accurately locate an exception of the boot program when performing debugging and inspection on the boot program, so as to improve the convenience of debugged the boot program; another object of the present invention is to provide a device, an apparatus and a computer-readable storage medium for debugging and verifying a boot program, all of which have the above advantages.
In order to solve the above technical problem, the present invention provides a method for debugging and checking a boot program, comprising:
acquiring a bootstrap program, and inputting the bootstrap program to a preset simulation verification platform;
running the bootstrap program by utilizing a processor of the preset simulation verification platform;
when the preset simulation verification platform runs abnormally, analyzing the execution condition of each control instruction of the bootstrap program step by step according to a PC pointer register in the processor to determine an abnormal control instruction;
and determining the abnormal positioning of the bootstrap program according to the abnormal control instruction.
Preferably, the process of running the boot program by using the processor of the preset emulation verification platform specifically includes:
and running the bootstrap program by utilizing the processor of the preset emulation verification platform, and executing operations of character printing, MMU (memory management unit) closing, L1/L2 Cache, temporary variable creation, front-end initialization, U-Boot migration and back-end initialization.
Preferably, after the determining the abnormal location of the boot program according to the abnormal control instruction, the method further includes:
and debugged debugging is carried out on the bootstrap program according to the abnormal positioning, the obtained bootstrap program is entered after debug debugging, and the bootstrap program is input into a processor of a preset simulation verification platform.
Preferably, further comprising:
and when the debug debugging still has the abnormal positioning after reaching the preset times, verifying the program codes in the hardware peripherals related to the abnormal positioning in the preset simulation verification platform.
Preferably, after the determining the abnormal location of the boot program according to the abnormal control instruction, the method further includes:
and acquiring a solution corresponding to the abnormal positioning from a preset fault scheme information base.
Preferably, after the determining the abnormal location of the boot program according to the abnormal control instruction, the method further includes:
and sending out corresponding prompt information according to the abnormal positioning.
Preferably, after the determining the abnormal location of the boot program according to the abnormal control instruction, the method further includes:
and recording the abnormal positioning and the corresponding detection time to a log.
In order to solve the above technical problem, the present invention further provides a debugging and checking apparatus for a boot program, including:
the input module is used for acquiring a bootstrap program and inputting the bootstrap program to a preset simulation verification platform;
the running module is used for running the bootstrap program by utilizing the processor of the preset simulation verification platform;
the determining module is used for analyzing the execution condition of each control instruction of the bootstrap program step by step according to a PC pointer register in the processor when the preset simulation verification platform has abnormal operation, and determining an abnormal control instruction;
and the positioning module is used for determining the abnormal positioning of the bootstrap program according to the abnormal control instruction.
In order to solve the above technical problem, the present invention further provides a debugging and checking device for a boot program, including:
a memory for storing a computer program;
and the processor is used for realizing the steps of any one of the debugging and checking methods of the bootstrap program when executing the computer program.
In order to solve the above technical problem, the present invention further provides a computer-readable storage medium, wherein a computer program is stored on the computer-readable storage medium, and when being executed by a processor, the computer program implements the steps of any one of the above debugging and checking methods for a boot program.
The invention provides a debugging and checking method of a bootstrap program, which runs the bootstrap program through a processor of a preset simulation verification platform; when the operation of the preset simulation verification platform is abnormal, analyzing the execution condition of each control instruction of the bootstrap program step by step according to a PC pointer register in the processor to determine an abnormal control instruction; determining the abnormal positioning of the bootstrap program according to the abnormal control instruction; therefore, compared with the situation that the position of the corresponding hardware peripheral is only located when the bootstrap program is abnormal in the prior art, the method can further determine the abnormal control instruction and determine the abnormal location of the bootstrap program according to the abnormal control instruction, so that the method can more accurately locate the abnormal location of the bootstrap program, and the convenience of debugged of the bootstrap program is improved.
In order to solve the technical problem, the invention also provides a debugging and checking device, equipment and a computer readable storage medium of the bootstrap program, which have the beneficial effects.
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In order to more clearly illustrate the embodiments or technical solutions of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a flowchart of a method for debugging and checking a boot program according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a predetermined simulation verification platform according to an embodiment of the present invention;
FIG. 3 is a flowchart of another method for debugging and verifying a boot program according to an embodiment of the present invention;
fig. 4 is a structural diagram of a debugging and checking apparatus of a boot program according to an embodiment of the present invention;
fig. 5 is a structural diagram of a debugging checking apparatus of a boot program according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The core of the embodiment of the invention is to provide a debugging and inspecting method of a bootstrap program, which can more accurately locate the abnormity of the bootstrap program when the debugging and inspecting are carried out on the bootstrap program, thereby improving the convenience of debugged of the bootstrap program; another core of the present invention is to provide a device, an apparatus and a computer-readable storage medium for debugging and verifying a boot program, all of which have the above advantages.
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Fig. 1 is a flowchart of a method for debugging and verifying a boot program according to an embodiment of the present invention. As shown in fig. 1, a method for debugging and verifying a boot program includes:
s10: and acquiring a bootstrap program, and inputting the bootstrap program to a preset simulation verification platform.
Specifically, in actual operation, a simulation verification platform is set in advance based on an SoC architecture, and the preset simulation verification platform is composed of a processor, a system bus and a plurality of hardware peripherals; the pre-designed simulation verification platform can run in general simulation tool software, including IES, VCS (compiled Verilog simulator), etc. It should be noted that, currently, the most mainstream Boot loader is a U-Boot program, which is open-source and covers various processor architectures, and has been developed into a program system with a standard flow; therefore, the present embodiment mainly uses the U-Boot program as the Boot program for explanation.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a predetermined simulation verification platform according to an embodiment of the present invention; the preset simulation verification platform interconnects all modules through a bus, and mainly comprises:
AXI (Advanced eXtensible Interface, a bus protocol standard) system bus: a bus following the AXI protocol for connecting some high-speed devices such as an arm (advanced RISC machine) processor and a DDR (Double Data Rate); APB (Advanced Peripheral Bus, a Bus protocol standard) system Bus: a bus following APB protocol for connecting Uart and other low-speed devices;
an ARM processor: the system is used for running a U-Boot program;
DDR: DDR is used in the running process of a U-Boot program of the memory;
flash controller/Flash model: the initial storage position of the U-Boot program;
SRAM (static random-access memory): a small segment of storage space is used for reading and writing some variables when the U-Boot program is initially started;
uart (Universal Asynchronous Receiver/Transmitter )/Uart model: the method is used for monitoring the printing output of the U-Boot program in the running process or inputting a command into the U-Boot program.
SD (secure digital) controller/SD model: verifying an SD driver of the U-Boot program;
MAC (Medium/Media Access Control): verifying an MAC initialization program of the U-Boot program;
MMU (Memory Management Unit) and L1/L2 Cache (primary/secondary Cache of CPU): and a plurality of modules in the ARM processor architecture are operated by the running phase of the U-Boot program.
Therefore, the preset simulation verification platform provided by the embodiment of the invention has a simple structure, is easy to realize, is compatible with a system simulation verification environment in chip development, can determine specific abnormal positioning when debugging and verifying the bootstrap program, and is favorable for debugging and checking the bootstrap program.
In actual operation, after the U-Boot program is compiled, the U-Boot program is compiled: generating a binary U-Boot image file by using a general compiling technology; since the U-Boot program in the binary format cannot be directly input to the preset emulation verification platform, the binary U-Boot program needs to be further converted into a format that can be identified by a Flash model in the preset emulation verification platform through a preset conversion script; and inputting the U-Boot program subjected to format conversion into a Flash model of a preset simulation verification platform as an incentive form of simulation.
S20: running a bootstrap program by utilizing a processor of a preset simulation verification platform;
s30: when the operation of the preset simulation verification platform is abnormal, analyzing the execution condition of each control instruction of the bootstrap program step by step according to a PC pointer register in the processor to determine an abnormal control instruction;
s40: and determining the abnormal positioning of the bootstrap program according to the abnormal control instruction.
Specifically, after a bootstrap program is input into a preset simulation verification platform, simulation starts, an ARM processor obtains a U-Boot program from a Flash model, the U-Boot program located in the Flash model passes through a Flash controller and reaches the ARM processor through an AXI system bus, and the ARM processor analyzes and executes the U-Boot program.
In the process of running the bootstrap program by using the processor, when the preset simulation verification platform has abnormal running, for example, when the execution of some peripheral hardware in the preset simulation verification platform is abnormal, analyzing the execution condition of each control instruction of the bootstrap program step by step according to a PC pointer register in the processor to determine an abnormal control instruction; and finally, determining the abnormal location of the bootstrap program corresponding to the abnormal control instruction by using the corresponding relation between the control instruction and the program code in the bootstrap program. Therefore, the method can position the execution condition corresponding to each control instruction according to the running condition of the bootstrap program.
The debugging and testing method of the bootstrap program provided by the embodiment of the invention runs the bootstrap program through a processor of a preset simulation verification platform; when the operation of the preset simulation verification platform is abnormal, analyzing the execution condition of each control instruction of the bootstrap program step by step according to a PC pointer register in the processor to determine an abnormal control instruction; determining the abnormal positioning of the bootstrap program according to the abnormal control instruction; therefore, compared with the situation that the position of the corresponding hardware peripheral is only located when the bootstrap program is abnormal in the prior art, the method can further determine the abnormal control instruction and determine the abnormal location of the bootstrap program according to the abnormal control instruction, so that the method can more accurately locate the abnormal location of the bootstrap program, and the convenience of debugged of the bootstrap program is improved.
On the basis of the foregoing embodiment, this embodiment further describes and optimizes the technical solution, specifically, fig. 3 is a flowchart of another debugging and checking method for a Boot program according to an embodiment of the present invention, and this embodiment explains the case where a U-Boot program is used as a Boot program.
In this embodiment, the process of running the boot program by using the processor of the preset emulation verification platform specifically includes:
and running a bootstrap program by utilizing a processor of the preset emulation verification platform, and executing operations of character printing, MMU (memory management unit) closing and L1/L2 Cache, temporary variable creation, front-end initialization, U-Boot migration and back-end initialization.
In actual operation, when the processor runs the U-Boot program, the processor executes some operations according to the control of the U-Boot program so as to realize the check of the U-Boot program.
Specifically, in order to verify whether the environment of the whole system controlled by the U-Boot program is normal or not, a section of test printing code is added to the initial part of the U-Boot program, an ARM processor determines a character printing instruction according to the test printing code in the U-Boot program, character data are sent to a Uart module through an AXI system bus-APB system bus and then captured by the Uart module, the captured character data are consistent with the U-Boot program, the environment and the channel controlled by the U-Boot program are basically normal, a preset simulation verification platform runs normally and enters the next process, and otherwise the simulation verification platform is regarded as abnormal.
The ARM processor closes an MMU and an L1/L2 Cache according to a U-Boot program, and the program is a general program in the U-Boot program; after the MMU and the L1/L2 Cache are closed, the ARM processor cannot pass through the two modules when accessing other hardware peripherals; and accordingly, whether the preset simulation verification platform normally operates is determined.
When the U-Boot program is executed, temporary readable and writable variables are generated, the temporary variables are created in the SRAM, and the ARM processor accesses the SRAM through the AXI system bus and determines whether the preset simulation verification platform operates normally or not according to the temporary readable and writable variables.
The front-end initialization is a general program of a U-Boot program, relates to a series of driving programs, comprises DDR initialization, Flash initialization and Uart initialization, and is also a part which is easy to make errors during U-Boot development.
When the U-Boot is migrated, the ARM processor sends a control instruction, the U-Boot program which is initially positioned in the Flash model is migrated into the DDR through the AXI system bus and is continuously executed, and whether the preset simulation verification platform normally operates or not is judged according to the execution condition.
The last stage of the U-Boot program operation is back-end initialization, the U-Boot program is already operated in DDR at this time, and the back-end initialization also relates to a series of driving programs including SD initialization and MAC initialization; when the back end is initialized, the ARM processor can access the SD and the MAC through the AXI/APB system bus, and whether the preset simulation verification platform normally operates is judged according to the execution condition.
Specifically, when the preset simulation verification platform is determined to have abnormal operation, analyzing the execution condition of each control instruction of the bootstrap program step by step according to a PC pointer register in the processor to determine an abnormal control instruction; and determining the abnormal positioning of the bootstrap program according to the abnormal control instruction.
For example, when the back-end is initialized, if the SD initialization is found to be abnormal, a PC pointer register in the ARM processor can be called, the execution condition of the control instruction of each U-Boot program is analyzed step by step, the states of all signals in several modules such as the ARM processor, the AXI system bus, the SD controller, and the SD model are checked in real time, an abnormal control instruction is determined according to the abnormal state, and then the abnormal positioning of the bootstrap program is determined according to the abnormal control instruction.
As a preferred embodiment, after determining the abnormal location of the boot program according to the abnormal control instruction, the method further includes:
and debugged debugging is carried out on the bootstrap program according to the abnormal positioning, the bootstrap program is obtained after debug debugging, and the bootstrap program is input into a processor of a preset simulation verification platform.
In this embodiment, after it is determined that the preset emulation verification platform is abnormal in operation and the abnormal location of the boot program is determined according to the abnormal control instruction, debug the boot program according to the abnormal location, and after debug the boot program, the boot program is updated, so that it is necessary to perform compiling and format conversion operations on the boot program again, and input the boot program into the preset emulation verification platform for emulation operation, so as to perform debugging and verification again.
As a preferred embodiment, the present embodiment further comprises:
and when the abnormal positioning still exists after debug debugging reaches the preset times, verifying the program codes in the hardware peripherals related to the abnormal positioning in the preset simulation verification platform.
It should be noted that, if, in the actual operation, the debug debugging is repeatedly performed this time for the preset number of times, and the abnormal location still exists after the boot program is executed in the emulation, it indicates that there may be a problem in the hardware peripheral in the preset emulation verification platform at present, so that the program code in the hardware peripheral related to the abnormal location in the preset emulation verification platform may be further verified, that is, the internal signal in the hardware peripheral is analyzed.
Therefore, the method not only can debug and detect the abnormal condition of the bootstrap program, but also can determine the abnormal condition of the hardware peripheral.
On the basis of the foregoing embodiment, the present embodiment further describes and optimizes the technical solution, and specifically, after determining the exception location of the boot program according to the exception control instruction, the present embodiment further includes:
and acquiring a solution corresponding to the abnormal positioning from a preset fault scheme information base.
It should be noted that, in this embodiment, a corresponding solution is set in advance according to different abnormal positioning, and a fault solution information base is determined; after the current abnormal positioning is determined, a solution corresponding to the current abnormal positioning is obtained from a preset fault scheme information base; so that the user can conveniently acquire the solution to debug the bootstrap program according to the solution, and the use experience of the user is further improved.
On the basis of the foregoing embodiment, the present embodiment further describes and optimizes the technical solution, and specifically, after determining the exception location of the boot program according to the exception control instruction, the present embodiment further includes:
and sending out corresponding prompt information according to the abnormal positioning.
Specifically, in this embodiment, after the abnormal location of the boot program is determined according to the abnormal control instruction, the prompting device is further triggered to send out corresponding prompting information according to the abnormal location. It should be noted that the prompting device may specifically be a buzzer and/or an indicator light and/or a display, and the prompting device may be triggered to send out corresponding prompting information, such as a buzzer sound, a flashing light, a display text or an image, and the like, so as to intuitively prompt the user that the abnormal location has been determined, and in actual operation, the prompting device may send out corresponding types of prompting information according to different abnormal locations, so as to determine the abnormal situation according to the type of the prompting information, and thereby the use experience of the user may be further improved.
On the basis of the foregoing embodiment, the present embodiment further describes and optimizes the technical solution, and specifically, after determining the exception location of the boot program according to the exception control instruction, the present embodiment further includes:
and recording the abnormal positioning and the corresponding detection time to a log.
Specifically, in this embodiment, after determining the abnormal location of the boot program according to the abnormal control instruction, the detection time for determining the abnormal location of the boot program is obtained, and then the information of the abnormal location and the corresponding detection time are recorded in the log.
It should be noted that, in actual operation, a specific recording manner may be recorded in a form of text, an excel table, or a database table, which is not limited in this embodiment and is selected according to actual requirements. More specifically, the recording and storing may be performed in a Memory bank, a hard disk, a TF (Trans-flash Card) Card, an sd (secure Digital Memory Card) Card, or the like, and the selection is specifically performed according to actual requirements, which is not limited in this embodiment.
In this embodiment, the abnormal location and the corresponding detection time are further recorded in the log, so that the user can conveniently check the condition of debugging and checking the boot program, and the use experience of the user is further improved.
The above detailed description is given for the embodiments of the method for debugging and verifying a boot program according to the present invention, and the present invention further provides a device, an apparatus, and a computer-readable storage medium for debugging and verifying a boot program corresponding to the method.
Fig. 4 is a structural diagram of a debugging verification apparatus for a boot program according to an embodiment of the present invention, and as shown in fig. 4, the debugging verification apparatus for a boot program includes:
the input module 41 is used for acquiring a bootstrap program and inputting the bootstrap program to a preset simulation verification platform;
the running module 42 is used for running a bootstrap program by utilizing a processor of a preset simulation verification platform;
the determining module 43 is configured to, when the preset emulation verification platform is abnormal in operation, analyze an execution condition of each control instruction of the bootstrap step by step according to a PC pointer register in the processor, and determine an abnormal control instruction;
and the positioning module 44 is used for determining the abnormal positioning of the bootstrap program according to the abnormal control instruction.
The debugging and checking device of the bootstrap program provided by the embodiment of the invention has the beneficial effects of the debugging and checking method of the bootstrap program.
As a preferred embodiment, another debugging verification apparatus for a boot program further includes:
and the debugging module is used for debugging the debug of the bootstrap program according to the abnormal positioning and calling the input module.
As a preferred embodiment, another debugging verification apparatus for a boot program further includes:
and the verification module is used for verifying the program codes in the hardware peripherals related to the abnormal positioning in the preset simulation verification platform when the abnormal positioning still exists after debug debugging reaches the preset times.
As a preferred embodiment, another debugging verification apparatus for a boot program further includes:
and the execution module is used for acquiring a solution corresponding to the abnormal positioning from a preset fault scheme information base.
As a preferred embodiment, another debugging verification apparatus for a boot program further includes:
and the prompt module is used for sending out corresponding prompt information according to the abnormal positioning.
As a preferred embodiment, another debugging verification apparatus for a boot program further includes:
and the recording module is used for recording the abnormal positioning and the corresponding detection time to the log.
Fig. 5 is a structural diagram of a debugging verification device of a boot program according to an embodiment of the present invention, and as shown in fig. 5, the debugging verification device of the boot program includes:
a memory 51 for storing a computer program;
the processor 52 is used for implementing the steps of the debugging checking method of the boot program when executing the computer program.
The debugging and checking device of the bootstrap program provided by the embodiment of the invention has the beneficial effects of the debugging and checking method of the bootstrap program.
In order to solve the above technical problem, the present invention further provides a computer-readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements the steps of the debugging and checking method for the boot program.
The computer-readable storage medium provided by the embodiment of the invention has the beneficial effects of the debugging and checking method of the bootstrap program.
The method, apparatus, device and computer readable storage medium for debugging and verifying the boot program provided by the present invention are described in detail above. The principles and embodiments of the present invention are explained herein using specific examples, which are set forth only to help understand the method and its core ideas of the present invention. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.
The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
Claims (10)
1. A method for debugging and checking a boot program, comprising:
acquiring a bootstrap program, and inputting the bootstrap program to a preset simulation verification platform;
running the bootstrap program by utilizing a processor of the preset simulation verification platform;
when the preset simulation verification platform runs abnormally, analyzing the execution condition of each control instruction of the bootstrap program step by step according to a PC pointer register in the processor to determine an abnormal control instruction;
and determining the abnormal positioning of the bootstrap program according to the abnormal control instruction.
2. The method according to claim 1, wherein the executing, by the processor of the predetermined emulation verification platform, the process of the boot loader specifically includes:
and running the bootstrap program by utilizing the processor of the preset emulation verification platform, and executing operations of character printing, MMU (memory management unit) closing, L1/L2 Cache, temporary variable creation, front-end initialization, U-Boot migration and back-end initialization.
3. The method of claim 2, after said determining an exception location of the boot program from the exception control instruction, further comprising:
and debugged debugging is carried out on the bootstrap program according to the abnormal positioning, the obtained bootstrap program is entered after debug debugging, and the bootstrap program is input into a processor of a preset simulation verification platform.
4. The method of claim 3, further comprising:
and when the debug debugging still has the abnormal positioning after reaching the preset times, verifying the program codes in the hardware peripherals related to the abnormal positioning in the preset simulation verification platform.
5. The method of claim 1, after said determining an exception location of said boot program according to said exception control instruction, further comprising:
and acquiring a solution corresponding to the abnormal positioning from a preset fault scheme information base.
6. The method of claim 1, after said determining an exception location of said boot program according to said exception control instruction, further comprising:
and sending out corresponding prompt information according to the abnormal positioning.
7. The method according to any one of claims 1 to 6, further comprising, after said determining an exception location of the boot program according to the exception control instruction:
and recording the abnormal positioning and the corresponding detection time to a log.
8. A device for debugging and verifying a boot program, comprising:
the input module is used for acquiring a bootstrap program and inputting the bootstrap program to a preset simulation verification platform;
the running module is used for running the bootstrap program by utilizing the processor of the preset simulation verification platform;
the determining module is used for analyzing the execution condition of each control instruction of the bootstrap program step by step according to a PC pointer register in the processor when the preset simulation verification platform has abnormal operation, and determining an abnormal control instruction;
and the positioning module is used for determining the abnormal positioning of the bootstrap program according to the abnormal control instruction.
9. A debugging verification device for a boot program, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the method of debugging a boot program according to any one of claims 1 to 7 when executing said computer program.
10. A computer-readable storage medium, characterized in that a computer program is stored on the computer-readable storage medium, which computer program, when being executed by a processor, carries out the steps of the debugging checking method of a boot program according to one of claims 1 to 7.
Priority Applications (1)
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|---|---|---|---|
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|---|---|---|---|---|
| CN113297085A (en) * | 2021-05-31 | 2021-08-24 | 北京经纬恒润科技股份有限公司 | Algorithm verification method and device based on SOC platform |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110320783A1 (en) * | 2010-06-24 | 2011-12-29 | International Business Machines Corporation | Verification using opcode compare |
| CN108287775A (en) * | 2018-03-01 | 2018-07-17 | 郑州云海信息技术有限公司 | A kind of method, apparatus, equipment and the storage medium of server failure detection |
-
2021
- 2021-01-15 CN CN202110057755.5A patent/CN112765021A/en not_active Withdrawn
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110320783A1 (en) * | 2010-06-24 | 2011-12-29 | International Business Machines Corporation | Verification using opcode compare |
| CN108287775A (en) * | 2018-03-01 | 2018-07-17 | 郑州云海信息技术有限公司 | A kind of method, apparatus, equipment and the storage medium of server failure detection |
Non-Patent Citations (1)
| Title |
|---|
| JASON416就是我: "Uboot 网卡移植遇到的问题与解决方法", 《HTTPS://BLOG.CSDN.NET/JASON_416/ARTICLE/DETAILS/103797602》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113297085A (en) * | 2021-05-31 | 2021-08-24 | 北京经纬恒润科技股份有限公司 | Algorithm verification method and device based on SOC platform |
| CN113297085B (en) * | 2021-05-31 | 2023-08-08 | 北京经纬恒润科技股份有限公司 | SOC platform-based algorithm verification method and device |
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