CN113066889B - Silicon-based PIN detector-based n-p-i-n phototriode and preparation method thereof - Google Patents
Silicon-based PIN detector-based n-p-i-n phototriode and preparation method thereof Download PDFInfo
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/11—Devices sensitive to infrared, visible or ultraviolet radiation characterised by two potential barriers or surface barriers, e.g. bipolar phototransistor
- H01L31/1105—Devices sensitive to infrared, visible or ultraviolet radiation characterised by two potential barriers or surface barriers, e.g. bipolar phototransistor the device being a bipolar phototransistor
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F42—AMMUNITION; BLASTING
- F42C—AMMUNITION FUZES; ARMING OR SAFETY MEANS THEREFOR
- F42C13/00—Proximity fuzes; Fuzes for remote detonation
- F42C13/02—Proximity fuzes; Fuzes for remote detonation operated by intensity of light or similar radiation
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Abstract
An n-p-i-n phototriode based on a silicon-based PIN detector and a preparation method thereof, wherein the n-p-i-n phototriode comprises a substrate; an intrinsic I layer formed on the substrate; a P + layer formed on the intrinsic I layer; the N + layer is formed on the P + layer and is used as an emitting electrode of the N-P-i-N photoelectric triode; the passivation antireflection film is formed on the N + layer and used for protecting the front surface of the N-p-i-N photoelectric triode and playing an antireflection effect on a received infrared pulse laser signal; the front electrode is formed on the N + layer and is obtained by annular etching of the passivation antireflection film; and a back electrode formed on the back surface of the substrate. The N-P-i-N photoelectric triode of the invention is characterized in that on the basis of a silicon-based PIN detector, a N + layer is formed by performing high-concentration ion implantation once on a P + layer of the PIN detector and is used as an emitting electrode of the N-P-i-N photoelectric triode, so that a novel device structure for converting the PIN detector into the N-P-i-N photoelectric triode is realized.
Description
Technical Field
The invention belongs to the technical field of design and manufacture of semiconductor photoelectric devices, relates to the technical field of silicon-based NPN (negative-positive-negative) phototriodes, and particularly relates to an n-p-i-n phototriode based on a silicon-based PIN (positive-negative) detector and a preparation method thereof.
Background
Phototriodes belong to photoelectric sensors, and are also called phototriodes or phototransistors, as photoelectric conversion devices, the phototriodes are widely applied to the aspects of detection of optical signals, receiving and amplification of optical signals, transmission and isolation of optical signals and the like, and become indispensable devices in many photoelectric systems. Because the silicon material is low in cost and the semiconductor silicon process is mature, most of the phototriodes are NPN type phototriodes made of the silicon material, the silicon-based phototriodes are suitable for detecting infrared laser signals, the internal structure of the phototriodes is similar to that of a common triode, and the phototriodes are provided with three regions which are respectively an emitting electrode, a collecting electrode, a base electrode and an emitting junction and a collecting junction formed by two PN junctions. The difference between the structure and the NPN triode is that the base electrode of the photoelectric triode mostly does not need electrodes, and only the emitter and the collector need to be led out in practical application, so that the photoelectric triode can be used as a device at two ends like a photodiode.
Compared with a photodiode, the phototriode has the advantages that the detected photocurrent signal can be amplified inside the device, the output signal is the amplified photocurrent signal, the amplification factor is the amplification factor of the phototriode, namely, under the same illumination condition, the photocurrent signal of the phototriode is far greater than that of the photodiode, and the sensitivity is far higher than that of the photodiode. On the one hand, the phototriode can be used for detecting a remote signal, because the output end of the phototriode is a photocurrent signal after amplification, compared with a photodiode, the signal-to-noise ratio of the output end signal can be improved, the anti-interference capability and the stability of a detection system are enhanced, on the other hand, the phototriode can be used as a photoelectric switch, and the working state is converted between a saturation area and a cut-off area. Although phototriodes have many advantages, domestic development of phototriodes is not abundant, and most of the phototriodes used in China also need to be imported.
The phototriode provided by the invention is applied to an infrared laser fuze system, the detected signal is an infrared pulse laser signal, and compared with the existing silicon-based PIN detector, the n-p-i-n phototriode based on the PIN detector has more practical value, and the main innovation points or improvement are embodied in three aspects. Firstly, a new device structure is provided, namely a photodiode is converted into a phototriode by adding an N + layer on the basis of a PIN detector device; when the system is applied, the n-p-i-n phototriode has larger photocurrent signals than a PIN detector, so that signals at a longer distance can be detected, the anti-interference capability of the system is improved, and the stability of the system is enhanced; thirdly, signals of the PIN detector are amplified, and more flexibility can be brought to the design of an amplifying circuit in the later period.
Disclosure of Invention
In view of the above, one of the main objectives of the present invention is to provide a silicon-based PIN detector-based photo-transistor and a method for manufacturing the same, so as to at least partially solve at least one of the above technical problems.
In order to achieve the above object, as one aspect of the present invention, there is provided an n-p-i-n phototransistor based on a silicon-based PIN detector, including:
a substrate as a collector of the n-p-i-n phototransistor;
the intrinsic I layer is formed on the substrate and is used as a depletion region of a collector junction of the n-p-I-n photoelectric triode;
the P + layer is formed on the intrinsic I layer and is used as a base electrode of the n-P-I-n photoelectric triode;
the N + layer is formed on the P + layer and is used as an emitting electrode of the N-P-i-N photoelectric triode;
the passivation antireflection film is formed on the N + layer and used for protecting the front surface of the N-p-i-N photoelectric triode and playing an antireflection effect on a received infrared pulse laser signal;
the front electrode is formed on the N + layer and is obtained by passivating the antireflection film through annular etching; and
and a back electrode formed on the back surface of the substrate.
As another aspect of the present invention, there is also provided a method for preparing an n-p-i-n phototransistor based on a silicon-based PIN detector, comprising:
preparing an intrinsic I layer on a substrate;
preparing a P + layer on the intrinsic I layer;
preparing an N + layer on the P + layer;
preparing a passivation anti-reflection film on the N + layer;
preparing a front electrode on the passivated antireflection film;
and preparing a back electrode on the back of the substrate to finish the preparation of the photoelectric triode based on the silicon-based PIN detector.
Based on the technical scheme, compared with the prior art, the n-p-i-n photoelectric triode based on the silicon-based PIN detector and the preparation method thereof have at least one or part of the following advantages:
1. the invention provides an N-P-i-N phototriode based on a silicon-based PIN detector, wherein an N + layer is formed by performing ion implantation with high concentration once on a P + layer of the PIN detector on the basis of the silicon-based PIN detector and is used as an emitting electrode of the N-P-i-N phototriode, so that a novel device structure for converting the PIN detector into the N-P-i-N type phototriode is realized;
2. compared with a PIN detector, the n-p-i-n phototriode can amplify a photocurrent signal detected by the PIN detector in a device, and the output end of the n-p-i-n phototriode is the amplified photocurrent signal;
3. compared with a common silicon-based NPN photoelectric triode, the n-p-I-n photoelectric triode provided by the invention has the advantages that the intrinsic I layer can improve the response to laser signals;
4. the n-p-i-n phototriode is applied to an infrared laser fuze system and is suitable for remotely detecting a target, wherein the wavelength of a detected infrared laser signal is 860nm, the pulse width is 100ns, and the working frequency is 10kHz.
Drawings
FIG. 1 is a schematic diagram of an n-p-i-n phototransistor according to an embodiment of the present invention;
fig. 2 is a schematic top view structural diagram of an n-p-i-n phototransistor according to an embodiment of the present invention.
Description of the reference numerals:
100-a substrate; 200-an intrinsic I layer; a 300-P + layer; 400-N + layer; 500-a passivation layer; 600-a front electrode; 601-electrode lead; 701-a back electrode Ti layer; 702 — back electrode Pd layer; 703-back electrode Ag layer.
Detailed Description
Hereinafter, the present invention will be described in detail with reference to the accompanying drawings and examples to assist those skilled in the art in fully understanding the objects, features and effects of the present invention. Exemplary embodiments of the present invention are illustrated in the drawings, but it should be understood that the present invention can be embodied in other various forms and should not be limited to the embodiments set forth herein. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present invention. In addition, the various embodiments of the present invention provided below and the technical features in the embodiments may be combined with each other in an arbitrary manner.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. Furthermore, the terms "comprises," "comprising," "includes," "including," "has," "having" and the like, when used herein, specify the presence of stated features, steps, operations, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, or components. The terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," "outer," and the like are used in the orientation or positional relationship indicated in the drawings for convenience in describing the invention and for simplicity in description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be construed as limiting the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Unless expressly stated or limited otherwise, the terms "mounted," "connected," and "coupled" are to be construed broadly and encompass, for example, both fixed and removable coupling as well as integral coupling; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art. All terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art unless otherwise defined. It is noted that the terms used herein should be interpreted as having a meaning that is consistent with the context of this specification and should not be interpreted in an idealized or overly formal sense.
The invention discloses an n-p-i-n photoelectric triode based on a silicon-based PIN detector, which comprises:
the substrate is used as a collector of the n-p-i-n phototriode;
the intrinsic I layer is formed on the substrate and is used as a depletion region of a collector junction of the n-p-I-n photoelectric triode;
the P + layer is formed on the intrinsic I layer and is used as a base electrode of the n-P-I-n photoelectric triode;
the N + layer is formed on the P + layer and is used as an emitting electrode of the N-P-i-N photoelectric triode;
the passivation antireflection film is formed on the N + layer and is used for protecting the front surface of the N-p-i-N photoelectric triode and playing an antireflection effect on a received infrared pulse laser signal;
the front electrode is formed on the N + layer and is obtained by annular etching of the passivation antireflection film; and
and a back electrode formed on the back surface of the substrate.
In some embodiments of the invention, the substrate comprises an N + type silicon substrate;
in some embodiments of the present invention, the N + type silicon substrate is arsenic ion (As) + ) Doping, wherein the crystal orientation is (111);
in some embodiments of the invention, the substrate has a resistivity of 0.004 to 0.008 Ω · cm, and may be, for example, 0.004 Ω · cm, 0.005 Ω · cm, 0.006 Ω · cm, 0.007 Ω · cm, 0.008 Ω · cm;
in some embodiments of the present invention, the thickness of the N + -type silicon substrate is 300 to 450um, such as 300um, 320um, 350um, 380um, 400um, 420um, 450um.
In some embodiments of the invention, the intrinsic I layer has a thickness of 35 to 42um, for example, 35um, 38um, 40um, 42um;
in some embodiments of the invention, the intrinsic I layer is a phosphorus ion doped epitaxial layer;
in some embodiments of the invention, the intrinsic I layer has a resistivity of 1100 to 1200 Ω · cm, for example 1100 Ω · cm, 1150 Ω · cm, 1180 Ω · cm, 1200 Ω · cm.
In some embodiments of the present invention, the junction depth of the base formed by the P + layer and the intrinsic I layer is 190 to 210nm, for example, 190nm, 200nm 210nm; the thickness of the base is 80 to 100nm, for example, 80nm, 90nm and 100nm;
in some embodiments of the present invention, the junction depth formed by the N + layer and the P + layer is 100 to 120nm, and may be, for example, 100nm, 110nm, or 120nm.
In some embodiments of the invention, the thickness of the passivation anti-reflection film is 450 to 530nm, for example, 450nm, 480nm, 500nm, 530nm;
in some embodiments of the present invention, the refractive index of the passivated antireflection film is 1.45 to 1.48, and may be, for example, 1.45, 1.46, 1.47, 1.48;
in some embodiments of the present invention, the material used for the front electrode includes at least one of aluminum, silver, and gold.
In some embodiments of the invention, the back electrode comprises:
a back electrode Ti layer disposed on the back surface of the substrate;
a back electrode Pd layer arranged on the back electrode Ti layer; and
a back electrode Ag layer disposed on the back electrode Pd layer;
in some embodiments of the present invention, the thickness of the back electrode Ti layer is 45 to 60nm, for example, may be 45nm, 48nm, 50nm, 55nm, 60nm;
in some embodiments of the present invention, the thickness of the back electrode Pd layer is 45 to 60nm, for example, 45nm, 48nm, 50nm, 55nm, 60nm;
in some embodiments of the present invention, the thickness of the back electrode Ag layer is 300 to 400nm, for example, 300nm, 320nm, 350nm, 380nm, 400nm.
The invention also discloses a preparation method of the photoelectric triode based on the silicon-based PIN detector, which comprises the following steps:
preparing an intrinsic I layer on a substrate;
preparing a P + layer on the intrinsic I layer;
preparing an N + layer on the P + layer;
preparing a passivation anti-reflection film on the N + layer;
preparing a front electrode on the passivated antireflection film;
and preparing a back electrode on the back of the substrate to finish the preparation of the photoelectric triode based on the silicon-based PIN detector.
In some embodiments of the present invention, the method of fabricating the P + layer includes forming a P + layer on the intrinsic I layer by ion implantation, followed by annealing to complete the P + layer fabrication;
wherein the implanted ions comprise boron ions;
wherein the annealing temperature is 800 to 900 ℃, for example 800 ℃, 820 ℃, 830 ℃, 850 ℃, 880 ℃, 900 ℃; the time is 20-30min, such as 20min, 22min, 25min, 30min.
In some embodiments of the present invention, the method for preparing an N + layer includes forming an N + layer on a P + layer by ion implantation, and then annealing to complete N + layer preparation;
wherein the implanted ions comprise phosphorus ions;
wherein the annealing temperature is 800 to 850 ℃, for example 800 ℃, 820 ℃, 830 ℃, 850 ℃; the time is 15-25min, such as 15min, 18min, 20min, 22min, and 25min.
In some embodiments of the invention, the method for preparing the front electrode comprises etching an electrode window on the passivated antireflection film, and etching SiO in the electrode window 2 And the annular front electrode is formed by alignment.
The technical solution of the present invention is further illustrated by the following specific embodiments in conjunction with the accompanying drawings. It should be noted that the following specific examples are given by way of illustration only, and the scope of the present invention is not limited thereto.
As shown in fig. 1-2, the structure of the n-p-i-n phototransistor of the present embodiment includes:
an N + type silicon substrate 100 As a collector of an N-p-i-N phototransistor having a thickness of 300-450um, preferably 380um, and arsenic ion (As) As an N + type silicon substrate + ) Doping, crystal orientation of (111), resistivity of 0.004-0.008 Ω · cm, preferably 0.004 Ω · cm.
An intrinsic I layer 200, which is formed by extending an intrinsic I layer with thickness of 35-42um, preferably 40um on the N + type silicon substrate, and is phosphorus ion (P) + ) The doped epitaxial layer has the resistivity of 1100-1200 omega-cm, preferably 1100 omega-cm, the thickness of the intrinsic I layer is basically consistent with the penetration depth of an infrared laser signal with the wavelength of 860nm, and the intrinsic I layer is used as a depletion region of a collector junction of the n-p-I-n phototriode, can absorb more photons and excite more minority carriers, namely electron-air spaceAnd the hole pair improves the response of the phototriode to the infrared laser signal.
And a P + layer 300 formed on the intrinsic I layer by ion implantation, wherein the implanted ions are boron (B +) ions, the P + layer is used as a base of the n-P-I-n photoelectric triode, the junction depth of the base formed by the P + layer and the intrinsic I layer is 190-200nm, preferably 200nm, and the thickness of the base is 80-100nm, preferably 90nm.
An N + layer 400 formed by ion implantation of phosphorus (P) on the P + layer + ) The N + layer is used as an emitter of the N-P-i-N phototriode, and the junction depth formed by the N + layer and the P + layer is 100-120nm, preferably 110nm, namely the thickness of the emitter is 100-120nm, preferably 110nm.
Passivating the antireflective film 500 by PECVD depositing SiO with a thickness of 450-530nm, preferably 500nm, on the N + layer 2 As a passivating antireflective film, i.e. SiO 450-530nm, preferably 500nm thick 2 On one hand, the front surface of the n-p-i-n photoelectric triode is protected, and on the other hand, the effect of anti-reflection is achieved on the received 860nm infrared pulse laser signals. Wherein SiO deposited by PECVD method 2 Has a refractive index of 1.45 to 1.48, preferably 1.46.
A front electrode 600 of SiO 450-530nm, preferably 500nm thick 2 Photoetching a front annular Al electrode window on the passivated antireflection film, and corroding SiO in the Al electrode window 2 And forming a front annular Al electrode by alignment, wherein the thickness of the metal Al electrode is 450-500nm, and preferably 500nm. The Al electrode can also be an Ag electrode and an Au electrode, both of which have a thickness of 450-500nm, preferably 500nm. As shown in fig. 2, an electrode lead 601 is also led out of the front electrode to facilitate electrical connection with other devices.
And a back electrode Ti layer 701, wherein a metal electrode Ti is deposited on the N + type silicon substrate, the thickness of the metal electrode Ti is 45-60nm, preferably 50nm, and the metal electrode Ti is used as a back electrode of the N-p-i-N photoelectric triode.
And a back electrode Pd layer 702, wherein metal Pd is deposited on the back metal electrode Ti, the thickness is 45-60nm, preferably 50nm, and the back electrode Pd layer is used as a back electrode of the n-p-i-n photoelectric triode.
And a back electrode Ag layer 703, wherein metal Ag is deposited on the back metal electrode Pd, and the thickness of the back electrode Ag layer is 300-400nm, preferably 350nm, and the back electrode Ag layer is used as a back electrode of the n-p-i-n photoelectric triode.
The process flow for manufacturing the n-p-i-n photoelectric triode comprises the following steps:
1) A300-450 um, preferably 380um thick N + -type silicon substrate is prepared, the substrate being arsenic ions (As) + ) Doping, crystal orientation of (111), resistivity of 0.004-0.008 Ω · cm, preferably 0.004 Ω · cm.
2) Epitaxially growing an intrinsic I layer of 35-42um, preferably 40um thickness on a N + type silicon substrate of 300-450um, preferably 380um thickness, the intrinsic I layer being phosphorus ion (P) + ) Doped epitaxial layer with a resistivity of 1100-1200 Ω -cm, preferably 1100 Ω -cm.
3) PECVD method for depositing SiO with thickness of 200-250nm, preferably 200nm 2 Etching the window of the alignment mark as the masking layer of the wet etching alignment mark, and etching off SiO in the window 2 And etching an alignment mark on the intrinsic I layer by a wet method.
4) Etching off all SiO on the intrinsic I layer 2 re-PECVD depositing SiO 500-650nm, preferably 600nm, thick 2 As an ion implantation masking layer, photoetching an ion implantation window, and etching off SiO in the window 2 Implanting boron (B) into the intrinsic layer + ) And (4) ions form a P + layer of the phototriode, and the junction depth is 190-200nm, preferably 200nm.
5) High-temperature annealing at 800-900 deg.C, preferably 800 deg.C for 20-30min, preferably 20min.
6) Etching off all SiO on the intrinsic I layer 2 re-PECVD depositing SiO 500-600nm, preferably 500nm, thick 2 As an ion implantation masking layer, photoetching an ion implantation window, and etching off SiO in the window 2 Implanting phosphorus (P) into the intrinsic layer + ) And ions are formed into an N + layer of the phototriode, and the junction depth is 100-120nm, preferably 110nm.
7) High-temperature annealing at 800-850 deg.C, preferably 800 deg.C, for 15-25min, preferably 20min.
8) Etching off all SiO on the intrinsic I layer 2 re-PECVD depositing SiO 450-530nm, preferably 500nm, thick 2 As a passivation antireflective film, siO with a thickness of 450-530nm, preferably 500nm 2 Photoetching a front annular Al electrode window on the passivated antireflection film, and corroding SiO in the Al electrode window 2 And forming a front annular Al electrode by alignment, wherein the thickness of the metal Al electrode is 450-500nm, and the thickness of the metal Al electrode is preferably 500nm.
9) And depositing Ti/Pd/Ag metal on the whole back of the N + silicon substrate, wherein the thickness of the Ti/Pd/Ag metal is 45-60nm, preferably 50nm/300-400nm, and preferably 350nm respectively as a back metal electrode of the phototriode.
The specific application is that the device is in a cut-off state under the condition of no illumination of the n-p-i-n phototriode, and when an infrared pulse laser signal exists, the device is opened and outputs an amplified pulse photocurrent signal. The specific working principle of the n-p-i-n photoelectric triode is as follows: firstly, an infrared pulse laser signal is vertically incident to the Sio 2 Passivating the antireflective film, and then passing through SiO 2 Passivating the anti-reflection film, and then passing through an N + layer with the thickness of 100-120nm, preferably 110nm and a P + layer with the thickness of 80-100nm, preferably 90nm, wherein the N + layer and the P + layer are both very thin, so that the absorption of signals can be ignored, when laser signals reach an intrinsic I layer, namely a collector junction of the N-P-I-N phototriode, electron-hole pairs can be excited, electrons and holes drift to a collector (N + substrate) and a base region (P + layer) respectively under the action of the electric field force of a depletion layer, and the phototriode is opened and is in a working state.
It should be noted that, although the invention has been shown and described with reference to the specific exemplary embodiments thereof, it should be understood by those skilled in the art that the invention is not limited to the above embodiments, and various changes and modifications may be made therein without departing from the spirit and scope of the invention, and it is intended that the invention encompass such changes and modifications as fall within the scope of the appended claims and their equivalents.
In particular, various combinations and/or combinations of features recited in the various embodiments and/or claims of the present invention can be made without departing from the spirit and teachings of the invention, even if such combinations or combinations are not explicitly recited in the present invention. All such combinations and/or associations are within the scope of the present invention. The scope of the invention should, therefore, be determined not with reference to the appended claims, but should instead be determined with reference to the following claims.
Claims (10)
1. An n-p-i-n phototransistor based on a silicon-based PIN detector, comprising:
a substrate as a collector of the n-p-i-n phototransistor;
the intrinsic I layer is formed on the substrate and is used as a depletion region of a collector junction of the n-p-I-n photoelectric triode;
the P + layer is formed on the intrinsic I layer and is used as a base electrode of the n-P-I-n photoelectric triode;
the N + layer is formed on the P + layer and is used as an emitting electrode of the N-P-i-N photoelectric triode;
the passivation antireflection film is formed on the N + layer and used for protecting the front surface of the N-p-i-N photoelectric triode and playing an antireflection effect on a received infrared pulse laser signal;
the front electrode is formed on the N + layer and is obtained by annular etching of the passivation antireflection film; and
and a back electrode formed on the back surface of the substrate.
2. The n-p-i-n phototransistor of claim 1,
the substrate comprises an N + type silicon substrate;
wherein the N + type silicon substrate is arsenic ion As + Doping, wherein the crystal orientation is (111);
the resistivity of the substrate is 0.004 to 0.008 Ω · cm;
the thickness of the N + type silicon substrate is 300 to 450um.
3. The n-p-i-n phototransistor of claim 1,
the thickness of the intrinsic I layer is 35-42 um;
the intrinsic I layer is an epitaxial layer doped with phosphorus ions;
the intrinsic I layer has a resistivity of 1100 to 1200 Ω · cm.
4. The n-p-i-n phototransistor of claim 1,
the junction depth of the base electrode formed by the P + layer and the intrinsic I layer is 190-210 nm, and the thickness of the base electrode is 80-100 nm;
the junction depth formed by the N + layer and the P + layer is 100-120 nm.
5. The n-p-i-n phototransistor of claim 1,
the thickness of the passivation antireflection film is 450-530 nm;
the refractive index of the passivated antireflection film is 1.45-1.48;
the front electrode is made of at least one of aluminum, silver and gold.
6. The n-p-i-n phototransistor of claim 1,
the back electrode includes:
a back electrode Ti layer disposed on the back surface of the substrate;
a back electrode Pd layer disposed on the back electrode Ti layer; and
a back electrode Ag layer disposed on the back electrode Pd layer;
wherein the thickness of the back electrode Ti layer is 45 to 60nm;
wherein the thickness of the back electrode Pd layer is 45-60 nm;
wherein the thickness of the back electrode Ag layer is 300 to 400nm.
7. A preparation method of a photoelectric triode based on a silicon-based PIN detector comprises the following steps:
preparing an intrinsic I layer on a substrate;
preparing a P + layer on the intrinsic I layer;
preparing an N + layer on the P + layer;
preparing a passivation anti-reflection film on the N + layer;
preparing a front electrode on the passivated antireflection film;
and preparing a back electrode on the back of the substrate to finish the preparation of the photoelectric triode based on the silicon-based PIN detector.
8. The production method according to claim 7,
the method for preparing the P + layer comprises the steps of forming the P + layer on the intrinsic I layer through ion implantation, and then annealing to finish the preparation of the P + layer;
wherein the implanted ions comprise boron ions;
wherein the annealing temperature is 800-900 ℃ and the time is 20-30 min.
9. The production method according to claim 7,
the method for preparing the N + layer comprises the steps of forming the N + layer on the P + layer through ion implantation, and then annealing to finish the preparation of the N + layer;
wherein the implanted ions comprise phosphorus ions;
wherein the annealing temperature is 800-850 ℃, and the time is 15-25 min.
10. The method of claim 7,
the method for preparing the front electrode comprises the steps of etching an electrode window on the passivated antireflection film and corroding SiO in the electrode window 2 And the annular front electrode is formed by alignment.
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