CN113066810B - Pixel device - Google Patents
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- CN113066810B CN113066810B CN202110323016.6A CN202110323016A CN113066810B CN 113066810 B CN113066810 B CN 113066810B CN 202110323016 A CN202110323016 A CN 202110323016A CN 113066810 B CN113066810 B CN 113066810B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
- H01L27/14607—Geometry of the photosensitive area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/1461—Pixel-elements with integrated switching, control, storage or amplification elements characterised by the photosensitive area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
- H01L27/14616—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor characterised by the channel of the transistor, e.g. channel having a doping gradient
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
Abstract
A pixel device, comprising: a substrate; the photodiode is formed on the substrate and comprises a P-type epitaxial layer, an N-type buried layer and a surface P + layer, wherein the N-type buried layer and the surface P + layer are formed in the P-type epitaxial layer; the N-type buried layer comprises a first ion implantation area and a second ion implantation area, wherein the first ion implantation area is at least partially formed on the second ion implantation area, and the first ion implantation area comprises a central area and a plurality of pointed areas positioned at the outer edge of the central area; the floating diffusion region is formed in a region except the surface P + layer of the P-type epitaxial layer; and the annular transmission transistor grid is at least partially formed on the upper surface of the photodiode and surrounds the floating diffusion region. Since the N-type buried layer of the photodiode includes the first ion implantation region having the central region and the plurality of tapered regions located at the outer edge of the central region, transfer of photo-generated charges from the N-type buried layer to the floating diffusion region is accelerated.
Description
Technical Field
The invention relates to the technical field of image sensors, in particular to a pixel device.
Background
The CMOS image sensor suitable for low light level and ultrahigh time resolution is widely applied to scientific research, such as fluorescence imaging. Since the exposure time of a high time resolution CMOS image sensor is below 1us, the pixel size needs to be large enough to satisfy the higher sensitivity. The time resolution of the image sensor is seriously influenced by the transfer speed and transfer efficiency of the photo-generated charges under the condition of large-size pixel devices.
With the increase of the size of a pixel device in the prior art, the transfer speed of photo-generated charges cannot meet the requirement that a CMOS image sensor applying the pixel device realizes nanosecond-level high-time-resolution imaging; and due to the increase of the size, potential barriers or potential wells are easy to appear in the overlapped region of the transfer transistor and the photodiode, thereby reducing the transfer efficiency of photo-generated charges.
Therefore, in order to realize nanosecond time resolution imaging, a novel pixel structure is needed, which can achieve a very high photo-generated charge transfer speed while ensuring a high transfer efficiency, thereby realizing high time resolution imaging of the CMOS image sensor.
Disclosure of Invention
In view of the above, it is a primary object of the present invention to provide a pixel device, which is intended to solve at least one of the above-mentioned technical problems.
In order to achieve the purpose, the technical scheme of the invention comprises the following steps:
provided is a pixel device, including:
a substrate;
the photodiode is formed on the substrate and comprises a P-type epitaxial layer, an N-type buried layer and a surface P + layer, wherein the N-type buried layer and the surface P + layer are formed in the P-type epitaxial layer;
the N-type buried layer comprises a first ion implantation region and a second ion implantation region, wherein the first ion implantation region is at least partially formed on the second ion implantation region, and comprises a central region and a plurality of pointed regions positioned at the outer edge of the central region;
the floating diffusion region is formed in a region except the surface P + layer of the P type epitaxial layer;
and the annular transmission transistor grid is at least partially formed on the upper surface of the photodiode and surrounds the floating diffusion region.
Based on the technical scheme, compared with the prior art, the invention has at least one or one part of the following beneficial effects:
the N-type buried layer of the photodiode comprises a first ion implantation area which is provided with a central area and a plurality of sharp areas positioned at the outer edge of the central area, so that the potential gradient of a photoproduction charge transmission path is effectively enhanced, the transfer of photoproduction charges from the N-type buried layer to a floating diffusion area is accelerated, and the N-type buried layer can be used for realizing a CMOS image sensor facing nanosecond high-time resolution imaging application in a low-light-level environment;
by carrying out gradient doping on the channel region, the quantity of rebound charges in the channel region is reduced, and the transfer efficiency of photo-generated charges is effectively improved.
Drawings
Fig. 1 is a front view of a pixel device according to an embodiment of the present invention;
fig. 2 is a schematic cross-sectional view of a pixel device along the direction c-c' in fig. 1 (from the boundary of the N-type buried layer to the middle of the pixel device) according to an embodiment of the present invention;
fig. 3 is an electrostatic potential distribution of a pixel device in a fully depleted state along a-a' direction in fig. 1 according to an embodiment of the present invention;
fig. 4 is an electrostatic potential distribution of a pixel device in a fully depleted state along a direction b-b' in fig. 1 according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a simulation timing sequence of a pixel device according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a pixel device of comparative example 1 according to an embodiment of the present invention.
[ description of reference ]
1. Substrate 2, floating diffusion region
3. Ring-shaped transmission transistor grid 4, P-type epitaxial layer
5. N-type buried layer 6, surface P + layer
7. Channel region 8, anti-punch-through region
9. Threshold adjustment region 10, shallow trench isolation region
N1, a first ion implantation region N2, a second ion implantation region
13. Substrate 14, transfer transistor gate
15. P-type epitaxial layer 16, N-type buried layer
17. A first ion implantation region 18 and a second ion implantation region
19. Punch-through prevention region 20, threshold adjustment region
21. Drain 22 of reset transistor, first shallow trench isolation region
23. Second shallow trench isolation region 24, reset transistor gate
25. Charge storage region 26, P-well implant
Detailed Description
The invention provides a pixel device which comprises a substrate, a photodiode, a floating diffusion region and a ring-shaped transmission transistor grid electrode.
A substrate;
the photodiode is formed on the substrate and comprises a P-type epitaxial layer, an N-type buried layer and a surface P + layer, wherein the N-type buried layer and the surface P + layer are formed in the P-type epitaxial layer; the N-type buried layer comprises a first ion implantation area and a second ion implantation area, wherein the first ion implantation area is at least partially formed on the second ion implantation area, and the first ion implantation area comprises a central area and a plurality of pointed areas positioned at the outer edge of the central area.
The floating diffusion region is formed in a region except the surface P + layer of the P-type epitaxial layer;
and the annular transmission transistor grid is at least partially formed on the upper surface of the photodiode and surrounds the floating diffusion region.
The N-type buried layer of the photodiode comprises a first ion implantation area which is provided with a central area and a plurality of sharp areas positioned at the outer edge of the central area, so that the potential gradient of a photoproduction charge transmission path is effectively enhanced, the transfer of photoproduction charges from a photosensitive area of the N-type buried layer to a floating diffusion area is accelerated, and the CMOS image sensor facing nanosecond high-time resolution imaging application in a micro-light environment can be realized.
The detailed components and structure of the pixel device of the present invention will be described in detail with reference to the accompanying drawings.
In the following description, specific details are set forth in order to provide a thorough understanding of the present invention, but the present invention may be embodied in many different forms other than those described herein, and it will be apparent to those skilled in the art that the present invention may be embodied in many different forms without departing from the spirit or scope of the present invention. The invention is therefore not limited to the specific implementations disclosed below.
As shown in fig. 1 and 2, the present invention provides a pixel device including a substrate 1, a photodiode, a floating diffusion region 2, and a ring-shaped transfer transistor gate 3.
A substrate 1.
According to an embodiment of the present invention, the material of the substrate 1 may be P-type polysilicon.
The photodiode is formed on the substrate 1 and comprises a P-type epitaxial layer 4, an N-type buried layer 5 and a surface P + layer 6, wherein the N-type buried layer 5 and the surface P + layer 6 are formed in the P-type epitaxial layer 4; the N-type buried layer 5 includes a first ion implantation region N1 and a second ion implantation region N2, the first ion implantation region N1 is at least partially formed on the second ion implantation region N2, wherein the first ion implantation region N1 includes a central region and a plurality of spike regions located at the outer edge of the central region.
According to an embodiment of the present invention, the photodiode may be circular.
According to an embodiment of the present invention, the photodiode may be a buried photodiode.
According to an embodiment of the present invention, the surface P + layer 6 may include P-type dopant ions implanted by means of ion implantation. According to an embodiment of the present invention, the P-type dopant ion may be boron difluoride.
According to an embodiment of the present invention, the first ion implantation region N1 and the second ion implantation region N2 of the photodiode N-type buried layer 5 may be light sensing regions of the photodiode for receiving incident light and generating photo-generated charges.
According to an embodiment of the present invention, the second ion implantation region may completely cover the N-type buried layer 5, thereby maximizing the photosensitive area of the N-type buried layer 5.
According to the embodiment of the invention, since the first ion implantation region N1 is at least partially formed on the second ion implantation region N2, gradient doping is formed at the overlapping portion of the first ion implantation region N1 and the second ion implantation region N2, so that a lateral electric field is formed.
According to an embodiment of the present invention, the lateral electric field formed by the overlapping portion of the first ion implantation region N1 and the second ion implantation region N2 may accelerate the transfer of photo-generated charges.
According to the embodiment of the present invention, although the transfer of the photo-generated charges can be accelerated by the gradient doping formed by the overlapping portion of the first ion implantation region N1 and the second ion implantation region N2, when the size of the photodiode is larger, the acceleration of the transfer of the photo-generated charges by the gradient doping cannot meet the requirement of the larger size photodiode on the charge transfer speed.
According to an embodiment of the present invention, the size of the pixel device may be 14um × 14 um.
According to the embodiments of the present invention, the photo-generated charge transfer speed required by the pixel device with the size of 14um × 14um cannot be satisfied by only gradient doping, so that the shape doping is required to further accelerate the photo-generated charge transfer.
According to the embodiment of the invention, the region at the outer edge of the central region of the first ion implantation region N1 is set to be the pointed region to form the shape doping, so that a built-in electric field can be formed in the first ion implantation region N1, the potential gradient on the photo-generated charge transfer path is enhanced, and the technical effect of further accelerating the transfer of the photo-generated charge is achieved.
According to the embodiment of the invention, since the first ion implantation region N1 is at least partially formed on the second ion implantation region N2, on the basis that the first ion implantation region N1 and the second ion implantation region N2 form gradient doping by overlapping, a built-in electric field formed by shape doping of the first ion implantation region N1 can be superimposed, thereby further accelerating the transfer of photo-generated charges.
According to an embodiment of the present invention, the central area comprises a circle, a square or a rectangle; the shape of the pointed region comprises a triangle.
According to the embodiment of the present invention, the central region of the first ion implantation region N1 may be circular, but is not limited thereto, and may also be square or rectangular; however, when the central region of the first ion implantation region N1 is circular, the distance from the boundary of the circle to the center of the circle is equal, which is more favorable for transferring photo-generated charges.
According to an embodiment of the present invention, the pointed region at the outer edge of the central region of the first ion implantation region N1 may be a triangular region.
According to an embodiment of the present invention, since the first ion implantation region N1 includes a central region and a triangular region protruding outward from the central region like a tree branch, the first ion implantation region N1 may be a triangular tree-shaped first ion implantation region N1.
According to the embodiment of the invention, the number of the pointed areas can be more than or equal to 4, and the number of the pointed areas is not particularly limited in the embodiment of the invention and can be flexibly adjusted according to actual conditions.
According to the embodiment of the invention, too small number of the pointed areas can cause too low built-in electric field strength and poor effect of accelerating photo-generated charge transfer, and too large number of the pointed areas can cause difficulty in realization of the preparation process.
According to an alternative embodiment of the invention, the number of pointed areas may be 18.
And a floating diffusion region 2 formed in a region of the P-type epitaxial layer 4 except for the surface P + layer 6.
According to an embodiment of the present invention, the floating diffusion region 2 may be used to store photo-generated charges generated by the first ion implantation region N1 and the second ion implantation region N2.
And a ring-shaped transmission transistor gate 3 at least partially formed on the upper surface of the photodiode, wherein the ring-shaped transmission transistor gate 3 surrounds the floating diffusion region 2.
According to an embodiment of the present invention, the ring-shaped transfer transistor gate 3 is used to transfer photo-generated charges from the buried N-type layer 5 to the floating diffusion region 2.
According to the embodiment of the invention, the ring-shaped transfer transistor gate 3 and the photodiode can be designed by using a CIS process.
According to an embodiment of the present invention, the floating diffusion is located at a geometric center of the pixel device.
According to an embodiment of the present invention, referring to fig. 1 and 2, the floating diffusion region 2 may be located at a geometric center of the pixel device, and more particularly, the floating diffusion region 2 may be located at a geometric center of the photodiode N-type buried layer 5.
According to an embodiment of the present invention, the central region of the first ion implantation region N1 may be provided in a circular shape, so that the floating diffusion region 2 may be located at the center of the central region of the first ion implantation region N1.
According to the embodiment of the invention, the floating diffusion region 2 is positioned at the geometric center of the pixel device, so that the transfer path of the photo-generated charges from the N-type buried layer 5 to the floating diffusion region 2 can be shortened, and the transfer speed of the photo-generated charges is further accelerated.
According to an embodiment of the present invention, the pixel device further includes a channel region.
And the channel region is positioned below the grid electrode of the annular transmission transistor, and the channel region and the surface P + layer have a first overlapping region so as to form gradient doping.
According to the embodiment of the present invention, since the channel region 7 has the first overlap region with the surface P + layer 6, the channel region gradient doping is formed in the channel region 7, thereby achieving an effect of reducing the amount of charges bouncing from the floating diffusion region 2 to the photodiode.
According to an embodiment of the present invention, the channel region and the first ion implantation region have a second overlapping region.
According to the embodiment of the invention, due to the partial overlapping of the channel region 7 and the first ion implantation region N1, an effective photogenerated charge transfer channel can be formed between the floating diffusion region 2 and the photodiode N-type buried layer 5, and potential barriers and potential wells can be eliminated.
According to the embodiment of the present invention, the length of the second overlapping area can be flexibly set according to actual situations, and the embodiment of the present application does not specifically limit the length of the second overlapping area.
According to the embodiment of the present invention, the excessive length of the second overlapping region will result in the excessive length of the channel region 7 of the transfer transistor, which is not favorable for the rapid transfer of photo-generated charges; too short a length of the second overlap region results in a risk that the potential barriers and potential wells cannot be completely eliminated.
According to an embodiment of the present invention, the length of the second overlap region may be 0.2-0.5 um.
According to an embodiment of the invention, the length of the first overlap area is greater than the length of the second overlap area.
According to the embodiment of the present invention, since the overlapping length of the channel region 7 and the surface P + layer 6 is greater than the overlapping length of the channel region 7 and the first ion implantation region N1, a step-shaped gradient doping of the channel region is formed from the photodiode to the channel region 7, thereby further achieving the effect of reducing the amount of charges bouncing from the floating diffusion region 2 to the photodiode.
According to the embodiment of the present invention, the N-type buried layer 5 for generating photo-generated charges and the floating diffusion region 2 for storing photo-generated charges should be separated, otherwise, if lateral punch-through occurs between the floating diffusion region 2 and the N-type buried layer 5, photo-generated charges will flow from the N-type buried layer 5 to the floating diffusion region 2 without being controlled by the ring-shaped transfer transistor 3, resulting in abnormal operation of the pixel device.
According to an embodiment of the present invention, the pixel device further includes a punch-through prevention region.
And the anti-punch-through region is formed in the region of the P type epitaxial layer except the surface P + layer and the floating diffusion region and is positioned between the N type buried layer and the floating diffusion region.
According to an embodiment of the present invention, the anti-punch through region 8 is used to isolate the floating diffusion region 2 from the N-type buried layer 5, and in particular, the anti-punch through region 8 is disposed between the isolated floating diffusion region 2 and the N-type buried layer 5, preventing lateral punch through between the floating diffusion region 2 and the N-type buried layer 5.
According to an embodiment of the present invention, the anti-punch-through region 8 may include P-type doped ions implanted by means of ion implantation. According to an embodiment of the present invention, the P-type dopant ion may be boron.
According to the embodiment of the present invention, in the process of manufacturing the pixel device, the first ion implantation region N1 and/or the second ion implantation region N2 may be narrowed due to the fluctuation of the manufacturing process, thereby causing a reduction in the effects of sensitization of the first ion implantation region N1 and/or the second ion implantation region N2 and acceleration of photo-generated charge transfer.
According to an embodiment of the invention, the anti-punch-through region at least partially overlaps the surface P + layer; the anti-punch through region at least partially overlaps the floating diffusion region; the anti-punch through region at least partially overlaps the channel region.
According to the embodiment of the invention, since the penetration preventing region 8 at least partially overlaps the surface P + layer 6, the penetration preventing region 8 at least partially overlaps the floating diffusion region 2, and the penetration preventing region 8 at least partially overlaps the channel region 7, it is possible to prevent the first ion implantation region N1 and/or the second ion implantation region N2 from being narrowed due to fluctuations in the manufacturing process, and the effects of sensitizing the first ion implantation region N1 and/or the second ion implantation region N2 and accelerating the photo-generated charge transfer are ensured.
According to an embodiment of the present invention, the pixel device further includes a threshold adjusting region.
And the threshold adjusting region is positioned below the gate of the annular transmission transistor, and the length of the threshold adjusting region is greater than that of the gate of the annular transmission transistor.
According to the embodiment of the invention, the conducting threshold voltage value of the gate 3 of the annular transmission transistor can be changed by changing the concentration of the boron difluoride injected by the ion implantation in the value adjusting area.
According to the embodiment of the present invention, since the length of the threshold adjusting region 9 is longer than the length of the gate electrode 3 of the ring-shaped transfer transistor, it is possible to prevent the first ion implantation region N1 and/or the second ion region from being narrowed due to fluctuation in the manufacturing process, and the effects of narrowing the sensitization of the first ion implantation region and/or the second ion region and accelerating the transfer of photo-generated charges are ensured.
According to an embodiment of the present invention, the threshold adjusting region 9 may include P-type dopant ions implanted by means of ion implantation, and according to an embodiment of the present invention, the P-type dopant ions may include boron difluoride.
The threshold adjustment region at least partially overlaps the surface P + layer;
the threshold adjustment region at least partially overlaps the channel region;
the threshold adjustment region at least partially overlaps the anti-punch-through region;
the threshold adjustment region at least partially overlaps the floating diffusion region.
According to the embodiment of the invention, the first ion implantation area comprises P-type doped ions implanted by means of ion implantation; wherein the P-type dopant ions include phosphorous ions.
The implantation energy of the phosphorus ions implanted by the ion implantation method includes 30KeV to 60 KeV.
The implantation dose of phosphorus ions implanted by ion implantation includes 1.0e 12 /cm 2 -2.5e 12 /cm 2 。
According to an embodiment of the present invention, the second ion implantation region includes P-type dopant ions implanted by means of ion implantation; wherein the P-type dopant ions include phosphorous ions.
The sum of the implantation energies of the phosphorus ions implanted by the ion implantation method includes 50KeV to 90 KeV.
The implantation dose of phosphorus ions implanted by ion implantation includes 0.5e 12 /cm 2 -1.5e 12 /cm 2 。
According to an embodiment of the present invention, the energy of the P-type dopant ions implanted by the ion implantation in the first ion implantation region N1 may be less than the energy of the P-type dopant ions implanted by the ion implantation in the second ion implantation region N2, so that the second ion implantation region N2 has a deeper longitudinal depth in the N-type buried layer 5 than the first ion implantation region N1.
According to the embodiment of the present invention, the first ion implantation region N1 is implanted with P-type doped ions by ion implantation before the formation of the ring-shaped transfer transistor gate 3; the second ion implantation region N2 is implanted with P-type doped ions by ion implantation, and can be implanted after the ring-shaped transfer transistor gate 3 is formed, so that the first ion implantation region N1 and the channel region 7 of the ring-shaped transfer transistor gate 3 can be overlapped, and the second ion implantation region N2 and the channel region 7 of the ring-shaped transfer transistor gate 3 are not overlapped.
According to an embodiment of the present invention, the shape of the second ion implantation region includes a circle or a square.
According to an embodiment of the present invention, the second ion implantation region N2 has a circular or square shape. Since the photodiode is circular, when the second ion implantation region N2 is circular in shape, the second ion implantation region N2 may completely cover the N-type buried layer 5 of the photodiode, thereby maximizing the light sensing area of the photodiode.
According to an embodiment of the present invention, when the shape of the second ion region is a circle, the radius of the second ion region may be 7 um.
According to an embodiment of the present invention, the pixel device may further include a shallow trench isolation region 10.
According to an embodiment of the present invention, a shallow trench isolation region 10 may be formed in the P-type epitaxial layer 4 between the photodiode and the side boundary of the P-type epitaxial layer 4, for preventing photo-generated charges generated by the N-type buried layer from leaking to the P-type epitaxial layer 4.
According to an embodiment of the present invention, referring to fig. 3, the abscissa distance may be a distance to the floating diffusion region; the potential creates a gradient due to the concentration change from the second ion implantation region to the first ion implantation region; meanwhile, due to the triangular dendritic doping of the first ion injection region, more linear potential distribution is formed, and therefore a better photo-generated charge acceleration effect can be achieved.
According to an embodiment of the present invention, referring to fig. 4, the abscissa distance may be a distance to the floating diffusion region; the electron potential of the convex side of the triangular dendritic structure is higher than the electron potential of the concave side of the triangular dendritic structure, thereby accelerating the transfer of photo-generated charges to the center of the triangular dendritic structure, i.e., the floating diffusion region.
According to an embodiment of the present invention, the pixel device may be externally connected with a reset transistor 13, and the reset transistor 13 is used for resetting the photodiode and the floating diffusion region.
According to an embodiment of the present invention, referring to fig. 5, VR is the reset transistor gate input signal and VTX is the ring transfer transistor gate input signal. When the simulation is started, the VTX is set to be high level, and the VR is set to be high level, so that the photodiode and the floating diffusion region are reset; setting the VTX to be a low level, adding light, and converting photons into photo-generated charges in the photodiode when the pixel device is in an exposure stage; before the exposure stage is finished, setting VR to be low level, and after the exposure stage is finished, setting VTX to be high level, at the moment, the pixel device is in a photo-generated charge transfer stage, and the charge in the photodiode is quickly read out to a floating diffusion region under the potential gradient; VTX is then set low to complete one cycle of operation.
According to the embodiment of the invention, the pixel device has the advantages that under the condition of accumulating 30000 photo-generated charges, and when the charge transfer efficiency reaches 99.9%, the charge transfer time is 1ns, and meanwhile, the rebound charge level is below 1 charge, so that the pixel device provided by the embodiment of the invention can be used for high-time-resolution imaging in a low-light-level environment.
Comparative example 1.
Referring to fig. 6, the present invention provides a comparative example of a pixel device including a substrate 13, a transfer transistor gate 14, a P-type epitaxial layer 15, an N-type buried layer 16 of a photodiode, a first ion implantation region 17 of the photodiode, a second ion implantation region 18 of the photodiode, a punch-through prevention region 19, a threshold adjustment region 20, a drain 21 of a reset transistor, a first shallow trench isolation region 22, a second shallow trench isolation region 23, a reset transistor gate 24, a charge storage region 25, a P-well implantation region 26.
The pixel device according to the comparative example of the present invention operates by first resetting the charge storage region 27 to a certain reset voltage; then the incident light completes the conversion of photons to photo-generated charges through the photodiode; the transfer transistor gate 26 is then turned on again to transfer the photo-generated charge to the charge storage region 27 by the potential difference between the charge storage region 27 and the photodiode, completing the conversion of the optical signal to a voltage signal.
According to the pixel device provided by the comparative example of the invention, the transverse electric field can be effectively formed by carrying out gradient doping on the N-type buried layer of the photodiode, and the transfer of photo-generated charges is accelerated. However, when the size of the photodiode is further increased, and the pixel device designed by only gradient doping is completely depleted, due to the existence of the doping concentration gradient of the N-type buried layer, the internal potential of the pixel device is raised in the region where the concentration changes, but a region with most of flat potential still exists in the rest doped region in the N-type buried layer 17 of the photodiode. Although multiple graded potentials can be formed in the pixel device by more graded doping, the complexity of the process design is increased.
The pixel device provided by the comparative example according to the present invention has the following disadvantages: when the size of the photodiode continues to increase, although the photodiode N-type buried layer 17 adopts the gradient doping design, the transfer of photo-generated charges is difficult to accelerate by adjusting the ion implantation energy or dosage, and the imaging of nanosecond level high time resolution is realized; and due to the increase in size, potential barriers or potential wells tend to occur in the region where the transfer transistor overlaps the photodiode, thereby reducing the transfer efficiency of photo-generated charges.
In summary, the pixel device provided by the embodiment of the present invention can be customized by using a CIS process, and under a process design as simple as possible, the pixel device provided by the embodiment of the present invention enhances the potential gradient of the photo-generated charge transmission path by the shape doping and gradient doping design of the N-type buried layer of the photodiode, and accelerates the transfer of the photo-generated charge from the photosensitive region of the N-type buried layer to the floating diffusion region; meanwhile, the channel region gradient doping is carried out on the channel region of the annular transmission transistor, so that the quantity of rebound charges in the channel region is reduced, the photo-generated charge transfer efficiency is effectively improved, and the method can be used for nanosecond-level high-time-resolution imaging.
The above embodiments are provided to further explain the objects, technical solutions and advantages of the present invention in detail, and it should be understood that the above embodiments are only examples of the present invention and are not intended to limit the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A pixel device, comprising:
a substrate;
the photodiode is formed on the substrate and comprises a P-type epitaxial layer, an N-type buried layer and a surface P + layer, wherein the N-type buried layer and the surface P + layer are formed in the P-type epitaxial layer;
the N-type buried layer comprises a first ion implantation region and a second ion implantation region, wherein the first ion implantation region is at least partially formed on the second ion implantation region, and the first ion implantation region comprises a central region and a plurality of pointed regions positioned at the outer edge of the central region;
the floating diffusion region is formed in the region of the P-type epitaxial layer except the surface P + layer;
a ring-shaped transfer transistor gate at least partially formed on an upper surface of the photodiode, and the ring-shaped transfer transistor gate surrounding the floating diffusion region.
2. The pixel device of claim 1,
the shape of the central region comprises a circle or a rectangle;
the shape of the pointed region comprises a triangle.
3. A pixel device as claimed in claim 1,
the floating diffusion region is located at a geometric center of the pixel device.
4. The pixel device of claim 1, further comprising:
and the channel region is positioned below the grid electrode of the annular transmission transistor, and the channel region and the surface P + layer have a first overlapping region so as to form gradient doping.
5. A pixel device according to claim 4,
the channel region and the first ion implantation region are provided with a second overlapping region;
wherein a length of the first overlapping area is greater than a length of the second overlapping area.
6. The pixel device of claim 4, further comprising:
the anti-punch-through area is formed in an area, except the surface P + layer and the floating diffusion area, of the P type epitaxial layer and is positioned between the N type buried layer and the floating diffusion area;
the penetration-preventing region is at least partially overlapped with the surface P + layer;
the anti-punch-through region at least partially overlaps the floating diffusion region;
the anti-punch-through region at least partially overlaps the channel region.
7. The pixel device according to claim 6, further comprising:
the threshold adjusting region is positioned below the gate of the annular transmission transistor, and the length of the threshold adjusting region is greater than that of the gate of the transmission transistor;
the threshold adjustment region at least partially overlaps the surface P + layer;
the threshold adjustment region at least partially overlaps the channel region;
the threshold adjustment region at least partially overlaps the anti-punch-through region;
the threshold adjustment region at least partially overlaps the floating diffusion region.
8. The pixel device of claim 1,
the first ion implantation area comprises P-type doped ions implanted in an ion implantation mode;
wherein the P-type dopant ions comprise phosphorous ions;
the implantation energy of the phosphorus ions implanted by the ion implantation mode comprises 30KeV-60 KeV;
of said phosphorus ions implanted by means of ion implantationThe implantation dose comprises 1.0e 12 /cm 2 -2.5e 12 /cm 2 。
9. A pixel device according to claim 1,
the second ion implantation area comprises P-type doped ions implanted in an ion implantation mode;
wherein the P-type dopant ions comprise phosphorous ions;
the implantation energy of the phosphorus ions implanted by the ion implantation mode comprises 50KeV-90 KeV;
the implantation dose of phosphorus ions implanted by ion implantation includes 0.5e 12 /cm 2 -1.5e 12 /cm 2 。
10. The pixel device of claim 1,
the shape of the second ion implantation region comprises a circle or a square.
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