CN109119458B - Isolation structure and process method - Google Patents
Isolation structure and process method Download PDFInfo
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- CN109119458B CN109119458B CN201810832763.0A CN201810832763A CN109119458B CN 109119458 B CN109119458 B CN 109119458B CN 201810832763 A CN201810832763 A CN 201810832763A CN 109119458 B CN109119458 B CN 109119458B
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- 238000002955 isolation Methods 0.000 title claims abstract description 38
- 238000000034 method Methods 0.000 title claims abstract description 29
- 238000002347 injection Methods 0.000 claims abstract description 22
- 239000007924 injection Substances 0.000 claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 17
- 230000015556 catabolic process Effects 0.000 claims abstract description 14
- 238000000407 epitaxy Methods 0.000 claims abstract description 11
- 238000009826 distribution Methods 0.000 claims abstract description 7
- 238000002513 implantation Methods 0.000 claims description 17
- 238000005468 ion implantation Methods 0.000 claims description 12
- 229920002120 photoresistant polymer Polymers 0.000 claims description 12
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 230000005684 electric field Effects 0.000 claims description 4
- 238000001259 photo etching Methods 0.000 claims description 3
- 230000005516 deep trap Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 238000004088 simulation Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
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Abstract
The invention discloses an isolation structure, which is characterized in that a P-type epitaxy is arranged on a P-type substrate, and an annular N-type deep well and a P well positioned in an annular central region are formed in the P-type epitaxy; an epitaxial layer is arranged between the annular N-type deep well and the P well at intervals; an N-type buried layer is arranged below the annular N-type deep well, and a P-type buried layer is arranged below the P well; the N-type deep well also comprises an annular N well; the surface of the P type epitaxy is provided with a field oxide layer, and windows are formed in the field oxide layer and used for leading out the N well and the P well respectively; the substrate right below the P-type buried layer is also provided with an N-type injection region, and the P-type buried layer and the N-type injection region are not contacted with each other. The invention forms an N-type injection region under the P-type buried layer. The N-type doping changes the potential distribution below the P-type buried layer, and the width of a depletion region is widened, so that the breakdown voltage of the isolation structure is improved. The process method only adjusts the injection and does not need to add extra process steps.
Description
Technical Field
The invention relates to the field of semiconductor devices, in particular to an isolation structure and a process method of the isolation structure.
Background
A conventional isolation structure is shown in fig. 1. The voltage bias during isolation is: the left N-type heavily doped region 109 is connected to positive voltage (ground), the middle P-type heavily doped region 110 is connected to ground (ground), and the right N-type heavily doped region is connected to ground (positive voltage). I.e. both bias modes are possible.
Fig. 2 shows the distribution of the depletion region when the conventional isolation structure breaks down (the left N-type heavily doped region is connected with a positive voltage). It can be seen that the middle P-type buried layer 102 and P-type epitaxial layer 104 are laterally depleted by only half when breakdown occurs. That is, the withstand voltage of this structure is determined only by the left half (right half) of the entire isolation structure. The breakdown voltage is therefore equal to that of the PN junction formed by the buried N-type layer 103 and the intermediate buried P-type layer 104 and the buried P-type layer 102.
The width of the depletion region is widened, so that the middle P-type buried layer 102 and the middle P-type epitaxial layer 104 are fully depleted in the transverse direction, the breakdown voltage of isolation is improved, the area occupied by isolation is reduced, and the manufacturing cost is reduced.
Disclosure of Invention
The invention aims to provide an isolation structure, which can improve the breakdown voltage of the isolation structure.
Another technical problem to be solved by the present invention is to provide a process for the isolation structure, which is simple and can control the manufacturing cost.
In order to solve the above problems, the isolation structure of the present invention has a P-type epitaxy on a P-type substrate, in which an annular N-type deep well and a P-well located in an annular central region are formed; the epitaxial layer is arranged between the annular N-type deep well and the P well.
An N-type buried layer is arranged below the annular N-type deep well, and a P-type buried layer is arranged below the P-well.
The annular N-type deep well also comprises an annular N well.
The surface of the P type epitaxy is provided with a field oxide layer, and windows are formed in the field oxide layer and respectively lead out the N well and the P well.
The substrate right below the P-type buried layer is also provided with an N-type injection region, and the P-type buried layer and the N-type injection region are not contacted with each other.
Furthermore, the N-type implantation region is high-energy N-type ion implantation with implantation energy of 500-2000 keV and implantation dosage of 1E 11-5E 13cm-2。
Furthermore, the N-type injection region regulates the potential distribution of an electric field below the P-type buried layer, the width of the depletion region is widened, namely the N-type injection region can assist the P-type buried layer to be depleted with the P-type epitaxial layer, and the breakdown voltage of the isolation structure is improved.
The process method of the isolation structure comprises the steps of firstly carrying out high-energy N-type ion implantation once when selectively implanting a P-type buried layer on a P-type substrate by utilizing photoresist to form an N-type implantation area in the substrate; and then carrying out ion implantation on the P-type buried layer, namely forming the P-type buried layer and forming the N-type implanted region by using the same photoetching mask.
Furthermore, the high-energy N-type ion implantation has implantation energy of 500-2000 keV and implantation dosage of 1E 11-5E 13cm-2。
Further, the thickness of the photoresist used for the high-energy N-type ion implantation is greater than the thickness of the photoresist used in the process of manufacturing only the P-type buried layer.
According to the isolation structure, the N-type injection region is formed under the P-type buried layer. The N-type doping changes the potential distribution below the P-type buried layer, and the width of a depletion region is widened. Namely, the N-type injection region can help the middle P-type buried layer and the P-type epitaxial layer to be depleted in the transverse direction, so that the breakdown voltage of the isolation structure is improved. The breakdown voltage reaches a maximum when the N-type doping causes the middle P-type epitaxial layer and the P-type buried layer to be fully depleted laterally. The process method only adjusts the injection without adding extra process steps, thereby being beneficial to reducing the manufacturing cost.
Drawings
Fig. 1 is a schematic view of a conventional isolation structure.
Fig. 2 is a diagram of an electric field simulation of a conventional isolation structure, showing that only half of the depletion region is used.
Fig. 3 is a schematic view of an isolation structure of the present invention.
Fig. 4 is a schematic process diagram of the isolation structure of the present invention, in which an N-type buried layer is formed.
Fig. 5 is a schematic process flow diagram of the isolation structure of the present invention, wherein an N-type implant region and a P-type buried layer are formed.
Fig. 6 is a graph comparing the breakdown voltage simulation of the present invention and a conventional isolation structure.
FIG. 7 is a graph comparing the simulation of the electric field distribution of the present invention and a conventional isolation structure.
Description of the reference numerals
101-P type substrate, 102-P type buried layer, 103-N type buried layer, 104-P type epitaxial layer, 105-P well, 106-N type deep well, 107-N well, 108-field oxide region, 109-N type heavily doped region, 110-P type heavily doped region, 111-high energy N type injection region, and 112-photoresist.
Detailed Description
As shown in fig. 3, the isolation structure of the present invention has a P-type epitaxy on a P-type substrate, and in the P-type epitaxy, an annular N-type deep well and a P-type well located in an annular central region are formed; the epitaxial layer is arranged between the annular N-type deep well and the P well.
An N-type buried layer is arranged below the annular N-type deep well, and a P-type buried layer is arranged below the P-well. The annular N-type deep well also comprises an annular N well. The surface of the P type epitaxy is provided with a field oxide layer, and windows are formed in the field oxide layer and respectively lead out the N well and the P well. The substrate right below the P-type buried layer is also provided with an N-type injection region, and the P-type buried layer and the N-type injection region are not contacted with each other.
When the P-type buried layer is selectively implanted on the P-type substrate by photoresist, a high-energy N-type doping implantation is added, namely an N-type implantation region 111 is formed right below the P-type buried layer. The N-type doping 111 changes the potential distribution below the P-type buried layer, and widens the width of the depletion region. As shown in fig. 7, 111 can help the middle P-type buried layer and the P-type epitaxial layer to be depleted, thereby improving the breakdown voltage of the isolation structure. The breakdown voltage reaches a maximum when the N-type doping 111 causes the middle P-type epitaxial layer and the P-type buried layer to be fully depleted. The method widens the width of the depletion region, so that the middle P-type buried layer and the middle P-type epitaxial layer are completely depleted in the transverse direction, and the breakdown voltage of the isolation is favorably improved, and as shown in fig. 6, compared with the traditional isolation structure, the breakdown voltage can be improved by about 20V. The area occupied by isolation is reduced, and the manufacturing cost is reduced.
In the process of the isolation structure according to the present invention, as shown in fig. 4, an N-type buried layer 103 is formed on a P-type substrate by implantation. Then, opening an implantation window of the P-type buried layer by using the photoresist 112, and selectively implanting the P-type buried layer on the P-type substrate, firstly, performing one-time implantation with an energy of 500-2000 keV and an implantation dose of 1E 11-5E 13cm-2The high energy N-type ion implantation of (2) forms an N-type implanted region in the substrate, as shown in fig. 5. Due to the high-energy N-type ion implantation, the thickness of the adopted photoresist is thicker than that of the photoresist in the traditional process of only manufacturing the P-type buried layer.
And then carrying out ion implantation on the P-type buried layer, namely forming the P-type buried layer and forming the N-type implanted region by using the same photoetching mask.
And removing the photoresist, depositing an epitaxial layer to form a P-type epitaxial layer, forming STI field oxygen, selectively injecting to form an N-type deep well 106, a P-type well 105, an N-type well 107, an N-type heavily doped region 109 and a P-type heavily doped region 110, and leading out the regions 109 and 110 through a back-end process to form the structure shown in FIG. 3.
The method only adjusts the injection without adding extra process steps, thereby being beneficial to reducing the manufacturing cost.
The above are merely preferred embodiments of the present invention, and are not intended to limit the present invention. Various modifications and alterations to this invention will become apparent to those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (6)
1. An isolation structure is provided with a P-type epitaxy on a P-type substrate, wherein an annular N-type deep well and a P well positioned in an annular central region are formed in the P-type epitaxy; an epitaxial layer is arranged between the annular N-type deep well and the P well at intervals;
an N-type buried layer is arranged below the annular N-type deep well, and a P-type buried layer is arranged below the P well;
the annular N-type deep trap also comprises an annular N trap;
the surface of the P type epitaxy is provided with a field oxide layer, and windows are formed in the field oxide layer and used for leading out the N well and the P well respectively;
the method is characterized in that: the substrate right below the P-type buried layer is also provided with an N-type injection region, and the P-type buried layer and the N-type injection region have the same size in the transverse direction; the P-type buried layer and the N-type injection region are not contacted with each other.
2. The isolation structure of claim 1, wherein: the N-type implantation region is high-energy N-type ion implantation, the implantation energy is 500-2000 keV, and the implantation dosage is 1E 11-5E 13cm-2。
3. The isolation structure of claim 1, wherein: the N-type injection region regulates the potential distribution of an electric field below the P-type buried layer, the width of the depletion region is widened, namely the N-type injection region can assist the P-type buried layer to be depleted with the P-type epitaxial layer, and the breakdown voltage of the isolation structure is improved.
4. Process for manufacturing an isolation structure as claimed in claim 1, characterized in that: when selectively injecting a P-type buried layer on a P-type substrate by utilizing photoresist, firstly, carrying out high-energy N-type ion injection once to form an N-type injection region in the substrate; and then carrying out ion implantation on the P-type buried layer, namely forming the P-type buried layer and forming the N-type implanted region by using the same photoetching mask.
5. The method of claim 4, wherein: the high-energy N-type ion implantation has implantation energy of 500-2000 keV and implantation dosage of 1E 11-5E 13cm-2。
6. The method of claim 4, wherein: the thickness of the photoresist used for the high-energy N-type ion implantation is larger than that of the photoresist used in the process of only manufacturing the P-type buried layer.
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| CN201810832763.0A CN109119458B (en) | 2018-07-26 | 2018-07-26 | Isolation structure and process method |
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| CN110993710B (en) * | 2019-12-30 | 2021-11-02 | 上海集成电路研发中心有限公司 | Single-photon avalanche diode and preparation method thereof |
| CN113113471B (en) * | 2021-03-12 | 2022-06-03 | 华虹半导体(无锡)有限公司 | Method for manufacturing isolation structure |
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| US7781859B2 (en) * | 2008-03-24 | 2010-08-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Schottky diode structures having deep wells for improving breakdown voltages |
| CN103606548B (en) * | 2013-12-09 | 2016-07-20 | 江南大学 | A kind of high-voltage ESD protective device of little time stagnant SCR structure of Zener breakdown |
| CN204088324U (en) * | 2014-07-29 | 2015-01-07 | 无锡芯朋微电子股份有限公司 | A kind of isolation structure of high-voltage driving circuit |
| US9508813B1 (en) * | 2015-05-07 | 2016-11-29 | United Microelectronics Corporation | High-side field effect transistor |
| US10439024B2 (en) * | 2016-06-13 | 2019-10-08 | Texas Instruments Incorporated | Integrated circuit with triple guard wall pocket isolation |
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