CN113066779A - Double-power-supply power supply module of packaged chip and packaged chip - Google Patents
Double-power-supply power supply module of packaged chip and packaged chip Download PDFInfo
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- CN113066779A CN113066779A CN202110201938.XA CN202110201938A CN113066779A CN 113066779 A CN113066779 A CN 113066779A CN 202110201938 A CN202110201938 A CN 202110201938A CN 113066779 A CN113066779 A CN 113066779A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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Abstract
The invention discloses a dual-power supply module of a packaged chip and the packaged chip. The dual-power supply module comprises a power strip line and one or more dual-power supply units; wherein, dual power supply unit includes two power pin and a power supply connector, the power strip line includes many horizontal first power strip lines, be in the same place through many horizontal first power strip lines between two power pin, the power supply connector covers on two power pin, and cover one side of two power pin with two power pin metal connection. The packaged chip comprises a power ring, a unit to be powered and a dual-power supply module.
Description
Technical Field
The invention relates to the field of power supply of packaged chips, in particular to a dual-power-supply power supply module of a packaged chip and the packaged chip.
Background
The power supply planning is a very important step in the physical realization of the chip, and the aim of the power supply planning is to design a uniform network for the whole chip, so that electric energy sent from the outside can be transmitted to each unit in the chip, and the chip can work normally.
In recent years, with the continuous development of electronic manufacturing technology and chip process, the size of a chip is smaller and smaller, the scale of an integrated transistor is larger and larger, and power supply planning is more and more important, and how to improve the space utilization rate of power supply network design, improve the power supply capability and improve the stability of a power supply network becomes important for power supply planning. Among the existing chip packaging technologies, wire bonding technology is commonly used for packaging chips. When the chip packaged by the technology is powered, each power supply input/output unit needs to be overlapped with a power supply connector in a matched size, current is sent to the power supply connectors from the outside of the chip through a packaged gold wire by a power supply, and the power supply connectors send the current to a power supply network formed by a power ring and a power strip line of the whole chip through a single power supply pin of the power supply input/output unit, so that the current is sent to each corner of the chip.
However, the above prior art has drawbacks that are difficult to avoid: the module has weak power supply capability, and because the width of a metal wire which can be connected with a single power supply pin is small, the resistance is large, the power supply network is easily influenced by voltage drop and electromigration, the stability of the power supply network is reduced, and certain negative influence is generated on the normal operation of a chip.
Therefore, a dual power supply module of a packaged chip and a packaged chip are urgently needed in the market at present to solve the problems that the power supply capability is weak and a power supply network is easily affected by voltage drop and electromigration in the prior art.
Disclosure of Invention
In view of the above technical problems, an object of the present invention is to provide a dual power supply module for packaging a chip, which can improve the power supply effect of each power supply unit without losing the space utilization of the chip, improve the voltage drop resistance and electromigration resistance of the whole power supply network, and solve the problems that the power supply capability is weak and the power supply network is easily affected by the voltage drop and electromigration in the prior art.
The invention provides a dual-power supply module for a packaged chip, which comprises a power strip line and one or more dual-power supply units; the dual-power supply unit comprises two power pins and a power supply connector, the power strip comprises a plurality of transverse first power strips, the two power pins are connected together through the transverse first power strips, and the power supply connector covers the two power pins and is in metal connection with the two power pins on one side covering the two power pins.
In one embodiment, the power strip further comprises a plurality of longitudinal second power strips, the dual power supply module is composed of a transistor layer and eight metal layers, the first, third, fifth and seventh metal layers of the eight metal layers comprise a plurality of transverse first power strips, and the second, fourth, sixth and eighth metal layers of the eight metal layers comprise a plurality of longitudinal second power strips.
The invention also provides a packaged chip which comprises a power ring, a plurality of units to be powered and the dual-power-supply module of the packaged chip, wherein the dual-power-supply module is connected with the power ring through a plurality of longitudinal second power supply lines and is connected to the plurality of units to be powered through the power ring.
In one embodiment, the power ring is disposed around the packaged chip and connected to a plurality of units to be powered in the packaged chip through a plurality of transverse first power supply lines and a plurality of longitudinal second power supply lines.
In one embodiment, the dual power supply module is connected to the power ring through a plurality of longitudinal second power supply lines, specifically: each of the two power pins is connected to the power ring by a plurality of longitudinal second power supply lines.
Compared with the prior art, the embodiment of the invention has the following beneficial effects:
the invention provides a dual-power supply module of a packaged chip and the packaged chip, wherein a dual-power supply unit with a power supply connector covering two power supply pins is arranged in the module and the packaged chip, and the dual-power supply module and the packaged chip of the packaged chip not only double the power supply capacity, but also enhance the stability of a power supply network on the basis of improving the space utilization rate.
Drawings
The invention will be further described with reference to the accompanying drawings, in which:
FIG. 1 shows a block diagram of one embodiment of a dual power supply unit of a dual power supply module of a packaged chip according to the present invention;
fig. 2 shows a block diagram of one embodiment of a packaged chip in accordance with the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Detailed description of the preferred embodiment
The invention provides a dual-power supply module 11 of a packaged chip 1, the dual-power supply module 1 is realized based on SMIC 40nm 1p8m technology (composed of a transistor layer and eight metal layers), the dual-power supply module 1 comprises a power strip and one or more dual-power supply units 111, wherein the power strip lines comprise a plurality of transverse first power strip lines and a plurality of longitudinal second power strip lines, the first power strip lines and the second power strip lines are distributed in the dual power supply module 1 in a criss-cross way, the first, third, fifth and seventh metal layers of the eight metal layers comprise a plurality of transverse first power supply lines, the second, fourth, sixth and eighth metal layers of the eight metal layers include a plurality of longitudinal second power supply lines, and the design that the transverse first power supply lines and the longitudinal second power supply lines are distributed in a staggered manner enables the power supply lines included in adjacent layers not to interfere with each other.
Fig. 1 shows a block diagram of one embodiment of a dual power supply unit 111 of a dual power supply module 1 of a packaged chip according to the present invention. The dual power supply unit 111 includes two power pins 1111, 1112 and a power connector 1113. Connect together through many horizontal first power supply lines between supply pin 1111 and the supply pin 1112 in order to form the power network of closed loop, and supply network evenly distributed electric current shortens the current return circuit, when effectively reducing the voltage drop, can avoid because hot spot phenomenon and the electromigration problem that cause when current distribution is uneven, and power supply connector 1113 covers on two supply pin 1111, 1112, and covering one side of two supply pin 1111, 1112 through the multilayer metal layer of dual power supply module with two supply pin 1111, 1112 metallic connections.
Current flows into the plurality of longitudinal second power supply lines through the dual power supply unit 111, thereby delivering current to each corner in the power network. Since the amount of current to be transmitted depends on the transmission cross section while the height of the second power strip is fixed, when the dual power supply unit 111 is employed in the dual power supply module 11, the number of the second power strips for transmitting current is doubled in the same number of power supply units planned within the packaged chip, thereby doubling the width of the transmission cross section, i.e., doubling the transmission cross section, thereby doubling the amount of transmitted current.
Due to the modules, under the condition of the same number of power supply units, the power supply output of the dual-power supply unit 111 is doubled compared with the power supply output of the power supply unit in the prior art, wherein one power supply connector covers one power supply pin; meanwhile, because a certain distance is required to be kept between the power supply connectors when power supply planning is carried out, on the premise of the same chip area, the packaged chip dual-power supply module 11 with the dual-power supply unit 111 is compared with a traditional single-power supply module, so that the space utilization rate of a packaged chip is improved, and better voltage drop resistance and electromigration resistance are also achieved, and the stability of a power supply network is improved.
Detailed description of the invention
Fig. 2 shows a block diagram of one embodiment of a packaged chip 1 according to the present invention, as shown, the packaged chip 1 comprises one or more dual power supply modules 11 of the packaged chip 1 as described above, a power ring 12 and one or more units to be powered 13, wherein, each of the two power pins 1111 and 1112 in the dual power supply module 11 is connected to the power ring 12 through a power strip, the power ring 12 is disposed around the chip and connected to the unit to be powered 13 in the packaged chip 1 through the power strip, the power ring 12 surrounding the packaged chip 1, the dual power supply module 11 and the power strips staggered horizontally and longitudinally form a power network inside the packaged chip 1, the power network distributes current evenly, shortens the current loop, and while effectively reducing the voltage drop, can avoid because the hot spot phenomenon and the electromigration problem that cause when the current distributes unevenly.
In the power supply process, the current flows into the power supply connector 1113 from the outside of the packaged chip 1 through the packaged gold wire, and since the power supply connector 1113 is connected to the two power pins at the side covering the two power pins, the current flows into the two power pins, and then the current flows into the power ring 12 surrounding the packaged chip 1 through the plurality of longitudinal second power supply wires via the two power pins 1111 and 1112 of the internal closed loop in the dual power supply module 11, and finally is transmitted to each unit to be powered 13 through the plurality of first and second power supply wires which are criss-cross.
Due to the modules, under the condition of the same number of power supply units, the power supply output of the dual-power supply unit 111 is doubled compared with the power supply output of the power supply unit in the prior art, wherein each power supply connector covers one power supply pin; meanwhile, because a certain distance is required to be kept between the power supply connectors when power supply planning is carried out, on the premise of the same chip area, the packaged chip dual-power supply module 11 with the dual-power supply unit 111 is compared with a traditional single-power supply module, so that the space utilization rate of a packaged chip is improved, and better voltage drop resistance and electromigration resistance are also achieved, and the stability of a power supply network is improved.
The above-mentioned embodiments are provided to further explain the objects, technical solutions and advantages of the present invention in detail, and it should be understood that the above-mentioned embodiments are only examples of the present invention and are not intended to limit the scope of the present invention. It should be understood that any modifications, equivalents, improvements and the like, which come within the spirit and principle of the invention, may occur to those skilled in the art and are intended to be included within the scope of the invention.
Claims (5)
1. A dual-power supply module for packaging a chip is characterized by comprising a power strip line and one or more dual-power supply units; wherein, dual power supply unit includes two power pin and a power supply connector, the power strip line includes many horizontal first power strip lines, be in the same place through many horizontal first power strip lines between two power pin, the power supply connector covers on two power pin, and cover one side of two power pin with two power pin metal connection.
2. The packaged chip dual power supply module according to claim 1, wherein the power lines further comprise a plurality of longitudinal second power lines, the dual power supply module is composed of a transistor layer and eight metal layers, the first, third, fifth and seventh metal layers of the eight metal layers comprise a plurality of transverse first power lines, and the second, fourth, sixth and eighth metal layers of the eight metal layers comprise a plurality of longitudinal second power lines.
3. A packaged chip comprising a power ring, a plurality of units to be powered, and the dual power supply module of the packaged chip of claim 1 or 2, wherein the dual power supply module is connected to the power ring via a plurality of second longitudinal power lines and to the plurality of units to be powered via the power ring.
4. The packaged chip of claim 3, wherein the power ring is disposed around the packaged chip and connected to the plurality of units to be powered in the packaged chip through a plurality of transverse first power supply lines and a plurality of longitudinal second power supply lines.
5. The packaged chip of claim 4, wherein the dual power supply module is connected to the power ring via a plurality of longitudinal second power supply lines, specifically:
each of the two power pins is connected to the power ring by a plurality of longitudinal second power supply lines.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202110201938.XA CN113066779B (en) | 2021-02-23 | 2021-02-23 | Double-power-supply power supply module of packaged chip and packaged chip |
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| CN202110201938.XA CN113066779B (en) | 2021-02-23 | 2021-02-23 | Double-power-supply power supply module of packaged chip and packaged chip |
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| CN113066779A true CN113066779A (en) | 2021-07-02 |
| CN113066779B CN113066779B (en) | 2023-01-13 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024026964A1 (en) * | 2022-08-04 | 2024-02-08 | 长鑫存储技术有限公司 | Power source providing circuit and memory |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101197363A (en) * | 2006-12-08 | 2008-06-11 | 硅谷数模半导体（北京）有限公司 | Double-joint grounding circuit and power supply circuit, and IC chip with the same |
| CN104794253A (en) * | 2014-01-17 | 2015-07-22 | 京微雅格（北京）科技有限公司 | Layout method and device capable of achieving clean supply for chip interior analog modules |
| US20160041592A1 (en) * | 2010-06-08 | 2016-02-11 | Quanta Computer Inc. | Server rack system |
| CN106502363A (en) * | 2016-10-25 | 2017-03-15 | 郑州云海信息技术有限公司 | A kind of electric power system of multi-node server system |
| CN106537311A (en) * | 2014-07-22 | 2017-03-22 | 辛纳普蒂克斯公司 | Routing for an integrated display and input sensing device |
| CN109831562A (en) * | 2019-03-28 | 2019-05-31 | Oppo广东移动通信有限公司 | A kind of mobile terminal and its master-slave communication mechanism |
| CN211018381U (en) * | 2019-12-27 | 2020-07-14 | 天津恒达文博科技股份有限公司 | Multi-power supply system for self-service equipment |
| CN211859070U (en) * | 2020-05-29 | 2020-11-03 | 中国石油集团东方地球物理勘探有限责任公司 | Power supply station and connector device thereof |
-
2021
- 2021-02-23 CN CN202110201938.XA patent/CN113066779B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101197363A (en) * | 2006-12-08 | 2008-06-11 | 硅谷数模半导体（北京）有限公司 | Double-joint grounding circuit and power supply circuit, and IC chip with the same |
| US20160041592A1 (en) * | 2010-06-08 | 2016-02-11 | Quanta Computer Inc. | Server rack system |
| CN104794253A (en) * | 2014-01-17 | 2015-07-22 | 京微雅格（北京）科技有限公司 | Layout method and device capable of achieving clean supply for chip interior analog modules |
| CN106537311A (en) * | 2014-07-22 | 2017-03-22 | 辛纳普蒂克斯公司 | Routing for an integrated display and input sensing device |
| CN106502363A (en) * | 2016-10-25 | 2017-03-15 | 郑州云海信息技术有限公司 | A kind of electric power system of multi-node server system |
| CN109831562A (en) * | 2019-03-28 | 2019-05-31 | Oppo广东移动通信有限公司 | A kind of mobile terminal and its master-slave communication mechanism |
| CN211018381U (en) * | 2019-12-27 | 2020-07-14 | 天津恒达文博科技股份有限公司 | Multi-power supply system for self-service equipment |
| CN211859070U (en) * | 2020-05-29 | 2020-11-03 | 中国石油集团东方地球物理勘探有限责任公司 | Power supply station and connector device thereof |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024026964A1 (en) * | 2022-08-04 | 2024-02-08 | 长鑫存储技术有限公司 | Power source providing circuit and memory |
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| CN113066779B (en) | 2023-01-13 |
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