CN113039632B - Process optimization using experimental design and response surface models - Google Patents

Process optimization using experimental design and response surface models Download PDF

Info

Publication number
CN113039632B
CN113039632B CN201980073210.4A CN201980073210A CN113039632B CN 113039632 B CN113039632 B CN 113039632B CN 201980073210 A CN201980073210 A CN 201980073210A CN 113039632 B CN113039632 B CN 113039632B
Authority
CN
China
Prior art keywords
candidates
processor
metrology tool
metrology
tool
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201980073210.4A
Other languages
Chinese (zh)
Other versions
CN113039632A (en
Inventor
S·比蒂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KLA Corp
Original Assignee
KLA Tencor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US16/594,845 external-priority patent/US11062928B2/en
Application filed by KLA Tencor Corp filed Critical KLA Tencor Corp
Publication of CN113039632A publication Critical patent/CN113039632A/en
Application granted granted Critical
Publication of CN113039632B publication Critical patent/CN113039632B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/24Optical enhancement of defects or not directly visible states, e.g. selective electrolytic deposition, bubbles in liquids, light emission, colour change
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/30Nc systems
    • G05B2219/45Nc applications
    • G05B2219/45031Manufacturing semiconductor wafers

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Automation & Control Theory (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Length Measuring Devices By Optical Means (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)

Abstract

Using measurements from a metrology tool, a combination of tool settings on the metrology tool can be determined. Candidates may then be determined, and a response surface model may be generated for each of the candidates. The list of candidates for the tool set that provide the largest response and are least sensitive to noise sources may then be determined from the response surface model. The list of the candidates may each be from a denser region of the response surface model.

Description

Process optimization using experimental design and response surface models
Technical Field
The present invention relates to process optimization, and more particularly, to process optimization for semiconductor manufacturing.
Background
The evolution of the semiconductor manufacturing industry places higher demands on yield management and, in particular, metrology and inspection systems. The critical dimensions continue to shrink, but there is a need in the industry to reduce the time for achieving high yield, high value products. Minimizing the total time from detecting the yield problem to solving the problem determines the return on investment for the semiconductor manufacturer.
Fabricating semiconductor devices, such as logic and memory devices, typically includes processing a semiconductor wafer using a number of fabrication processes to form various features and multiple levels of semiconductor devices. For example, photolithography is a semiconductor fabrication process that involves transferring a pattern from a reticle to a photoresist disposed on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, Chemical Mechanical Polishing (CMP), etching, deposition, and ion implantation. Multiple semiconductor devices may be fabricated in an arrangement on a single semiconductor wafer, separated into individual semiconductor devices.
Inspection processes are used at various steps during semiconductor manufacturing to detect defects on wafers to facilitate higher yield and therefore higher profit in the manufacturing process. Inspection is always an important part of the fabrication of semiconductor devices such as Integrated Circuits (ICs). However, as the size of semiconductor devices decreases, inspection becomes even more important for successful fabrication of acceptable semiconductor devices because smaller defects may cause the devices to fail. For example, as the size of semiconductor devices decreases, detection of defects of decreasing size becomes necessary because even relatively small defects can cause undesirable aberrations in the semiconductor devices.
Metrology processes are also used at various steps during semiconductor manufacturing to monitor and control the process. The metering process and the inspection process are different in that: unlike inspection processes in which defects are detected on a wafer, metrology processes are used to measure one or more characteristics of a wafer that cannot be determined using existing inspection tools. Metrology processes may be used to measure one or more characteristics of a wafer such that the performance of the process may be determined from the one or more characteristics. For example, a metrology process may measure dimensions (e.g., line width, thickness, etc.) of features formed on a wafer during the process. Additionally, if one or more characteristics of the wafer are unacceptable (e.g., outside of a predetermined range of characteristics), the measurement of the one or more characteristics of the wafer may be used to alter one or more parameters of the process such that additional wafers manufactured by the process have acceptable characteristics.
Semiconductor manufacturers use sophisticated process optimization efforts to meet the increasing demand for tighter tolerances. For example, inspection and metrology systems or operations may be optimized. Semiconductor manufacturers typically search for an optimal set of equipment conditions that provide accurate measurements, and remain robust to uncontrollable or unknown sources of variability. Many semiconductor manufacturers seek low time results with high accuracy.
Many metrology and inspection tools have a number of adjustable settings that need to be optimized in order to get the best performance from the tool. This presents challenges in setting up metrology or inspection tools because of the large parameter space that must be investigated. In addition, if the films and structures on the incoming wafer drift over time, the optimal cause settings may drift and need to be re-optimized.
Previously, a "brute force approach" has resulted in every tool setting being varied within its usable range. Each arrangement was tested for a discrete setup (e.g., unpolarized, s-polarized, or p-polarized illumination). For continuous settings (e.g., focus position), the entire usable range can be discretized by selecting the step size. The total number of experiments required can be unreasonably large. In addition, current brute force methods cannot account for inherent process variability.
Therefore, new process optimization techniques and systems are needed.
Disclosure of Invention
In a first embodiment, a metrology tool is provided. The metrology tool comprises: an energy source that generates a beam; a stage that secures a wafer in a path of the beam from the energy source; a detector; and a processor in electronic communication with the detector. The processor is configured to: receiving a plurality of measurements; determining a plurality of combinations of tool settings on the metrology tool using analysis of variance (ANOVA); determining candidates from the plurality of combinations; generating a response surface model for each of the candidates; and determining the list of candidates for the tool set that provides the largest response and that is least sensitive to noise sources. Each of the candidates on the list of candidates is each from a denser region of the response surface model.
The processor may be further configured to send instructions to perform the measurement on a semiconductor wafer using the metrology tool. The measurements can be collected using a mixed effects model.
The tunable settings on the metrology tool may be independent variables.
The list of candidates may provide improved performance of the metrology tool relative to the remainder of the candidates.
The processor may be further configured to determine a score based on the quality of the measurement.
The response surface model may be a 3 x 3 response surface model.
The processor may be further configured to adjust one or more settings on the metrology tool based on the list of candidates.
In a second embodiment, a method is provided. The method includes receiving, at a processor, a plurality of measurements from a metrology tool. Using the processor, a plurality of combinations of tool settings on the metrology tool are determined using ANOVA. Determining, using a processor, candidates from the plurality of combinations. Generating, using the processor, a response surface model for each of the candidates. Determining, using the processor, the list of candidates for the tool setting that provide the greatest response and are least sensitive to noise sources. Each of the candidates on the list of candidates is each from a denser region of the response surface model.
The method may further include performing the measurement on a semiconductor wafer using the metrology tool. The measurements can be collected using a mixed effects model.
The tunable settings on the metrology tool may be independent variables.
The list of candidates may provide improved performance of the metrology tool relative to the remainder of the candidates.
The method may further include determining a score based on the quality of the measurement.
The response surface model may be a 3 x 3 response surface model.
The method may further comprise: using the processor, adjusting one or more settings on the metrology tool using the list of candidates.
A non-transitory computer readable medium storing a program may be configured to instruct a processor to perform the method of the second embodiment.
Drawings
For a fuller understanding of the nature and objects of the present invention, reference should be made to the following detailed description taken in conjunction with the accompanying drawings in which:
FIG. 1 is a flow chart of an embodiment of a method according to the present invention;
FIG. 2 is a block diagram of an embodiment of a metering system according to the present invention;
FIG. 3 is an exemplary 41 × 32 response surface;
FIG. 4 is an exemplary 9 × 9 response surface;
FIG. 5 is a table of exemplary class III fixation effect tests;
6A-6B illustrate 4-way interactions;
7A-7C illustrate exemplary response surfaces of top factor candidates; and is
FIG. 8 illustrates exemplary results.
Detailed Description
Although claimed subject matter will be described in terms of some embodiments, other embodiments including embodiments that do not provide all of the advantages and features set forth herein are also within the scope of the disclosure. Various structural, logical, process step, and electrical changes may be made without departing from the scope of the present invention. The scope of the invention is, therefore, defined only by reference to the appended claims.
A process optimization technique for a metrology system is disclosed. This technique is accurate, verifiable, and results in cost reduction (i.e., time results). To implement this technique, a design of experiments (DOE) is constructed to compare the differences and determine candidate regions of interest from the total response surface, where a set of optical responses can be optimized. When the candidate set condition has been identified, the response surface method is utilized to interpolate the optimal and stable response points for the verification phase. The verification stage may use dense wafer sampling, and the success criterion may be based on satisfying a target residual | m | +3 σ of, for example, less than 4 nm. In one example, the target success criteria is achieved while reducing the time results by more than 93%.
As the fine tunability of new metrology tools increases, complex process optimization efforts may be required to meet the increasing demands for tighter tolerances. The metrology tool should perform accurate measurements consistently and under adverse process conditions. An optimal set of plant conditions is required that will be robust to uncontrollable or unknown sources of variability. The techniques disclosed herein may provide for such equipment conditions. These techniques are also robust to different semiconductor manufacturers, each of which has its own particular requirements. These techniques also address the multi-response problem, where the result contains several responses designed to evaluate the ability of the metrology tool to measure accurately and consistently.
Fig. 1 is a flow chart of a method 100. Some of all of the steps in the method 100 may be performed using a processor. The mixed effects model can be used to determine what combination of equipment settings will be robust to process variations. The modeling results may provide information that provides confidence in future measurements. Each measurement may be different, but for example, when measuring a new wafer using those conditions, a model may be determined that provides us with less than 1% chance of incorrectness. The experiment can be constructed to ensure that all tool settings are evaluated independently. Additionally, tool settings may be included as fixed effects, and noise sources may be included as random effects. Thus, this may be a hybrid model. Where known but uncontrollable sources of variation are included in the model, the effects from the random factors may be blocked and the metrology tool settings may be evaluated independent of noise.
At 101, measurements are performed on a semiconductor wafer using a metrology tool. This step 101 may be performed independently of the other steps. Thus, the results may be sent to a processor from a stand-alone metrology tool or may be sent to a processor of a metrology tool. The measurements can be collected using a mixed effects model. A suitable design of experiment (DOE) can be selected so that the maximum information can be extracted with a reasonable number of experiments (i.e., measurements). Exemplary DOE types include split zone designs, orthogonal inner/outer arrays, or fractional factorial. Other DOE types may be used.
While reference is made to a metrology tool, an inspection tool or other type of tool may be used. The method 100 may operate on any device having any combination of discrete and/or continuous variable settings.
At 102, measurements from a metrology tool are received at a processor. At 103, a combination of tool settings on the metrology tool is determined using analysis of variance (ANOVA). The tool settings may include a marker design, an aperture setting, a polarization setting, an illumination bandwidth, a wavelength, a focus, or other tool settings. ANOVA can be used as a screening process so that non-significant parameters can be ignored. This leads to smaller problems to be solved. Other techniques besides ANOVA may also be used at step 103.
At 104, candidates from the combination are determined. ANOVA can determine the most robust classification setting before measuring combinations of continuous variables. Without continuous variables, ANOVA can determine the optimal placement per semiconductor layer. Each layer may be unique and may need to be individually set. ANOVA can provide a specific combination of settings and provide confidence in future measurements. After fitting the mixed effects model, statistical validity tests may be calculated for each main effect and each interaction effect. For statistically valid parameters, a top-level combination may be determined, such as at step 104.
At 105, a response surface model is generated for each of the candidates. In an example, the method 100 examines individual regional maxima in a large response surface and expands the DOE until curvature is detected in the response. This may provide a more accurate prediction. In a typical manufacturing process, a priori knowledge is required about which settings produce the desired results. However, the semiconductor industry may have chemical and optical considerations unique to each individual process step, and generally no a priori knowledge.
In an example, the response surface model may be a 3 × 3 response surface model. The tunable settings on the metrology tool may include wavelength or focus.
The response surface approach can be used to efficiently sample the response of the continuous independent variables with a small number of experimental tests, and then determine the best settings by fitting a simple smoothing function (e.g., a quadratic linear fit) to this experimental data set. This approach helps reduce the number of trials required. The response surface model may be based on a peak, which may be a region of interest. The peaks can be extracted from the transverse alignment method (landscape).
In an example, the response surface model may be generated from a nine-point DOE (e.g., a 3 × 3 response surface model). Nine points may encompass regions that do not have curvature in their lateral alignment. A nine-point DOE may also be designed to fit the quadratic model.
Regional optimization can be performed on statistically valid variables of the top variable using the initial data. The region of interest can be optimally located for this region. The response surface approach may be applied to the top candidate (secondary device settings) with the primary (tunable) setting as the independent variable. This may provide a set of predicted device settings that may or may not be actually measured. The method 100 may predict a set of optimal device settings.
The response surface model may determine: maximum interpolated response position, response surface shape, sensitivity to wavelength and focus changes, and/or a fitting diagnostic to determine the appropriateness of the model. A quadratic response surface model may be fit in the region. The response can be interpolated within the DOE space by running a Response Surface Method (RSM) model that provides fitting equations. The new response may be predicted to be within the error level. For example, a trusted candidate within a 5% error limit may be selected. The RSM modeling combines the following two models into one: quadratic fitting and regular modeling. Canonical modeling provides eigenvalues that determine the direction of maximum variability. For the quadratic model, two eigenvalues are obtained. If both eigenvalues are negative, then the maximum response region is found. If both eigenvalues are positive, then the smallest response zone is found. If the signs of the eigenvalues are mixed together, a saddle shape is found (response increases in one direction and decreases in a different direction). Sensitivity may be determined by fitting an equation, and the fitting equation may be used to model the predicted response change in one unit change of continuous variable. Fitting the diagnosis (p-value) may provide a confidence level that the quadratic model is in fact appropriate. If the fitting diagnosis is poor (e.g., p-value >0.05), then it may be determined that no particular model coefficients are needed. Fitting diagnostics can be used to test the curvature.
In an embodiment, the region of the response surface model that should focus attention is unknown. Since the response surface models may be different, the same area on each response surface model may not be monitored.
At 106, a list of candidates for tool settings that provide the greatest response and are least sensitive to noise sources is determined. This determination may be modeled using ANOVA and RSM as described herein. Each of the candidates on the list of candidates is from a denser region of the response surface model. In an example, the wavelength and the entire area of the focus from the minimum to the maximum in each variable are measured. SPOC allows interpolation and the number of points to be measured while still using the full range can be reduced by more than 75%. This may be considered a dense region, although other reductions are possible for dense regions.
The list of candidates may also provide improved performance of the metrology tool relative to the remainder of the candidates. In an example, either process variation (e.g., photoresist thickness) can shift the desired optimal wavelength. SPOC can provide a solution where 10nm wavelength changes do not alter the predicted response, or the effects of process changes are minimized.
Thus, an experimental design centered at the predicted equipment setup found in step 105 may be constructed. Denser areas may be explored around the selected candidates to determine the equipment settings that can deliver improved quality and are least sensitive to noise sources. Exploring around the selected candidate and determining device settings may be performed simultaneously. One or more of the device settings on the metrology tool (or other tool) may be changed based on the results of the method 100.
The design of the method 100 may use the full response space and detect the region of interest to run a conventional response surface model.
After determining the candidate that provides the greatest response, the metrology tool may be monitored and controlled over time. The metrology tool may drift over time or the thickness of the wafer may change, which will result in a change in the response surface model.
Equivalent experiments are never possible with the metrology tool. Embodiments of the method 100 provide a way to detect and adapt to changes. The mathematical model may be automatically modified as appropriate. The visual aids of the semiconductor manufacturer can also be adapted to each unique experiment.
In an example, a semiconductor manufacturer designs a target on a wafer. Depending on the physics, some combinations of settings may not be optimal for a particular target on the wafer.
One embodiment of a metering system in which the method 100 may be used is shown in the system 200 of FIG. 2. The system 200 includes an optics-based subsystem 201. In general, the optics-based subsystem 201 is configured for generating an optics-based output of the sample 202 by directing light to the sample 202 (or scanning light across the sample 202) and detecting the light from the sample 202. In one embodiment, sample 202 comprises a wafer. The wafer may comprise any wafer known in the art. In another embodiment, the sample includes a reticle. The mask may comprise any mask known in the art.
In the embodiment of system 200 shown in fig. 2, optics-based subsystem 201 includes an illumination subsystem configured to direct light to sample 202. The illumination subsystem includes at least one light source. For example, as shown in fig. 2, the illumination subsystem includes a light source 203. In one embodiment, the illumination subsystem is configured to direct light at one or more incident angles (which may include one or more tilt angles and/or one or more normal angles) to the sample 202. For example, as shown in fig. 2, light from light source 203 is directed through optical element 204 and then through lens 205 to sample 202 at an oblique angle of incidence. The oblique incidence angle may include any suitable oblique incidence angle, for example, the oblique incidence angle may vary depending on the characteristics of the sample 202.
The optics-based subsystem 201 may be configured to direct light to the sample 202 at different times and at different angles of incidence. For example, the optics-based subsystem 201 may be configured to alter one or more characteristics of one or more elements of the illumination subsystem such that light may be directed to the sample 202 at an angle of incidence that is different from the angle of incidence shown in fig. 2. In one such example, the optics-based subsystem 201 may be configured to move the light source 203, the optical element 204, and the lens 205 so that light is directed to the sample 202 at different incident angles or normal (or near normal) angles.
In some examples, the optics-based subsystem 201 may be configured to direct light to the sample 202 at more than one angle of incidence at the same time. For example, the illumination subsystem may include more than one illumination channel, one of which may include light source 203, optical element 204, and lens 205 shown in fig. 2, and another of which (not shown) may include similar elements that may be configured differently or the same, or may include at least one light source and possibly one or more other components (such as those described further herein). If such light is directed to the sample at the same time as other light, one or more characteristics (e.g., wavelength, polarization, etc.) of the light directed to the sample 202 at different angles of incidence may be different, such that the light resulting from illuminating the sample 202 at different angles of incidence may be distinguished from each other at the detector.
In another example, the illumination subsystem may include only one light source (e.g., light source 203 shown in fig. 2), and light from the light source may be separated into different optical paths (e.g., based on wavelength, polarization, etc.) by one or more optical elements (not shown) of the illumination subsystem. Light in each of the different optical paths may then be directed to the sample 202. The multiple illumination channels may be configured to direct light to the sample 202 at the same time or at different times (e.g., when different illumination channels are used to sequentially illuminate the sample). In another example, the same illumination channel may be configured to direct light to the sample 202 having different characteristics at different times. For example, in some examples, the optical element 204 may be configured as a spectral filter, and the properties of the spectral filter may be changed in various different ways (e.g., by exchanging spectral filters) so that different wavelengths of light may be directed to the sample 202 at different times. The illumination subsystem may have any other suitable configuration known in the art for directing light having different or the same characteristics to the sample 202 at different or the same incident angles, sequentially or simultaneously.
In one embodiment, light source 203 may comprise a broadband plasma (BBP) source. In this way, the light generated by the light source 203 and directed to the sample 202 may include broad band light. However, the light source may comprise any other suitable light source, such as a laser. The laser may comprise any suitable laser known in the art and may be configured to generate light at any one or more suitable wavelengths known in the art. In addition, the laser may be configured to produce monochromatic or near-monochromatic light. In this way, the laser may be a narrow band laser. Light source 203 may also comprise a polychromatic light source that produces light at a plurality of discrete wavelengths or wavelength bands.
Light may be focused from the optical element 204 onto the sample 202 by the lens 205. Although the lens 205 is shown in fig. 2 as a single refractive optical element, it should be understood that in practice the lens 205 may include several refractive and/or reflective optical elements that in combination focus light from the optical elements to the sample. The illumination subsystem shown in fig. 2 and described herein may include any other suitable optical elements (not shown). Examples of such optical elements include, but are not limited to, polarizing components, spectral filters, spatial filters, reflective optical elements, apodizers, beam splitters (e.g., beam splitter 213), apertures, and the like, which may include any such suitable optical elements known in the art. Additionally, the optics-based subsystem 201 may be configured to alter one or more of the elements of the illumination subsystem based on the type of illumination to be used to generate the optics-based output.
The optics-based subsystem 201 may also include a scanning subsystem configured to cause light to scan the sample 202. For example, optics-based subsystem 201 may include a stage 206 on which sample 202 is disposed during optics-based output generation. The scanning subsystem may include any suitable mechanical and/or robotic assembly (including stage 206) that may be configured to move sample 202 such that light may scan sample 202. Additionally or alternatively, the optics-based subsystem 201 may be configured such that one or more optical elements of the optics-based subsystem 201 perform some scanning of the sample 202 by the light. The light may scan the sample 202 in any suitable manner, such as in a serpentine path or in a spiral path.
The optics-based subsystem 201 further includes one or more detection channels. At least one of the one or more detection channels includes a detector configured to detect light from the sample 202 due to illumination of the sample 202 by the subsystem and to generate an output in response to the detected light. For example, the optics-based subsystem 201 shown in fig. 2 includes two detection channels, one formed by collector 207, element 208, and detector 209, and the other formed by collector 210, element 211, and detector 212. As shown in fig. 2, the two detection channels are configured to collect and detect light at different collection angles. In some examples, two detection channels are configured to detect scattered light, and the detection channels are configured to detect light scattered from the sample 202 at different angles. However, one or more of the detection channels may be configured to detect other types of light (e.g., reflected light) from the sample 202.
As further shown in fig. 2, the two detection channels are shown positioned in the plane of the paper, and the illumination subsystem is also shown positioned in the plane of the paper. Thus, in this embodiment, two detection channels are positioned (e.g., centered) in the plane of incidence. However, one or more of the detection channels may be positioned out of the plane of incidence. For example, the detection channel formed by collector 210, element 211, and detector 212 may be configured to collect and detect light scattered out of the plane of incidence. Thus, such detection channels may be generally referred to as "side" channels, and such side channels may be centered in a plane substantially perpendicular to the plane of incidence.
Although fig. 2 shows an embodiment of the optical-based subsystem 201 that includes two detection channels, the optical-based subsystem 201 may include a different number of detection channels (e.g., only one detection channel or two or more detection channels). In one such example, the detection channel formed by collector 210, element 211, and detector 212 may form one side channel as described above, and optics-based subsystem 201 may include additional detection channels (not shown) formed as another side channel positioned on an opposite side of the plane of incidence. Thus, the optics-based subsystem 201 may include a detection channel that includes a light collector 207, an element 208, and a detector 209, and is centered in the plane of incidence and configured to collect and detect light at scattering angles normal or near normal to the surface of the sample 202. Thus, this detection channel may be generally referred to as a "top" channel, and the optics-based subsystem 201 may also include two or more side channels configured as described above. As such, the optics-based subsystem 201 may include at least three channels (i.e., one top channel and two side channels), and each of the at least three channels has its own light collector, each of which is configured to collect light at a different scattering angle than the other light collectors.
As described further above, each of the detection channels included in the optics-based subsystem 201 may be configured to detect scattered light. Thus, the optics-based subsystem 201 shown in fig. 2 may be configured for dark-field (DF) output generation of the sample 202. However, the optics-based subsystem 201 may also or alternatively include a detection channel configured for Bright Field (BF) output generation of the sample 202. In other words, the optics-based subsystem 201 may include at least one detection channel configured to detect light specularly reflected from the sample 202. Thus, the optics-based subsystem 201 described herein may be configured for DF-only imaging, BF-only imaging, or both DF and BF imaging. Although each of the optical collectors is shown in fig. 2 as a single refractive optical element, it should be understood that each of the optical collectors may include one or more refractive optical dies and/or one or more reflective optical elements.
The one or more detection channels may include any suitable detector known in the art. For example, the detector may include a photomultiplier tube (PMT), a Charge Coupled Device (CCD), a Time Delay Integration (TDI) camera, and any other suitable detector known in the art. The detector may also comprise a non-imaging detector or an imaging detector. In this way, if the detectors are non-imaging detectors, each of the detectors may be configured to detect some characteristic (e.g., intensity) of the scattered light, but may not be configured to detect such characteristic as a function of position within the imaging plane. As such, the output produced by each of the detectors included in each of the detection channels of the optics-based subsystem may be a signal or data, but not an image signal or image data. In such examples, a processor (e.g., processor 214) may be configured to generate an image of sample 202 from the non-imaging output of the detector. However, in other examples, the detector may be configured as an imaging detector configured to generate an imaging signal or image data. Thus, the optics-based subsystem may be configured to generate an optical image or other optics-based output described in several ways herein.
Note that fig. 2 is provided herein to generally illustrate the configuration of an optical-based subsystem 201 that may be included in or may generate an optical-based output used by the system embodiments described herein. The optical-based subsystem 201 configurations described herein may be altered to optimize the performance of the optical-based subsystem 201, as is typically performed when designing commercial output acquisition systems. Additionally, the systems described herein may be implemented using existing systems (e.g., by adding the functionality described herein to an existing system). For some such systems, the methods described herein may be provided as optional functionality for the system (e.g., in addition to other functionality of the system). Alternatively, the system described herein may be designed as an entirely new system.
Processor 214 may be coupled to the components of system 200 in any suitable manner (e.g., by one or more transmission media, which may include wired and/or wireless transmission media) such that processor 214 may receive an output. The processor 214 may be configured to use the output to perform a number of functions. System 200 may receive instructions or other information from processor 214. Optionally, the processor 214 and/or the electronic data storage unit 215 may be in electronic communication with a wafer inspection tool, a wafer metrology tool, or a wafer re-inspection tool (not illustrated) to receive additional information or send instructions. For example, the processor 214 and/or the electronic data storage unit 215 may be in electronic communication with the SEM.
The processor 214, other systems, or other subsystems described herein may be part of various systems, including a personal computer system, graphics computer, mainframe computer system, workstation, network appliance, internet appliance, or other device. The subsystem or system may also include any suitable processor known in the art, such as a parallel processor. In addition, a subsystem or system may include a platform with high speed processing and software as a stand-alone tool or a network-connected tool.
The processor 214 and electronic data storage unit 215 may be disposed in or otherwise be part of the system 200 or another device. In an example, the processor 214 and the electronic data storage unit 215 may be part of a stand-alone control unit or in a centralized quality control unit. Multiple processors 214 or electronic data storage units 215 may be used.
The processor 214 may be implemented by virtually any combination of hardware, software, and firmware. Also, their functions described herein may be performed by one unit or distributed among different components, each of which in turn may be implemented by any combination of hardware, software, and firmware. Program code or instructions implementing the various methods and functions by processor 214 may be stored in a readable storage medium, such as memory in electronic data storage unit 215 or other memory.
If system 200 includes more than one processor 214, the different subsystems may be coupled to each other so that images, data, information, instructions, etc., may be sent between the subsystems. For example, one subsystem may be coupled to additional subsystems by any suitable transmission medium, which may include any suitable wired and/or wireless transmission medium known in the art. Two or more of these subsystems may also be efficiently coupled through a shared computer-readable storage medium (not shown).
The processor 214 may be configured to perform a number of functions using the output of the system 200 or other outputs. For example, the processor 214 may be configured to send the output to the electronic data storage unit 215 or another storage medium. The processor 214 may be further configured as described herein.
The processor 214 may be configured according to any of the embodiments described herein. The processor 214 may also be configured to perform other functions or additional steps using the output of the system 200 or using images or data from other sources.
The various steps, functions and/or operations of system 200 and methods disclosed herein are performed by one or more of the following: electronic circuits, logic gates, multiplexers, programmable logic devices, ASICs, analog or digital controls/switches, microcontrollers, or computing systems. Program instructions implementing the methods, such as those described herein, may be transmitted over or stored on a carrier medium. The carrier medium may comprise a storage medium such as read-only memory, random-access memory, magnetic or optical disk, non-volatile memory, solid-state memory, magnetic tape, or the like. The carrier medium may comprise a transmission medium such as a wire, cable, or wireless transmission link. For example, various steps described throughout this disclosure may be performed by a single processor 214 or alternatively multiple processors 214. Further, the different subsystems of system 200 may include one or more computing or logic systems. Accordingly, the foregoing description is not to be construed as limiting, but is merely illustrative of the present invention.
In an example, the processor 214 is in communication with the system 200. The processor 214 is configured to: receiving a plurality of measurements; determining a plurality of combinations of tool settings on the metrology tool using ANOVA; determining candidates from the plurality of combinations; generating a response surface model for each of the candidates; and determining the list of candidates for the tool set that provides the largest response and that is least sensitive to noise sources. Each of the candidates on the list of candidates is each from a denser region of the response surface model. The list of candidates may provide improved performance of the metrology tool relative to the remainder of the candidates. The candidates for the response surface model may be secondary device settings on the metrology tool, and tunable settings on the metrology tool may be independent variables. The response surface model may be a 3 x 3 response surface model.
The processor may be further configured to send instructions to perform the measurement on a semiconductor wafer using the metrology tool. The measurements can be collected using a mixed effects model.
The processor 214 may be further configured to determine a score based on the quality of the measurement. The composite desirability approach may be used for cases where each measured attribute has a different unit and a different variation. Composite desirability may transform each measured value into a score between 0 and 1. All measured quality attributes may be combined into a single score using addition, multiplication, or geometric methods.
Additional embodiments relate to a non-transitory computer-readable medium storing program instructions executable on a controller for performing a computer-implemented method for process optimization. In particular, as shown in fig. 2, the electronic data storage unit 215 or other storage medium may contain a non-transitory computer-readable medium that includes program instructions that are executable on the processor 214. The computer-implemented method may include any step of any method described herein, including method 100.
The program instructions may be implemented in any of a variety of ways, including process-based techniques, component-based techniques, and/or object-oriented techniques, among others. For example, the program instructions may be implemented using ActiveX controls, C + + objects, JavaBeans, Microsoft Foundation Classes (MFC), Streaming SIMD Extensions (SSE), or other techniques or methods, as desired.
Although disclosed in terms of beams, embodiments disclosed herein may be used with other beams from an energy source, such as electron beams or ion beams.
Experiments are performed to determine a set of device settings that provide the most accurate measurements based on several optical quality metrics. During the validation phase, targets are measured to determine how well the current printed layer overlaps on top of the previous printed layer, which is referred to as overlay. Precise accuracy may be required so that in the event that there are sufficient points measured across the wafer, the system space map can be removed and converted into a set of corrections to use the lithographic scanner for any future wafer using the same process. The target benchmark is the overlay residual for achieving semiconductor manufacturer's goals below | mean | +3 σ (4 nm over product overlay). The residual calculation utilizes a specific model determined in the production facility of the semiconductor manufacturer.
In the initial experiment, the overlay residuals cannot be entered in response because they require many (e.g., more than 100) locations to be measured across the wafer to obtain residuals based on a higher order polynomial model. With replication, measuring only 100 sites across the wafer in the first stage of the experiment would result in a designed experiment with a minimum of 437,400 runs. Thus, a set of device settings that will accurately measure overlay based on the optical quality metric is determined.
Our initial experiments were arranged to evaluate the effect of "factor a", "factor B", "factor C", "factor D" and "factor E" on three optical quality metrics ("response 1", "response 3" and "response 2"). The "factor a" designs of interest are SB1, SB2, and SB 3. The "factor B" settings of interest are low, medium, high. The "factor C" states of interest are P, S and Un. The "factor D" setting of interest is a discrete value, and the "factor E" level of interest is in the range from-2400 to 2400. The "factor A", "factor B" and "factor C" remain constant when measuring the position on the wafer. "factor D" and "factor E" are varied. This is partly due to the number of random runs required and partly due to the difficulty of changing the "factors a", "B" and "C".
The process design suggests a split zone design. The split zone design is applicable in many situations where factors that are difficult to change are applied at a larger experimental unit (e.g., a wafer) and factors that are easy to change are applied at a smaller sub-experimental unit (e.g., a site on a wafer).
Three sources of nuisance variation are identified and included in the model. Three "factors F" (In, Mid, Out), two directions (vertical (x) and horizontal (y)), and two orientations (right and left) constitute three random factors. Ideally, when measured, all elements present the same mass but there are optical proximity effects, and all sources of variability must be accounted for in the model. The "factor a" design is one of the main factors, and the goal is to select a "factor a" design that exhibits minimal optical proximity effects. Blocking these sources of random variation in the model is a useful technique to account for these sources of random variation.
Two cleavage treatment factors ("factor D" and "factor E") form the response surface. The brute force approach is to generate a 41 x 32 response surface for each primary zone processing combination (1312 runs). Through experimental determination using previous data, any 41 x 32 response surface can be divided into 9^2 treatment combinations and still maintain the overall structure of the response surface.
As shown in fig. 3 and 4, measuring a 9^2 point grid instead of a 41 x 32 point grid (93% reduction in required run number) maintains the overall structure of the response surface as approximated by the profile. The area of interest may be identified for further study or validation. By an iterative approach, it was determined that a 9 x 9 grid is sufficient to capture the region of interest while reducing the measurement cost by as much as 96%.
In the semiconductor industry, all possible regions of interest (areas of maximum response) should be possible to identify for possible research. Therefore, non-standard 9^2 is selected for the sub-region processing design.
Initial experiments focused on first generating a fracture model and evaluating the effective effects and interactions to determine candidates for response surface modeling. Three to five candidate variables are selected to receive the quadratic response surface model in a composite design centered on the 3^2 plane centered on the "factor D" and "factor E" of a particular candidate. The initial 9^2 response surface contains the points needed for the response surface model centered on the central composite plane.
There are three responses ("response 2", "response 1", "response 3"). The goal is to optimize all responses and to treat all responses equally or weight them individually depending on subject matter expertise.
In a desirability approach to multiple responses, individual responses are first normalized to a composite score value ranging from 0 to 1, where 1 is the ideal composite score value. The function applied depends on the response objective (maximize, minimize, or target). The desirability approach is useful in the semiconductor industry where predetermined specification limits may be used as thresholds in the calculations. The lower and upper specification limits may be set based on best known methods or semiconductor manufacturer operational requirements. For example, if the response is measured with the goal of minimizing the response and any value known to be greater than a threshold of 10 μm should not be considered acceptable, the desirability equation may be configured to give a zero quality score for all conditions in which the threshold is met or exceeded. This can be helpful to the semiconductor industry where the precise physics behind the measurement is understood and limitations are established. Additionally, weighting may be applied if there is sufficient evidence or a priori knowledge that some responses are more important than others.
After each individual desirability score is determined, a composite desirability score is calculated using a geometric mean method. Once a single composite response (d _ c) is generated for the model, it is used as a response for both the fracture analysis and the response surface model.
A statistical linear effect model is constructed based on the design. The linear effect model is one in which the response is a function of the linear component of the individual effect. Effects are controllable factors, interactions between controllable factors, or random but known sources of variation.
A class III test of the fixed effect (reduced model) is shown in fig. 5. This output is the standard output of the hybrid model GLIMMIX process in SAS and provides F-test statistics and p-values, helping us understand which combinations of device settings are important. The GLIMMIX process fits a statistical model to data with relevant or non-constant variability and where the response is not necessarily normally distributed. These models are called Generalized Linear Mixture Models (GLMM).
After identifying the combination of significant factors, the output from the least mean square can be used to determine the specific setting for each factor. Least mean square is similar to conventional averaging except when the number of observations in the DOE span different levels and are not equal. The min-averaging may provide corrections for unbalanced designs. If the design is balanced (i.e., has the same number of observations across the horizon), the least mean square is equal to the mean.
The highest order effective interaction effect is "factor a". factor B ". factor C". factor D "(shown in 6A-B). Least mean square (LS mean) analysis of interaction effects identifies different contrasts and identifies which groups of treatment combination levels are statistically the same. However, to determine the "factor E" setting, four three-way interaction effects were studied, including "factor E".
After checking the concatenated letter report and based on the observed data, the six settings did not differ significantly from each other and further studies could be considered. All six similar settings with "a" identification contain a single "factor B" setting (low). The "factor A" designs SB3 and SB2 and the "factor D" were also dominant in the 4-way interaction assessment.
There are four 3-way interaction effects comprising "factor E". Graphical interpretation does not help with these interaction zones, but the joint letter report provides a comparison between the required levels.
Four 3-way interaction zone connection letter reports referring to the "factor E" suggest testing the following configuration.
Setting a grade A B C D E
1 SB3 Is low in Un 1 5
2 SB3 Is low in Un 3 6
3 SB3 Is low in S 1 5
After identifying the candidates, a quadratic response surface model is run over a smaller area of the entire response surface using a subset of 3^2 points from the 9^2 "factor D" and "factor E" measurements and centered around the candidates "factor D" and "factor E". Making verification measurements requires several criteria to be met. First, the absence of a fitting test determines whether a quadratic model is appropriate. Second, if the above two conditions are met, the response surface contains a regional maximum. Third, static response points may be calculated (FIGS. 7A-7C).
This optimal response point is the interpolation point that needs to be tested and verified. Without further data collection, collecting response surface data as a 9^2 factor provides a 3^2 face-centered response surface model centered around each candidate's "factor D" and "factor E". Information may be obtained from fitting a quadratic response surface in a statistical software package.
Fig. 7A-7C represent response surfaces centered around "factor D" ═ 5200 and "factor E" ═ 5 with "factor a" ═ SB3, "factor B" ═ low, and "factor C" ═ UN. The X-axis and Y-axis response surfaces are shown separately. Quadratic models are used in response surface modeling, and the absence of a fitting test for each response surface (not shown) identifies that quadratic models are guaranteed (i.e., there is no lack of fitting in the second order term) and that each rest point is at the maximum response point in that region.
Many semiconductor manufacturers require metrology tools to measure X and Y simultaneously, and when { "factor D" ═ 2 "factor E" ═ 5.3}, a likely good candidate for dense wafer sampling in stage 2 can be inferred from fig. 7A-7C. The reported eigenvalues and eigenvectors make up a canonical analysis, and their magnitudes and directions provide useful information about sensitivity and surface shape. The sign of the eigenvalues (all negative values in the example shown in fig. 7A-7C) indicates that the calculated resting point is at the maximum and that the composite quality score decreases more in the direction of "factor D" than in the direction of "factor E". The actual feature values themselves can only be compared with the feature values of other candidates to determine which candidate is least sensitive to process changes given an equality score or given an equality overlay residual | m | +3 σ. The sensitivity difference itself may be a new metric when searching for the best set of operating conditions.
Verification experiments for the top candidate condition set ("factor a" design ═ SB3, "factor B" low, "factor C" ═ Un, "factor D" ═ 2, "factor E" ═ 5.3) were collected at all sites across the wafer (fig. 8). The results obtained indicate that the first experimental scenario was successful and the residual | m | +3 σ is much smaller than the target goal of 4.0 nm. The observed results indicate that | m | +3 σ is 2.8nm in the X direction and 2.64nm in the Y direction of fig. 8.
The split zone design, which identifies the combination of significant factors, allows the responsive surface method to be focused on a small subset of the total zone treatment combination. A single "factor a" design (SB3) and a single "factor B" (low NA) were identified as top candidates from the split results. The LS mean region and join letter reports are proven to be a useful aid in verifying the results of class III testing for fixed effects, and may provide semiconductor manufacturers with the ability to visually inspect the variable settings provided. Modeling of the response surface centered around the candidate "factor D" and "factor E" values may result in measurable candidates for verification testing across the entire wafer.
Each of the steps of the method may be performed as described herein. The method may also include any other steps that may be performed by the processor and/or computer subsystem or system described herein. The steps are performed by one or more computer systems that may be configured in accordance with any of the embodiments described herein. Additionally, the methods described above may be performed by any of the system embodiments described herein.
Although disclosed in semiconductor fabrication, the embodiments disclosed herein may be used in other types of fabrication. For example, the techniques disclosed herein may be applied to other manufacturing of electronic, automotive, chemical, pharmaceutical, aircraft, or biomedical devices.
While the invention has been described with respect to one or more particular embodiments, it will be understood that other embodiments of the invention may be made without departing from the scope of the invention. Accordingly, the invention is to be considered limited only by the following claims and the reasonable interpretation thereof.

Claims (17)

1. A metrology tool, comprising:
an energy source, wherein the energy source generates a beam;
a stage that secures a wafer in a path of the beam from the energy source;
a detector; and
a processor in electronic communication with the detector, wherein the processor is configured to:
receiving a plurality of measurements;
determining a plurality of combinations of tool settings on the metrology tool using analysis of variance ANOVA;
determining candidates from the plurality of combinations;
generating a response surface model for each of the candidates; and
determining a list of the candidates for the tool settings that provide a maximum response and are least sensitive to noise sources, wherein each of the candidates on the list of candidates is each from a denser region of the response surface model.
2. The metrology tool of claim 1, wherein the processor is further configured to send instructions to perform the measurements on a semiconductor wafer using the metrology tool.
3. The metrology tool of claim 2, wherein the measurements are collected with a mixed effects model.
4. The metrology tool of claim 1, wherein the tunable settings on the metrology tool are independent variables.
5. The metrology tool of claim 1, wherein the list of candidates provides improved performance of the metrology tool relative to a remainder of the candidates.
6. The metrology tool of claim 1, wherein the processor is further configured to determine a score based on a quality of measurement.
7. The metrology tool of claim 1, wherein the response surface model is a 3 x 3 response surface model.
8. The metrology tool of claim 1, wherein the processor is further configured to adjust one or more settings on the metrology tool based on the list of candidates.
9. A method of metering, comprising:
receiving, at a processor, a plurality of measurements from a metrology tool;
determining, using the processor, a plurality of combinations of tool settings on the metrology tool using analysis of variance ANOVA;
determining, using a processor, candidates from the plurality of combinations;
generating, using the processor, a response surface model for each of the candidates; and
determining, using the processor, a list of the candidates for the tool setting that provide a maximum response and are least sensitive to noise sources, wherein each of the candidates on the list of candidates is each from a denser region of the response surface model.
10. The metrology method of claim 9, further comprising performing the measurement on a semiconductor wafer using the metrology tool.
11. The metrology method of claim 10, wherein the measurements are collected with a mixed effects model.
12. The metrology method of claim 9, wherein the tunable settings on the metrology tool are independent variables.
13. The metrology method of claim 9, wherein the list of candidates provides improved performance of the metrology tool relative to a remainder of the candidates.
14. The metrology method of claim 9, further comprising determining a score based on a quality of measurement.
15. The metrology method of claim 9, wherein the response surface model is a 3 x 3 response surface model.
16. The metering method of claim 9, further comprising: using the processor, adjusting one or more settings on the metrology tool using the list of candidates.
17. A non-transitory computer readable medium storing a program configured to instruct a processor to perform the method of claim 9.
CN201980073210.4A 2018-11-21 2019-11-20 Process optimization using experimental design and response surface models Active CN113039632B (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201862770647P 2018-11-21 2018-11-21
US62/770,647 2018-11-21
US16/594,845 2019-10-07
US16/594,845 US11062928B2 (en) 2019-10-07 2019-10-07 Process optimization using design of experiments and response surface models
PCT/US2019/062308 WO2020106784A1 (en) 2018-11-21 2019-11-20 Process optimization using design of experiments and response surface models

Publications (2)

Publication Number Publication Date
CN113039632A CN113039632A (en) 2021-06-25
CN113039632B true CN113039632B (en) 2022-03-25

Family

ID=70774217

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201980073210.4A Active CN113039632B (en) 2018-11-21 2019-11-20 Process optimization using experimental design and response surface models

Country Status (6)

Country Link
JP (1) JP7329597B2 (en)
KR (1) KR102548663B1 (en)
CN (1) CN113039632B (en)
IL (1) IL282726A (en)
SG (1) SG11202104655QA (en)
WO (1) WO2020106784A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7496498B2 (en) 2020-08-27 2024-06-07 パナソニックIpマネジメント株式会社 Information processing method, program, and information processing device
JP7496497B2 (en) 2020-08-27 2024-06-07 パナソニックIpマネジメント株式会社 Information processing method, program, and information processing device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050246044A1 (en) * 2004-04-28 2005-11-03 International Business Machines Corporation System and method for optimizing metrology sampling in apc applications
US20060009872A1 (en) * 2004-07-08 2006-01-12 Timbre Technologies, Inc. Optical metrology model optimization for process control
CN105580123A (en) * 2013-08-23 2016-05-11 科磊股份有限公司 Multi-model metrology
CN108701625A (en) * 2016-02-24 2018-10-23 科磊股份有限公司 The accuracy of optical metrology is promoted

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7269526B2 (en) * 2005-05-04 2007-09-11 Hitachi Global Storage Technologies Netherlands B.V. Aggregated run-to-run process control for wafer yield optimization
JP2007285906A (en) 2006-04-18 2007-11-01 Hitachi High-Technologies Corp Charged particle beam system and measuring parameter setting method
US9076827B2 (en) * 2010-09-14 2015-07-07 Applied Materials, Inc. Transfer chamber metrology for improved device yield
US20140214192A1 (en) * 2013-01-25 2014-07-31 Dmo Systems Limited Apparatus For Design-Based Manufacturing Optimization In Semiconductor Fab
US9255877B2 (en) * 2013-05-21 2016-02-09 Kla-Tencor Corporation Metrology system optimization for parameter tracking

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050246044A1 (en) * 2004-04-28 2005-11-03 International Business Machines Corporation System and method for optimizing metrology sampling in apc applications
US20060009872A1 (en) * 2004-07-08 2006-01-12 Timbre Technologies, Inc. Optical metrology model optimization for process control
CN105580123A (en) * 2013-08-23 2016-05-11 科磊股份有限公司 Multi-model metrology
CN108701625A (en) * 2016-02-24 2018-10-23 科磊股份有限公司 The accuracy of optical metrology is promoted

Also Published As

Publication number Publication date
JP7329597B2 (en) 2023-08-18
CN113039632A (en) 2021-06-25
IL282726A (en) 2021-06-30
SG11202104655QA (en) 2021-06-29
KR20210080585A (en) 2021-06-30
WO2020106784A1 (en) 2020-05-28
JP2022507871A (en) 2022-01-18
KR102548663B1 (en) 2023-06-27

Similar Documents

Publication Publication Date Title
TWI751376B (en) Identifying nuisances and defects of interest in defects detected on a wafer
EP3548971B1 (en) Overlay control with non-zero offset prediction
TWI778264B (en) Performance monitoring of design-based alignment
US11010886B2 (en) Systems and methods for automatic correction of drift between inspection and design for massive pattern searching
US10964016B2 (en) Combining simulation and optical microscopy to determine inspection mode
CN113039632B (en) Process optimization using experimental design and response surface models
CN110494741B (en) Systems, methods, and computer program products for systematic and stochastic characterization of pattern defects identified from manufactured components
US11615993B2 (en) Clustering sub-care areas based on noise characteristics
US11062928B2 (en) Process optimization using design of experiments and response surface models
CN115280479B (en) Using inspection tools to determine information for class metering of samples
TWI843899B (en) Metrology tool, method of process optimization for semiconductor manufacturing, and non-transitory computer readable medium
US11710227B2 (en) Design-to-wafer image correlation by combining information from multiple collection channels
KR102506719B1 (en) Systems, methods and non-transitory computer readable media for tuning the sensitivity of a modulated wafer and determining a process window for the modulated wafer

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant