CN113013288A - Integration structure and integration method of detector - Google Patents

Integration structure and integration method of detector Download PDF

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Publication number
CN113013288A
CN113013288A CN202110160739.9A CN202110160739A CN113013288A CN 113013288 A CN113013288 A CN 113013288A CN 202110160739 A CN202110160739 A CN 202110160739A CN 113013288 A CN113013288 A CN 113013288A
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layer
substrate
detector
germanium
integration
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亨利·H·阿达姆松
王桂磊
罗雪
孔真真
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Guangdong Greater Bay Area Institute of Integrated Circuit and System
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Guangdong Greater Bay Area Institute of Integrated Circuit and System
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/028—Inorganic materials including, apart from doping material or other impurities, only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/105—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PIN type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1892—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof methods involving the use of temporary, removable substrates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electromagnetism (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
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Abstract

The invention relates to an integrated structure of a detector and a method thereof. An integration method of a detector comprises the following steps: manufacturing a reading circuit structure on a first substrate, and then forming a first dielectric layer on the surface of the reading circuit structure to obtain a substrate A; sequentially forming a germanium buffer layer, a stacked intrinsic layer, a P-type doped germanium layer and a second dielectric layer on the surface of the second substrate from bottom to top to obtain a substrate B; wherein the stacking intrinsic layer is formed by Ge layer and Ge1‑xMxThe layers are alternately and repeatedly stacked for n times, and M is Si or Sn; bonding the substrate A and the substrate B; removing the second substrate and the germanium buffer layer after bonding, then forming an N-type doped germanium layer on the surface of the stacked intrinsic layer, and then manufacturing a detector structure; read-out circuit structure and detectorThe structures are interconnected. The substrate of the detector which is not manufactured is bonded in the substrate of the reading circuit structure, so that the integration process is simplified, the integration level is improved, and the problem that the detector cannot be accurately aligned is solved.

Description

Integration structure and integration method of detector
Technical Field
The invention relates to the field of semiconductor production processes, in particular to an integrated structure and an integrated method of a detector.
Background
The photoelectric integration can combine the advantages of photons and electronic circuits, breaks the limits of power consumption and information transmission in the field of traditional microelectronics, and promotes the development of the information industry. In the photoelectric integration scheme, silicon-based monolithic photoelectric integration (photoelectric integrated chip) has the advantages of being capable of realizing integration of most of photonic devices (including lasers, photodiodes, detectors and the like) and electronic devices (including amplifiers, signal regulators, reading circuits and the like) on the same substrate, being compatible with the traditional microelectronic manufacturing process, being capable of large-scale mass production, and having good research and application prospects.
The integration process of the photonic device and the electronic device in the prior art is as follows: preparing a photonic device and an electronic device by using different substrate materials respectively, and then integrating the discrete photonic device and the electronic device to realize photoelectric conversion; the method has the disadvantages of complicated process steps, long time consumption, low integration level and inaccurate alignment.
Disclosure of Invention
The invention mainly aims to provide a detector integration method, which bonds a substrate without a manufactured detector structure in a read circuit structure substrate and then manufactures the detector structure, thereby simplifying the integration process, improving the integration level and solving the problem that the detector cannot be accurately aligned.
In order to achieve the above object, the present invention provides the following technical solutions.
A method of integrating a detector, comprising:
manufacturing a reading circuit structure on a first substrate, and then forming a first dielectric layer on the surface of the reading circuit structure to obtain a substrate A;
sequentially forming a germanium buffer layer, a stacked intrinsic layer, a P-type doped germanium layer and a second dielectric layer on the surface of the second substrate from bottom to top to obtain a substrate B; wherein the stacking intrinsic layer is formed by a Ge layer and Ge1-xMxThe layers are alternately and repeatedly stacked n times, M is Si or Sn,x is more than 0 and less than or equal to 0.3, n is more than or equal to 1, and M types in the stacked intrinsic layers are the same;
bonding the substrate A and the substrate B by taking the first dielectric layer and the second dielectric layer as bonding surfaces;
removing the second substrate and the germanium buffer layer after bonding, then forming an N-type doped germanium layer on the surface of the stacked intrinsic layer, and then manufacturing a detector structure;
interconnecting the readout circuitry structure and the detector structure.
Compared with the prior art, the invention achieves the following technical effects.
(1) The substrate of the detector structure which is not manufactured is bonded in the substrate of the reading circuit structure, so that on one hand, the integration process is simplified, the integration level is improved, the system size is reduced, the system performance is improved (the length of an interconnection line is reduced), and the like; on the other hand, the photonic device is manufactured after integration, and the problem of accurate alignment is avoided. In summary, the main difference between the present invention and the prior art is that the substrate is integrated and then the detector structure is fabricated, so the present invention has outstanding advantages in terms of integration, efficiency, accuracy, etc.
(2) The intrinsic layer adopts Ge/Ge1-xSixAlternating stack or Ge/Ge1-xSnxAnd the alternate stacking is beneficial to improving the quantum effect and enhancing the photoelectric conversion efficiency.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention.
FIG. 1 is a schematic diagram of an integrated structure of a detector provided by the present invention;
fig. 2 to 7 are schematic structural diagrams obtained at various steps in the detector integration method provided in embodiment 1;
fig. 8 to 12 are schematic structural diagrams obtained in steps of the detector integration method provided in embodiment 2.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
Various structural schematics according to embodiments of the present disclosure are shown in the figures. The figures are not drawn to scale, wherein certain details are exaggerated and possibly omitted for clarity of presentation. The shapes of various regions, layers, and relative sizes and positional relationships therebetween shown in the drawings are merely exemplary, and deviations may occur in practice due to manufacturing tolerances or technical limitations, and a person skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions, as actually required.
In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present. In addition, if a layer/element is "on" another layer/element in one orientation, then that layer/element may be "under" the other layer/element when the orientation is reversed.
The detector integrated device shown in fig. 1 comprises a read-out circuit configuration 1 and a detector configuration 3, and a medium 2 separating the two functional parts. The medium is a double-layer composite structure of silicon oxide and aluminum oxide.
The optoelectronic integrated device shown in fig. 1 has various integration methods, such as preparing discrete devices and then integrating, but because of the problems pointed out by the background art, the present invention provides a method for manufacturing a photonic device after integrating, and the basic flow is as follows:
manufacturing a substrate A: manufacturing a reading circuit structure on a first substrate, and then forming a first dielectric layer on the surface of the reading circuit structure to obtain a substrate A;
manufacturing a substrate B: sequentially forming a germanium buffer layer on the surface of the second substrate from bottom to topStacking the intrinsic layer, the P-type doped germanium layer and the second dielectric layer to obtain a substrate B; wherein the stacking intrinsic layer is formed by a Ge layer and Ge1-xMxThe layers are alternately and repeatedly stacked for n times, M is Si or Sn, x is more than 0 and less than or equal to 0.3, n is more than or equal to 1, and the types of M in the stacked intrinsic layers are the same;
bonding: bonding the substrate A and the substrate B by taking the first dielectric layer and the second dielectric layer as bonding surfaces;
removing the sacrificial layer: removing the second substrate and the germanium buffer layer to expose the stacked intrinsic layer;
forming an N layer: forming an N-type doped germanium layer on the surface of the stacking intrinsic layer;
manufacturing a detector structure: forming an N-I-P stacking structure through the procedures, and manufacturing a detector structure in the stacking structure;
interconnection: interconnecting the readout circuitry structure and the detector structure.
On one hand, the integration process is simplified, and the integration level is improved, for example, the problems of complexity, low integration level and the like of the integrated discrete devices in interconnection exist; another aspect is to fabricate the probe structure after integration, bypassing the problem of precise alignment (mainly referring to alignment of the electronic structure and the probe structure). Meanwhile, the Ge layer in the intrinsic layer in the stacking form is a relaxation layer, Ge1-xSixBeing a tensile stress layer, Ge1-xSnxThe stress layer is adopted, so that the quantum effect is favorably improved, and the photoelectric conversion efficiency is enhanced; the number of alternations can be arbitrarily adjusted according to the device requirements.
The method is suitable for any vertical type (indicating the arrangement direction of a PN structure) photoelectric device which needs to be integrated on a single silicon-based chip, so that no specific requirements are made on a reading circuit structure and a detector structure.
The first substrate and the second substrate of the above method are mainly silicon-based substrates, but there is no specific requirement for the crystal direction, the presence or absence of a buried oxide layer, and the like, and may be any substrate known to those skilled in the art for carrying semiconductor integrated circuit components, such as silicon-on-insulator (SOI), bulk silicon (bulk silicon), germanium silicon, and the like.
In the method, the first dielectric layer is preferably a single-layer silicon oxide, and the second dielectric layer is preferably an aluminum oxide layer. The deposition method of the first dielectric layer and the second dielectric layer is also arbitrary, and includes but not limited to LPCVD, RTCVD, PECVD, thermal oxidation, and the like.
The method of forming the stacked intrinsic layer is epitaxial growth.
The method of forming the N-type doped germanium layer is arbitrary and the N-doped germanium may be formed epitaxially or by implantation.
The germanium buffer layer is usually a composite layer of low-temperature germanium and high-temperature germanium, and the formation method can be epitaxial growth, chemical deposition and the like.
The method has no specific requirements on the interconnection means of the reading circuit structure and the detector structure, and can be realized by adopting a typical Through Silicon Via (TSV) technology, so that the stacking density of the integrated chips in the three-dimensional direction is maximum, the interconnection line between the chips is shortest, and the overall dimension is minimum.
After the substrate a and the substrate B are manufactured, a smoothing process such as CMP or planarization may be performed to improve the bonding strength.
The method for removing the second substrate and the germanium buffer layer after bonding is not limited, and the second substrate can be removed by combining polishing, wet etching, dry etching and CMP, and the germanium buffer layer can be removed by combining the wet etching and the dry etching.
A preferred embodiment of the present invention is as follows.
EXAMPLE 1 Integrated photodetector
Manufacturing a substrate A:
a readout circuit structure 102 is fabricated on a silicon substrate 101, and then a silicon oxide layer 103 is deposited on the surface of the readout circuit structure, and surface smoothing is performed to obtain the structure shown in fig. 2.
Manufacturing a substrate B:
firstly, depositing a germanium buffer layer 202 on a silicon substrate 201, firstly depositing germanium at a low temperature and then depositing germanium at a high temperature;
second, sequentially depositing Ge on the surface of the Ge buffer layer 202 from bottom to top1-xSix Intrinsic layer 203, P type with layers/Ge layers stacked alternatelyThe germanium layer 204 and the aluminum oxide layer 205 are doped to obtain the structure shown in fig. 3, and then the surface smoothing treatment is performed. Wherein Ge is in the intrinsic layer1-xSixThe number of times the layer/Ge layer is alternately repeated is arbitrary, and for example, twice, the substrate B is formed as shown in fig. 4.
Bonding:
and bonding the substrate A and the substrate B by using the silicon oxide layer 103 and the aluminum oxide layer 205 as bonding surfaces to obtain the structure shown in FIG. 5.
Manufacturing a detector structure:
the silicon substrate 201, the germanium buffer layer 202 are removed as shown in FIG. 6, and then at Ge1-xSixThe surface of the intrinsic layer where the layers/Ge layers are alternately stacked forms an N-type doped germanium layer 206 resulting in the structure shown in fig. 7; a detector structure is fabricated in the stacked structure.
Interconnection:
the read-out circuit structure and the detector structure are interconnected by a TSV process resulting in the structure shown in fig. 1 (the detailed circuit structure is not shown in the figure), the medium comprising the silicon oxide layer 103 in the substrate a and the aluminum oxide layer 205 in the substrate B.
EXAMPLE 2 Integrated photodetector
Manufacturing a substrate A:
the same as in example 1.
Manufacturing a substrate B:
firstly, depositing a germanium buffer layer 302 on a silicon substrate 301, firstly depositing germanium at a low temperature and then depositing germanium at a high temperature;
second, sequentially depositing Ge on the surface of the Ge buffer layer 302 from bottom to top1-xSnxAn intrinsic layer 303, a P-type doped germanium layer 304, an aluminum oxide layer 305, which are alternately stacked layer/Ge layers, as in the structure shown in fig. 8, followed by a surface smoothing process. Wherein Ge is in the intrinsic layer1-xSnxThe number of times the layer/Ge layer is alternately repeated is arbitrary, and for example, twice, the structure of the substrate B is formed as shown in fig. 9.
Bonding:
the substrate a and the substrate B are bonded with the silicon oxide layer 103 and the aluminum oxide layer 305 as a bonding surface, so that the structure shown in fig. 10 is obtained.
Manufacturing a detector structure:
the silicon substrate 301, the germanium buffer layer 302 are removed as shown in FIG. 11, and then at Ge1-xSnxForming an N-type doped germanium layer 306 on the surface of the intrinsic layer of the layer/Ge layer alternate stack, resulting in the structure shown in FIG. 12; a detector structure is fabricated in the stacked structure.
Interconnection:
the sensing circuit structure and the detector structure are interconnected by a TSV process.
The embodiments of the present disclosure have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the disclosure is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the present disclosure, and such alternatives and modifications are intended to be within the scope of the present disclosure.

Claims (7)

1. A method of integrating a detector, comprising:
manufacturing a reading circuit structure on a first substrate, and then forming a first dielectric layer on the surface of the reading circuit structure to obtain a substrate A;
sequentially forming a germanium buffer layer, a stacked intrinsic layer, a P-type doped germanium layer and a second dielectric layer on the surface of the second substrate from bottom to top to obtain a substrate B; wherein the stacking intrinsic layer is formed by a Ge layer and Ge1-xMxThe layers are alternately and repeatedly stacked for n times, M is Si or Sn, x is more than 0 and less than or equal to 0.3, n is more than or equal to 1, and the types of M in the stacked intrinsic layers are the same;
bonding the substrate A and the substrate B by taking the first dielectric layer and the second dielectric layer as bonding surfaces;
removing the second substrate and the germanium buffer layer after bonding, then forming an N-type doped germanium layer on the surface of the stacked intrinsic layer, and then manufacturing a detector structure;
interconnecting the readout circuitry structure and the detector structure.
2. The integration method of claim 1, wherein the first dielectric layer is silicon oxide.
3. The integration method of claim 1 or 2, wherein the second dielectric layer is aluminum oxide.
4. The integration method of claim 1, wherein the germanium buffer layer is a composite layer of low temperature germanium and high temperature germanium.
5. The integrated method of claim 1, wherein the second substrate is removed by a combination of polishing, wet etching, dry etching and CMP.
6. The integration method of claim 1, wherein the method for removing the germanium buffer layer is a combination of wet etching and dry etching.
7. An integrated structure of a detector, characterized by being integrated by the integration method of any one of claims 1 to 6.
CN202110160739.9A 2021-02-05 2021-02-05 Integration structure and integration method of detector Pending CN113013288A (en)

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Cited By (3)

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CN114759105A (en) * 2022-04-01 2022-07-15 广东省大湾区集成电路与系统应用研究院 Manufacturing method of quantum well photodetector and quantum well photodetector
CN117747687A (en) * 2023-11-22 2024-03-22 广州市南沙区北科光子感知技术研究院 Strain-balanced infrared detector absorption region and preparation method thereof
CN117747687B (en) * 2023-11-22 2024-08-30 广州市南沙区北科光子感知技术研究院 Strain-balanced infrared detector absorption region and preparation method thereof

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114759105A (en) * 2022-04-01 2022-07-15 广东省大湾区集成电路与系统应用研究院 Manufacturing method of quantum well photodetector and quantum well photodetector
CN114759105B (en) * 2022-04-01 2024-05-07 广东省大湾区集成电路与系统应用研究院 Quantum well photodetector and manufacturing method thereof
CN117747687A (en) * 2023-11-22 2024-03-22 广州市南沙区北科光子感知技术研究院 Strain-balanced infrared detector absorption region and preparation method thereof
CN117747687B (en) * 2023-11-22 2024-08-30 广州市南沙区北科光子感知技术研究院 Strain-balanced infrared detector absorption region and preparation method thereof

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