CN113012639A - Pixel compensation circuit and driving method - Google Patents

Pixel compensation circuit and driving method Download PDF

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Publication number
CN113012639A
CN113012639A CN202110215011.1A CN202110215011A CN113012639A CN 113012639 A CN113012639 A CN 113012639A CN 202110215011 A CN202110215011 A CN 202110215011A CN 113012639 A CN113012639 A CN 113012639A
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China
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transistor
scan signal
written
capacitor
compensation circuit
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CN202110215011.1A
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Chinese (zh)
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贾浩
罗敬凯
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Fujian Huajiacai Co Ltd
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Fujian Huajiacai Co Ltd
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Priority to CN202110215011.1A priority Critical patent/CN113012639A/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses a pixel compensation circuit and a driving method, wherein the circuit comprises a transistor T1, a transistor T2, a transistor T3, a transistor T4, a transistor T5, a capacitor C1 and a capacitor C2; the transistor T1 is connected to the Scan signal Scan1 and the transistor T2; the control end of the transistor T2 is connected with the Scan signal Scan2 and the transistor T3; the transistor T3 is connected to the Scan signal Scan3 and the transistor T4; the transistor T4 is connected with the voltage signal VDD and the transistor T5; the transistor T5 is connected to the Scan signal Scan4 and the anode of the diode; a first plate of the capacitor C1 is connected to the transistor T1 and the transistor T2, and a second plate of the capacitor C1 is connected to the transistor T6; a first plate of the capacitor C2 is connected with the transistor T2 and the transistor T3, and a second plate of the capacitor C2 is connected with the transistor T4 and the transistor T5; the transistor T6 is connected to the transistor T3, the transistor T4, and the Scan signal Scan 2. The technical scheme can improve the display effect and increase the stability of the luminous current.

Description

Pixel compensation circuit and driving method
Technical Field
The invention relates to the technical field of display, in particular to a pixel compensation circuit and a driving method.
Background
In recent years, Organic Light-Emitting diodes (OLEDs) have been widely used in the display panel industry due to their characteristics of self-luminescence, high response speed, wide viewing angle, high contrast, low power consumption, thinness, high and low temperature resistance, and the like. However, some undesirable factors affect the light emission brightness, such as: firstly, the electrical drift of the threshold voltage Vth can affect the light emitting current of the display panel; secondly, the aging of the display panel material can also affect the luminous current, and further the luminous brightness; third, the resistance of the metal of the display panel itself has an adverse effect on the light emitting current, i.e., the I-R drop phenomenon.
These undesirable factors have a severe effect on the panel brightness, and therefore a compensation circuit is required to perform a series of compensation on the display panel to make the brightness of all pixels reach the ideal value. The compensation circuit has a plurality of transistors, the number of the transistors may be 4, 5, or 6, …, and the area occupied by the sub-pixels is increased due to excessive transistors, so that the number of the sub-pixels accommodated in the panel is reduced, and the resolution is lowered, which cannot meet the requirement of high resolution of the display panel.
Disclosure of Invention
Therefore, it is desirable to provide a pixel compensation circuit and a driving method thereof, which solve the problem that the compensation circuit structure of the sub-pixel cannot be optimized effectively.
To achieve the above object, the present embodiment provides a pixel compensation circuit including a transistor T1, a transistor T2, a transistor T3, a transistor T4, a transistor T5, a capacitor C1, and a capacitor C2;
the control terminal of the transistor T1 is connected to a Scan signal Scan1, the input terminal of the transistor T1 is connected to a data signal Vdate, and the output terminal of the transistor T1 is connected to the input terminal of the transistor T2; the control end of the transistor T2 is connected with a Scan signal Scan2, and the output end of the transistor T2 is connected with the input end of the transistor T3; the control end of the transistor T3 is connected with a Scan signal Scan3, and the output end of the transistor T3 is connected with the control end of the transistor T4; the input end of the transistor T4 is connected with a voltage signal VDD, and the output end of the transistor T4 is connected with the input end of the transistor T5; the control end of the transistor T5 is connected with a scanning signal Scan4, and the output end of the transistor T5 is connected with the anode of a diode;
the first plate of the capacitor C1 is connected to the line connecting the output end of the transistor T1 and the input end of the transistor T2, and the second plate of the capacitor C1 is connected to the input end of the transistor T6; the first plate of the capacitor C2 is connected to the line connecting the output end of the transistor T2 and the input end of the transistor T3, and the second plate of the capacitor C2 is connected to the line connecting the output end of the transistor T4 and the input end of the transistor T5;
the output terminal of the transistor T6 is connected to a line connecting the output terminal of the transistor T3 and the control terminal of the transistor T4, and the control terminal of the transistor T6 is connected to the Scan signal Scan 2.
Further, one of the transistors T1, one of the transistors T2, one of the transistors T3, one of the transistors T4, one of the transistors T5, one of the capacitors C1, one of the capacitors C2, and one of the diodes form a plurality of compensation units, and one compensation unit corresponds to one pixel;
the output end of one transistor T6 is connected to a line on which the output end of the transistor T3 and the control end of the transistor T4 in the plurality of compensation units are connected, and the input end of one transistor T6 is connected to the second plate of the capacitor C1 in the plurality of compensation units.
Further, the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5, the capacitor C1, the capacitor C2, and the diode are disposed in an operable region of a display panel;
the transistor T6 is located at one side of the operable region.
Further, a plurality of compensation units in the same row share one transistor T6.
Further, the display panel is an OLED display panel.
Further, the cathode of the diode is connected with a voltage signal VSS.
Further, the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5, and the transistor T6 are all thin film transistors.
The present embodiment further provides a driving method of a pixel compensation circuit, which is applied to the pixel compensation circuit described in any one of the above embodiments, and the driving method includes the following steps:
in the reset stage, the Scan signal Scan1 is written with high potential, the Scan signal Scan2 is written with low potential, the Scan signal Scan3 is written with high potential, and the Scan signal Scan4 is written with high potential;
in the compensation stage, the Scan signal Scan1 is written with a low potential, the Scan signal Scan2 is written with a low potential, the Scan signal Scan3 is written with a low potential, and the Scan signal Scan4 is written with a high potential;
in the writing stage, the Scan signal Scan1 is written with a low potential, the Scan signal Scan2 is written with a high potential, the Scan signal Scan3 is written with a low potential, and the Scan signal Scan4 is written with a low potential;
in the light-emitting stage, the Scan signal Scan1 is written with a low potential, the Scan signal Scan2 is written with a low potential, the Scan signal Scan3 is written with a high potential, and the Scan signal Scan4 is written with a high potential.
Compared with the prior art, the technical scheme can eliminate the influence of the threshold voltage Vth on the luminous current, and further improve the display effect. Meanwhile, the luminous current is related to the data signal Vdate, so that the influence of bad factors such as power supply voltage VDD, voltage signal VSS and the like on the luminous current is eliminated, and the stability of the luminous current is greatly improved.
Drawings
Fig. 1 is a schematic structural diagram of a pixel compensation circuit according to the present embodiment;
FIG. 2 is a timing diagram of the pixel compensation circuit according to the present embodiment;
fig. 3 is a schematic structural diagram of the pixel compensation circuit in the reset phase according to the present embodiment;
FIG. 4 is a schematic structural diagram of the pixel compensation circuit in the compensation stage according to the present embodiment;
FIG. 5 is a schematic diagram of a pixel compensation circuit in a write stage according to the present embodiment;
fig. 6 is a schematic structural diagram of the pixel compensation circuit in the light-emitting stage according to the present embodiment.
Description of reference numerals:
1. a pixel;
2. an operable zone;
3. a non-operable zone.
Detailed Description
To explain technical contents, structural features, and objects and effects of the technical solutions in detail, the following detailed description is given with reference to the accompanying drawings in conjunction with the embodiments.
Referring to fig. 1, a pixel compensation circuit of the present embodiment includes a transistor T1, a transistor T2, a transistor T3, a transistor T4, a transistor T5, a transistor T6, a capacitor C1, and a capacitor C2. The control terminal of the transistor T1 is connected to the Scan signal Scan1, the input terminal of the transistor T1 is connected to the data signal Vdate, and the output terminal of the transistor T1 is connected to the input terminal of the transistor T2. The control terminal of the transistor T2 is connected to the Scan signal Scan2, and the output terminal of the transistor T2 is connected to the input terminal of the transistor T3. The control terminal of the transistor T3 is connected to the Scan signal Scan3, and the output terminal of the transistor T3 is connected to the control terminal of the transistor T4. The input terminal of the transistor T4 is connected to the voltage signal VDD, and the output terminal of the transistor T4 is connected to the input terminal of the transistor T5. The control terminal of the transistor T5 is connected to the Scan signal Scan4, and the output terminal of the transistor T5 is connected to the anode of the diode. The first plate of the capacitor C1 is connected to the line connecting the output terminal of the transistor T1 and the input terminal of the transistor T2, and the second plate of the capacitor C1 is connected to the input terminal of the transistor T6. The first plate of the capacitor C2 is connected to the line connecting the output terminal of the transistor T2 and the input terminal of the transistor T3, and the second plate of the capacitor C2 is connected to the line connecting the output terminal of the transistor T4 and the input terminal of the transistor T5. The output terminal of the transistor T6 is connected to a line connecting the output terminal of the transistor T3 and the control terminal of the transistor T4, and the control terminal of the transistor T6 is connected to the Scan signal Scan 2.
According to the technical scheme, the brightness of all the pixels reaches an ideal value through the compensation circuit, the stability of the luminous current of the display panel is improved, and the display quality of the display panel is improved.
Note that, the junction of the first plate of the capacitor C1, the output terminal of the transistor T1, and the input terminal of the transistor T2 is set to the point B. The junction of the first plate of the capacitor C2, the output terminal of the transistor T2, and the input terminal of the transistor T3 sets point a. The junction of the output terminal of the transistor T3, the control terminal of the transistor T4, and the Scan signal Scan2 sets a point G. The junction of the second plate of the capacitor C2, the output terminal of the transistor T4, and the input terminal of the transistor T5 sets a point S.
In the present embodiment, one of the transistors T1, one of the transistors T2, one of the transistors T3, one of the transistors T4, one of the transistors T5, one of the capacitors C1, one of the capacitors C2, and one of the diodes form a compensation unit. The number of the compensation units is multiple, and one compensation unit corresponds to one pixel 1. The output end of one transistor T6 is connected to a line on which the output end of the transistor T3 and the control end of the transistor T4 in the plurality of compensation units are connected, and the input end of one transistor T6 is connected to the second plate of the capacitor C1 in the plurality of compensation units.
In the technical scheme, each row shares one transistor to control the writing of the Vsus, so that the layout number of the transistors in the pixels is reduced, the occupied area of the pixels is smaller, the number of the pixels accommodated by the display panel is increased, and the resolution of the display panel can be improved.
It should be noted that the Scan signal Scan2 controls the writing of the dc low voltage Vsus to the compensation unit corresponding to each row of pixels 1 in the AA region, and the plurality of compensation units in the same row share one transistor T6, and the transistor T6 controls the writing of Vsus to Reset the point G.
Note that the data signal Vdate is written in the data voltage of RGB.
The cathode of the diode is connected to a voltage signal VSS.
In the present embodiment, the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5, the capacitor C1, the capacitor C2, and the diode are all disposed in an operable Area 2 (i.e., an Active Area, abbreviated as AA Area) of the display panel. The transistor T6 is located at one side of the operable region 2, i.e., the transistor T6 is located on the non-operable region 3, the non-operable region 3 having a space from the operable region 2. The pixel compensation circuit is connected to the internal circuit of the pixel via the G-point and the B-point.
Each pixel 1 handles one color channel, for example 3 pixels 1 are shown in fig. 1 and 2. In some embodiments, the pixels of a row may also be 1, 2, 5, 10, etc. The arrangement of the pixels may be RGB arrangement, oriental arrangement, diamond arrangement, etc. The compensation unit of the pixel is provided following the arrangement of the pixels, one pixel unit being provided in each pixel 1.
In this embodiment, the display panel is an OLED display panel, and the diodes are organic light emitting diodes. The OLED is a short for Organic Light-Emitting Diode, and chinese is an Organic electroluminescent display or an Organic Light-Emitting semiconductor. The OLED display panel has the characteristics of lightness, thinness, high brightness, low power consumption, fast response, high definition, good flexibility, high luminous efficiency and the like, and can meet the new requirements of consumers on display technology.
In some embodiments, the compensation circuit of the present application can also be applied to a Display panel of an LCD, which is an abbreviation of Liquid Crystal Display, and chinese is a Liquid Crystal Display. The LCD display panel has advantages of small size, low power consumption, and high brightness.
In this embodiment, a Transistor is used as a variable current switch capable of controlling an output current based on an input voltage, and the Transistor that can be used in this application is a Thin Film Transistor (TFT), a MOS Transistor (i.e., a metal-oxide-semiconductor field effect Transistor, MOSFET for short), a junction field effect Transistor, or the like. Preferably, the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5 and the transistor T6 are all thin film transistors.
In this embodiment, the input terminal of the transistor T1, the input terminal of the transistor T2, the input terminal of the transistor T3, the input terminal of the transistor T4, the input terminal of the transistor T5 and the input terminal of the transistor T6 are all drains, the output terminals of the 6 transistors are sources, and the control terminals of the 6 transistors are gates.
In this embodiment, the thin film transistor is an LTPO thin film transistor, the LTPO is an abbreviation of Low Temperature Polycrystalline Oxide, which is named as "Low Temperature Polycrystalline Oxide", and the LTPO thin film transistor has a higher charge mobility and a faster pixel reaction.
The present embodiment further provides a driving method of a pixel compensation circuit, which is applied to the pixel compensation circuit described in the above embodiments, and the structure of the pixel compensation circuit is shown in fig. 1. Referring to fig. 2, the driving method of the pixel compensation circuit includes the following steps:
in the reset stage T1, the Scan signal Scan1 writes a high potential, the Scan signal Scan2 writes a low potential, the Scan signal Scan3 writes a high potential, and the Scan signal Scan4 writes a high potential;
in the compensation stage T2, the Scan signal Scan1 writes a low potential, the Scan signal Scan2 writes a low potential, the Scan signal Scan3 writes a low potential, and the Scan signal Scan4 writes a high potential;
in the write phase T3, the Scan signal Scan1 writes a low potential, the Scan signal Scan2 writes a high potential, the Scan signal Scan3 writes a low potential, and the Scan signal Scan4 writes a low potential;
in the light-emitting period T4, the Scan signal Scan1 is written with a low potential, the Scan signal Scan2 is written with a low potential, the Scan signal Scan3 is written with a high potential, and the Scan signal Scan4 is written with a high potential.
Referring to fig. 3, in the reset phase T1, the Scan signal Scan1 is written to high, and the transistor T1 is turned on. The voltage of the data signal Vdata is written at the point B, the Scan signal Scan2 is written at a low potential, the transistor T2 and the transistor T6 are turned off, and VB is Vdata and represents the potential at the point B.
Referring to fig. 4, during the compensation period T2, the Scan signal Scan1 is written low, and the transistor T1 is turned off. The Scan signal Scan2 is still written to the low voltage, and the transistor T2 and the transistor T6 continue to be turned off. The Scan signal Scan4 is written to high, and the transistor T5 is turned on. The Scan signal Scan3 writes a low level, the transistor T3 turns off, and the S point discharges to the voltage across the OLED, i.e. VS ═ VOLED, VS represents the voltage at the S point.
Referring to fig. 5, in the write phase T3, the Scan signal Scan2 is written high, and the transistor T2 and the transistor T6 are turned on. At this time, VA is Vdata, VG is Vsus, and VS is Vsus Vth.
Referring to fig. 6, in the light-emitting period T4, the Scan signal Scan2 is written to a low level, and the transistors T2 and T6 are turned off. The Scan line Scan4 is written with a high potential and the transistor T5 is turned on. The Scan signal Scan3 is written to high, and the transistor T3 is turned on. The G-point write Vdata voltage, that is, VG ═ Vdata, VS ═ Vsus-Vth, VGs ═ VG-VS ═ Vdata- (Vsus-Vth), is substituted into the saturation region current formula I of the N-type transistor, and substituted into the saturation region current formula I of the N-type transistorOLED＝1/2μnCOXW/L(VGS-VTH)2To obtain IOLED＝1/2μnCOXW/L(Vdata-Vsus)2(Note. mu.)nIs field effect mobility, COXAn insulating layer capacitor per unit area; W/L is the width divided by the length of the transistor channel).
We can find the light emitting current I of the display panel of the OLEDOLEDThe technical scheme can eliminate the threshold voltage Vth to the light-emitting current I regardless of the threshold voltage Vth, the power supply voltage VDD, the voltage signal VSS and the likeOLEDImproving the display effect. At the same time, the light emitting current IOLEDThe data signal Vdate is related to, and the adverse factors such as the power supply voltage VDD and the voltage signal VSS are excluded from the light emitting current IOLEDGreatly increasing the luminous current IOLEDStability of (2).
The compensation circuit can achieve the purpose of compensation, so that the brightness of all pixels reaches an ideal value, the stability of the luminous current of the display panel is improved, and the display quality of the display panel is improved. Meanwhile, the number of the transistors of the framework is small, the occupied area of the pixels is small, the number of the pixels accommodated by the display panel is increased, and the resolution of the display panel can be improved.
It should be noted that, although the above embodiments have been described herein, the invention is not limited thereto. Therefore, based on the innovative concepts of the present invention, the technical solutions of the present invention can be directly or indirectly applied to other related technical fields by making changes and modifications to the embodiments described herein, or by using equivalent structures or equivalent processes performed in the content of the present specification and the attached drawings, which are included in the scope of the present invention.

Claims (8)

1. A pixel compensation circuit is characterized by comprising a transistor T1, a transistor T2, a transistor T3, a transistor T4, a transistor T5, a capacitor C1 and a capacitor C2;
the control terminal of the transistor T1 is connected to a Scan signal Scan1, the input terminal of the transistor T1 is connected to a data signal Vdate, and the output terminal of the transistor T1 is connected to the input terminal of the transistor T2; the control end of the transistor T2 is connected with a Scan signal Scan2, and the output end of the transistor T2 is connected with the input end of the transistor T3; the control end of the transistor T3 is connected with a Scan signal Scan3, and the output end of the transistor T3 is connected with the control end of the transistor T4; the input end of the transistor T4 is connected with a voltage signal VDD, and the output end of the transistor T4 is connected with the input end of the transistor T5; the control end of the transistor T5 is connected with a scanning signal Scan4, and the output end of the transistor T5 is connected with the anode of a diode;
the first plate of the capacitor C1 is connected to the line connecting the output end of the transistor T1 and the input end of the transistor T2, and the second plate of the capacitor C1 is connected to the input end of the transistor T6; the first plate of the capacitor C2 is connected to the line connecting the output end of the transistor T2 and the input end of the transistor T3, and the second plate of the capacitor C2 is connected to the line connecting the output end of the transistor T4 and the input end of the transistor T5;
the output terminal of the transistor T6 is connected to a line connecting the output terminal of the transistor T3 and the control terminal of the transistor T4, and the control terminal of the transistor T6 is connected to the Scan signal Scan 2.
2. The pixel compensation circuit according to claim 1, wherein one of the transistors T1, one of the transistors T2, one of the transistors T3, one of the transistors T4, one of the transistors T5, one of the capacitors C1, one of the capacitors C2, and one of the diodes form a plurality of compensation units, and one compensation unit corresponds to one pixel;
the output end of one transistor T6 is connected to a line on which the output end of the transistor T3 and the control end of the transistor T4 in the plurality of compensation units are connected, and the input end of one transistor T6 is connected to the second plate of the capacitor C1 in the plurality of compensation units.
3. The pixel compensation circuit of claim 2, wherein the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5, the capacitor C1, the capacitor C2, and the diode are disposed in an operable region of a display panel;
the transistor T6 is located at one side of the operable region.
4. The pixel compensation circuit of claim 2, wherein the compensation units in the same row share a transistor T6.
5. The pixel compensation circuit of claim 3, wherein the display panel is an OLED display panel.
6. The pixel compensation circuit of claim 1, wherein a cathode of the diode is connected to a voltage signal VSS.
7. The pixel compensation circuit of claim 1, wherein the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5 and the transistor T6 are all thin film transistors.
8. A pixel compensation circuit driving method applied to the pixel compensation circuit of any one of claims 1 to 7, the driving method comprising the steps of:
in the reset stage, the Scan signal Scan1 is written with high potential, the Scan signal Scan2 is written with low potential, the Scan signal Scan3 is written with high potential, and the Scan signal Scan4 is written with high potential;
in the compensation stage, the Scan signal Scan1 is written with a low potential, the Scan signal Scan2 is written with a low potential, the Scan signal Scan3 is written with a low potential, and the Scan signal Scan4 is written with a high potential;
in the writing stage, the Scan signal Scan1 is written with a low potential, the Scan signal Scan2 is written with a high potential, the Scan signal Scan3 is written with a low potential, and the Scan signal Scan4 is written with a low potential;
in the light-emitting stage, the Scan signal Scan1 is written with a low potential, the Scan signal Scan2 is written with a low potential, the Scan signal Scan3 is written with a high potential, and the Scan signal Scan4 is written with a high potential.
CN202110215011.1A 2021-02-25 2021-02-25 Pixel compensation circuit and driving method Pending CN113012639A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110215011.1A CN113012639A (en) 2021-02-25 2021-02-25 Pixel compensation circuit and driving method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110215011.1A CN113012639A (en) 2021-02-25 2021-02-25 Pixel compensation circuit and driving method

Publications (1)

Publication Number Publication Date
CN113012639A true CN113012639A (en) 2021-06-22

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110215011.1A Pending CN113012639A (en) 2021-02-25 2021-02-25 Pixel compensation circuit and driving method

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