CN213545874U - Pixel compensation circuit - Google Patents
Pixel compensation circuit Download PDFInfo
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- CN213545874U CN213545874U CN202022383562.2U CN202022383562U CN213545874U CN 213545874 U CN213545874 U CN 213545874U CN 202022383562 U CN202022383562 U CN 202022383562U CN 213545874 U CN213545874 U CN 213545874U
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Abstract
The utility model discloses a pixel compensation circuit, wherein compensation circuit includes: the drain of the transistor T1 is connected to VDD, the gate of the transistor T1 is connected to SCAN1, and the source of the transistor T1 is connected to the drain of the transistor T2 and the drain of the transistor T4; the source electrode of the transistor T2 and the gate electrode of the transistor T4 are connected with the first polar plate, and the gate electrode of the transistor T2 is connected with the SCAN 2; the source electrode of the transistor T3 is connected with the second plate, and the gate electrode of the transistor T3 is connected with the SCAN 2; a source of the transistor T4 is connected to a source of the transistor T6 and a drain of the transistor T7; the gate of the transistor T5 is connected to EM, and the drain of the transistor T5 is connected to the source of the transistor T3; the gate of the transistor T6 is connected with SCAN 2; the source of the transistor T7 is connected to the anode of the led, and the gate of the transistor T7 is connected to EM. The technical scheme ensures that the brightness of the picture at each position of the panel is displayed more uniformly.
Description
Technical Field
The utility model relates to a show technical field, especially relate to a pixel compensation circuit.
Background
In recent years, Organic Light-Emitting diodes (OLEDs) have been widely used in the display panel industry due to their characteristics of self-luminescence, high response speed, wide viewing angle, high contrast, low power consumption, lightness, thinness, high and low temperature resistance, and flexibility.
The current OLED has some problems, such as current difference and brightness difference of the OLED due to the influence of the process of low temperature polysilicon technology (LTPS TFT) and Metal oxide technology (Metal oxide TFT), and the non-uniformity of Vth (threshold voltage) of the transistors at different positions, and is sensed by human eyes, i.e., mura phenomenon.
The parameters affecting the OLED device current include the electron mobility of the transistor, the threshold voltage Vth, the driving voltage of the OLED, and the power voltage. And the luminance of the OLED itself gradually decays after being turned on, which are difficult to overcome in terms of process. A pixel compensation circuit is needed to eliminate the influence of these factors and make the brightness of all pixels reach the ideal value.
SUMMERY OF THE UTILITY MODEL
Therefore, it is necessary to provide a pixel compensation circuit to solve the problem of uneven display brightness of the panel.
To achieve the above object, the present embodiment provides a pixel compensation circuit including a transistor T1, a transistor T2, a transistor T3, a transistor T4, a transistor T5, a transistor T6, a transistor T7, a capacitor, and a diode;
the drain of the transistor T1 is connected to VDD, the gate of the transistor T1 is connected to SCAN1, and the source of the transistor T1 is connected to the drain of the transistor T2 and the drain of the transistor T4 respectively;
the source electrode of the transistor T2 and the gate electrode of the transistor T4 are respectively connected with the first plate of the capacitor, and the gate electrode of the transistor T2 is connected with a SCAN 2;
the source electrode of the transistor T3 is connected with the second plate electrode of the capacitor, the drain electrode of the transistor T3 is connected with the drive Vdate, and the gate electrode of the transistor T3 is connected with the SCAN 2;
a source of the transistor T4 is connected to a source of the transistor T5, a source of the transistor T6 and a drain of the transistor T7, respectively;
the gate of the transistor T5 is connected to EM, the drain of the transistor T5 is connected to the line between the source of the transistor T3 and the second plate;
the gate of the transistor T6 is connected with SCAN2, and the drain of the transistor T6 is connected with Vref;
the source of the transistor T7 is connected to the anode of the diode, and the gate of the transistor T7 is connected to EM.
Further, the cathode of the diode is connected with VSS.
Further, the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5, the transistor T6, and the transistor T7 are all thin film transistors.
Further, the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5, the transistor T6, and the transistor T7 are all thin film transistors having an N-type structure.
Further, the diode is an organic light emitting diode.
Further, the pixel compensation circuit is disposed on the display panel.
Different from the prior art, the technical scheme has the following advantages:
(1) meanwhile, the brightness change caused by the Vth drift and the OLED device electrical deterioration is overcome, the current is not influenced by the Vth and the V _ OLED, and the brightness of the picture at each position of the panel is displayed more uniformly.
(2) The OLED light-emitting current Ioled is related to Vref and Vdata, and Ioled is not related to Vth and V _ OLED, so that the stability of the OLED light-emitting current is greatly improved, and the display quality of the panel is improved.
Drawings
Fig. 1 is a schematic structural diagram of a pixel compensation circuit according to the present embodiment;
FIG. 2 is a timing diagram of the pixel compensation circuit according to the present embodiment;
fig. 3 is a schematic structural diagram of the pixel compensation circuit in the reset phase according to the present embodiment;
FIG. 4 is a schematic structural diagram of the pixel compensation circuit in the compensation stage according to the present embodiment;
FIG. 5 is a schematic structural diagram of the pixel compensation circuit in the storage stage according to the present embodiment;
fig. 6 is a schematic structural diagram of the pixel compensation circuit in the light-emitting stage according to the present embodiment.
Detailed Description
To explain technical contents, structural features, and objects and effects of the technical solutions in detail, the following detailed description is given with reference to the accompanying drawings in conjunction with the embodiments.
Referring to fig. 1 to 6, the present embodiment provides a pixel compensation circuit, which includes a transistor T1, a transistor T2, a transistor T3, a transistor T4, a transistor T5, a transistor T6, a transistor T7, a capacitor, and a diode. The drain of the transistor T1 is connected to VDD (i.e., driving voltage), the gate of the transistor T1 is connected to SCAN1 (i.e., SCAN signal), and the source of the transistor T1 is connected to the drain of the transistor T2 and the drain of the transistor T4, respectively. The source of the transistor T2 and the gate of the transistor T4 are respectively connected to the first plate of the capacitor, and the gate of the transistor T2 is connected to the SCAN2 (i.e., also a SCAN signal). The source of the transistor T3 is connected to the second plate of the capacitor, the drain of the transistor T3 is connected to Vdate (i.e., the driving signal), and the gate of the transistor T3 is connected to the SCAN 2. The source of the transistor T4 is connected to the source of the transistor T5, the source of the transistor T6 and the drain of the transistor T7, respectively. The gate of the transistor T5 is connected to EM, and the drain of the transistor T5 is connected to a line between the source of the transistor T3 and the second plate. The gate of the transistor T6 is connected with SCAN2, and the drain of the transistor T6 is connected with Vref. The source of the transistor T7 is connected to the anode of the diode, and the gate of the transistor T7 is connected to EM. And the cathode of the diode is connected with VSS. According to the technical scheme, by optimizing the structure of the pixel compensation circuit, a better framework can be provided for panel display, the brightness of the picture at each position of the panel is displayed more uniformly, and the display quality of the panel is improved.
Note that, a point a is provided on a line connecting the source of the transistor T2 and the gate of the transistor T4. A point B is provided on a line between the source of the transistor T3 and the second plate, and the drain of the transistor T5 is connected to the point B. A point C is provided on a line between the source of the transistor T4 and the drain of the transistor T7, and the source of the transistor T5 and the source of the transistor T6 are connected to the point C.
Preferably, the Diode is an Organic Light-Emitting Diode (OLED).
In the present embodiment, the transistors T1, T2, T3, T4, T5, T6, and T7 may be thin film transistors, MOS transistors (i.e., metal-oxide-semiconductor field effect transistors MOSFET), junction field effect transistors, and the like. Preferably, the Transistor T1, the Transistor T2, the Transistor T3, the Transistor T4, the Transistor T5, the Transistor T6, and the Transistor T7 are all Thin Film Transistors (TFT) as switches to control conduction of a wiring. The thin film transistor drives the liquid crystal pixel point to achieve display screen information with high speed, high brightness and high contrast.
The pixel compensation circuit is arranged on the display panel and can be used as a driving circuit of the display panel. The display panel may be an OLED display panel or an LCD display panel. Among them, the OLED (organic light-Emitting Diode) is also called as organic electroluminescent display and organic light-Emitting semiconductor, and the OLED display panel has the characteristics of being thinner, lighter, higher in brightness, lower in power consumption, faster in response, higher in definition, better in flexibility, higher in light-Emitting efficiency, and the like than the LCD display panel, and can meet the new requirements of consumers on the display technology. Whereas LCD (liquid Crystal display) is called a liquid Crystal display, LCD display panels have the advantages of small size, low power consumption and high brightness.
The present application provides a driving method of a pixel compensation circuit, which is applied to a pixel compensation circuit according to any of the above embodiments, and includes the following steps:
referring to fig. 2 and 3, during the reset period T1, Scan1 and Scan2 are set to high, and EM is set to low. The transistor T1, the transistor T2, the transistor T3, the transistor T4, and the transistor T6 are in an on state, and the transistor T5 and the transistor T7 are in an off state. At this time, the voltage at the point a is VDD, the voltage at the point B is Vdata, and the voltage at the point C is Vref (i.e., as a reference voltage), and the reset of the potential at the point a and the potential at the point B is completed at this stage.
Referring to fig. 2 and 4, during the compensation phase T2, Scan2 writes high, Scan1 writes low, and EM writes low. The transistor T2, the transistor T3, and the transistor T6 are in an on state, and the remaining transistors are in an off state. The potentials of the point B and the point C are unchanged, the potential of the point B is Vdata, and the potential of the point C is Vref. When the voltage difference Vgs (T4) between the points a and C becomes Vth, the transistor T4 is in an off state, and the voltage at the point a becomes Vref + Vth, thereby completing Vth extraction of the transistor T4.
Referring to fig. 2 and 5, during the storage period T3, Scan1, Scan2 and EM are all set to low potential. All transistors are in the off state, and the voltage of each point is kept unchanged, thereby completing the storage of data.
Referring to fig. 2 and 6, during the light emitting period T4, Scan2 is set to a low potential, and Scan1 and EM are set to a high potential. The transistor T1, the transistor T4, the transistor T5, and the transistor T7 are in an on state, and the remaining transistors are in an off state. At this time, the organic light emitting diode is in a light emitting stage, and the potential of the point C is V _ OLED (i.e., driving voltage) of the OLED display panel. Since the transistor T5 is turned on, the potential at point B is the OLED driving voltage V _ OLED, and the potential at point a is subject to capacitive coupling effect. The potential of the point a in the storage period T3 is: vref + Vth, potential of point B in the memory phase T3 is: vdata. In the emission phase of T4, the potential at point B is the OLED drive voltage V _ OLED, so the potential at point a becomes: vref + Vth-Vdata + V _ OLED (the result is that the A point potential is 100% coupled by the capacitor, and there is no parasitic capacitance except the capacitor). The structure completes the compensation of OLED device according to the driving structure and the driving method.
From current formula I in saturation regionoled＝1/2μnCoxW/L(Vgs-Vth)2The following can be obtained:
finally, the driving current of the OLED device is: i isoled＝1/2μnCoxW/L(Vref-Vdata)2
Wherein is munCox is the capacitance per unit area of the gate oxide layer of the transistor, and W/L is the ratio of the width to the length of the transistor. We can find that IoledRelating only to Vref, Vdata, IoledIndependent of Vth and V _ OLED.
The design scheme of the application can finally achieve the following beneficial effects:
(1) meanwhile, the brightness change caused by the Vth drift and the OLED device electrical deterioration is overcome, the current is not influenced by the Vth and the V _ OLED, and the brightness of the picture at each position of the panel is displayed more uniformly.
(2) OLED luminous current IoledRelating to Vref, Vdata, IoledIndependent of Vth and V _ OLED, the stability of the OLED light-emitting current is greatly improved, and the display quality of the panel is improved.
It should be noted that, although the above embodiments have been described herein, the scope of the present invention is not limited thereby. Therefore, based on the innovative concept of the present invention, the changes and modifications of the embodiments described herein, or the equivalent structure or equivalent process changes made by the contents of the specification and the drawings of the present invention, directly or indirectly apply the above technical solutions to other related technical fields, all included in the scope of the present invention.
Claims (6)
1. A pixel compensation circuit is characterized by comprising a transistor T1, a transistor T2, a transistor T3, a transistor T4, a transistor T5, a transistor T6, a transistor T7, a capacitor and a diode;
the drain of the transistor T1 is connected to VDD, the gate of the transistor T1 is connected to SCAN1, and the source of the transistor T1 is connected to the drain of the transistor T2 and the drain of the transistor T4 respectively;
the source electrode of the transistor T2 and the gate electrode of the transistor T4 are respectively connected with the first plate of the capacitor, and the gate electrode of the transistor T2 is connected with a SCAN 2;
the source electrode of the transistor T3 is connected with the second plate electrode of the capacitor, the drain electrode of the transistor T3 is connected with the drive Vdate, and the gate electrode of the transistor T3 is connected with the SCAN 2;
a source of the transistor T4 is connected to a source of the transistor T5, a source of the transistor T6 and a drain of the transistor T7, respectively;
the gate of the transistor T5 is connected to EM, the drain of the transistor T5 is connected to the line between the source of the transistor T3 and the second plate;
the gate of the transistor T6 is connected with SCAN2, and the drain of the transistor T6 is connected with Vref;
the source of the transistor T7 is connected to the anode of the diode, and the gate of the transistor T7 is connected to EM.
2. The pixel compensation circuit of claim 1, wherein a cathode of the diode is connected to VSS.
3. The pixel compensation circuit of claim 1, wherein the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5, the transistor T6 and the transistor T7 are all thin film transistors.
4. The pixel compensation circuit of claim 3, wherein the transistors T1, T2, T3, T4, T5, T6 and T7 are all thin film transistors of N-type structure.
5. The pixel compensation circuit of claim 1, wherein the diode is an organic light emitting diode.
6. The pixel compensation circuit of claim 1, wherein the pixel compensation circuit is disposed on a display panel.
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| CN202022383562.2U CN213545874U (en) | 2020-10-23 | 2020-10-23 | Pixel compensation circuit |
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| CN202022383562.2U CN213545874U (en) | 2020-10-23 | 2020-10-23 | Pixel compensation circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112331148A (en) * | 2020-10-23 | 2021-02-05 | 福建华佳彩有限公司 | Pixel compensation circuit and driving method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112331148A (en) * | 2020-10-23 | 2021-02-05 | 福建华佳彩有限公司 | Pixel compensation circuit and driving method |
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