CN113009998B - Efficiency management method and electronic device - Google Patents
Efficiency management method and electronic device Download PDFInfo
- Publication number
- CN113009998B CN113009998B CN201911310380.8A CN201911310380A CN113009998B CN 113009998 B CN113009998 B CN 113009998B CN 201911310380 A CN201911310380 A CN 201911310380A CN 113009998 B CN113009998 B CN 113009998B
- Authority
- CN
- China
- Prior art keywords
- temperature
- system processor
- temperature set
- frequency
- set value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000007726 management method Methods 0.000 title claims abstract description 18
- 238000000034 method Methods 0.000 claims abstract description 39
- 238000006243 chemical reaction Methods 0.000 claims abstract description 32
- 230000008569 process Effects 0.000 claims description 15
- 230000007423 decrease Effects 0.000 claims description 6
- 230000009467 reduction Effects 0.000 description 6
- 230000008859 change Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Power Sources (AREA)
- Control Of Temperature (AREA)
Abstract
A performance management method and an electronic device are disclosed. The performance management method is suitable for an electronic device with a system processor, and comprises the steps of sensing the temperature of the electronic device and judging whether the temperature is greater than a first temperature set value. When the temperature is not greater than the first temperature set value, a frequency raising program is started. When the temperature is greater than the first temperature set value, judging whether the temperature is greater than a second temperature set value, wherein the second temperature set value is greater than the first temperature set value, when the temperature is greater than the first temperature set value and not greater than the second temperature set value, starting a first down-conversion procedure, and when the temperature is greater than the second temperature set value, starting a second down-conversion procedure or closing a system processor of the electronic device.
Description
Technical Field
The present disclosure relates to a power performance management technology, and more particularly, to a performance management method and an electronic device for controlling a working frequency by using a ramp-down and ramp-up method.
Background
With the advanced development of integrated circuit technology, the requirements for the functional specifications of integrated circuits are increasing, so that the design of integrated circuits is increasingly complex and fine. The system-on-a-chip (SOC) designed according to such circuit design is important for applications in electronic products. When the system single chip operates at a higher frequency, the power consumed is increased, and the heat generated is increased, which causes the temperature of the system single chip to increase. Once the temperature is too high, the system single chip cannot work normally, and even the whole system is started or damaged.
In order to avoid the system single chip from being started or damaged due to the excessively high temperature, when the temperature of the system single chip exceeds a preset temperature, the CPU in the system single chip is subjected to frequency reduction so as to reduce power consumption, and frequency increase is started after the temperature of the system single chip is reduced to a default temperature. However, the speed of the electronic product after the frequency reduction is significantly lower than the normal speed of the original cpu, which will reduce the instruction cycle of the electronic product and fail to maintain the optimal performance.
Disclosure of Invention
In view of the above, a performance management method is provided, which is suitable for an electronic device having a system processor, and the performance management method includes: sensing the temperature of the electronic device, and judging whether the temperature is greater than a first temperature set value. When the temperature is not greater than the first temperature set value, starting an up-conversion program; when the temperature is greater than the first temperature set point, judging whether the temperature is greater than a second temperature set point, wherein the second temperature set point is greater than the first temperature set point. When the temperature is greater than the first temperature set point and the temperature is not greater than the second temperature set point, a first down-conversion procedure is started, and when the temperature is greater than the second temperature set point, a second down-conversion procedure is started or the system processor is shut down.
The present disclosure further provides an electronic device including a temperature sensor, a system processor, and a control module. The temperature sensor is used for sensing a temperature. The system processor has an operating frequency. The control module is electrically connected with the temperature sensor and the system processor, and starts an up-conversion program for the system processor when the temperature is smaller than a first temperature set value, and starts a first down-conversion program for the system processor when the temperature is larger than the first temperature set value and not larger than a second temperature set value, wherein the second temperature set value is larger than the first temperature set value, and starts a second down-conversion program or closes the system processor when the temperature is larger than the second temperature set value.
According to some embodiments, the up-conversion process further comprises: judging whether the working frequency of the system processor is the highest value, and when the working frequency is not the highest value, raising the frequency of the system processor according to a first time interval so as to raise the working frequency by a frequency magnitude.
According to some embodiments, the first down-conversion program further comprises: the system processor is down-converted to reduce the operating frequency by one frequency magnitude.
According to some embodiments, when the first down-conversion process is started more than twice, a second time interval is spaced between the starting times of two adjacent first down-conversion processes, and the second time interval is smaller than the first time interval.
According to some embodiments, when the temperature is greater than the second temperature set point, the control module first determines whether the operating frequency of the system processor is at a minimum value, and when the operating frequency of the system processor is not at the minimum value, starts the second down-conversion procedure, and when the operating frequency of the system processor is at the minimum value, shuts down the system processor.
According to some embodiments, the second down conversion process further comprises: the system processor is down-converted to minimize the operating frequency of the system processor.
According to some embodiments, the control module periodically determines whether the temperature is greater than the first temperature set point according to a period of time, and the period of time is equal to the second time interval.
According to some embodiments, the electronic device is a system-on-a-chip.
In summary, when the temperature of the electronic device is too high and the frequency needs to be reduced to reduce the temperature, the operating frequency of the system processor is adjusted by using the gradual frequency reduction and frequency increase methods, and the electronic device is in an optimal operating state by matching with the rapid frequency reduction and slow frequency increase methods, so that the electronic device can maintain the optimal performance effectively.
Drawings
Fig. 1 is a block diagram of an electronic device according to an embodiment of the present disclosure.
Fig. 2 is a flow chart of a performance management method according to an embodiment of the present disclosure.
FIG. 3 is a graph illustrating the frequency versus temperature of operation according to an embodiment of the present disclosure.
Fig. 4 is a graph illustrating the frequency versus temperature of operation according to another embodiment of the present disclosure.
Fig. 5 is a graph illustrating the frequency versus temperature of operation according to yet another embodiment of the present disclosure.
Detailed Description
The performance management method provided by the scheme is used for an electronic device with a system processor, and the system processor is subjected to frequency up-conversion or frequency down-conversion processing by utilizing software of the control module so as to maintain the electronic device in an optimal working state.
Fig. 1 is a block diagram of an electronic device according to an embodiment of the present invention, referring to fig. 1, an electronic device 10 includes a temperature sensor 12, a control module 14 and a system processor 16, and in this embodiment, a Central Processing Unit (CPU) 18 includes the control module 14 and the system processor 16. The temperature sensor 12 is used for sensing the temperature of the electronic device 10, especially the high temperature generated during the operation of the system processor 16. The system processor 16 has an operating frequency. The control module 14 is electrically connected to the temperature sensor 12 and the system processor 16, and the control module 14 continuously receives the temperature sensed by the temperature sensor 12 and determines a corresponding mode according to the temperature change, wherein a first temperature setting value and a second temperature setting value are set in advance in the control module 14, and the second temperature setting value is greater than the first temperature setting value. When the temperature sensed by the temperature sensor 12 is not greater than the first temperature set point, the control module 14 initiates an up-conversion process to the system processor 16. When the temperature is greater than the first temperature set point and not greater than the second temperature set point, the control module 14 initiates a first down conversion process to the system processor 16. When the temperature is greater than the first temperature set point and the second temperature set point, the control module 14 initiates a second down-conversion process or shuts down the system processor 16.
In an embodiment, before the control module 14 turns off the system processor 16, the control module 14 determines whether the operating frequency of the system processor 16 is the lowest value, and when the operating frequency of the system processor 16 is not the lowest value, the control module 14 starts the second down-conversion procedure, and when the operating frequency of the system processor 16 is the lowest value, the control module 14 turns off the system processor 16 to avoid the system processor 16 from being turned on or damaged due to the excessively high temperature.
In one embodiment, the electronic device 10 is a system on a chip (SOC) such that the temperature sensor 12, the central processor 18 (the control module 14 and the system processor 16), etc. are integrated in the SOC.
In one embodiment, the first temperature set point may be set to 100 ℃, and the second temperature set point may be set to 120 ℃, but not limited thereto.
Fig. 2 is a flow chart of a performance management method according to an embodiment of the present disclosure. Referring to fig. 1 and 2, the performance management method includes steps S10 to S26, and the steps S12 to S26 are performed by the software of the control module 14 in the cpu 18. First, as shown in step S10, the temperature sensor 12 continuously senses the temperature of the electronic device 10 and transmits the sensed temperature to the control module 14.
After receiving the temperature sensed by the temperature sensor 12, the control module 14 determines whether the temperature is greater than a first temperature set point, and when the temperature is not greater than the first temperature set point, the control module 14 starts an up-conversion process for the system processor 16 (steps S14 and S16). When the temperature is greater than the first temperature set point, the next step S18 is performed. In one embodiment, the control module 14 periodically determines whether the temperature is greater than the first temperature set point according to a period of time (e.g., 250 ms) so as to perform the frequency up process or step S18.
When the temperature is not greater than the first temperature set point and the frequency up process is started, as shown in step S14, the control module 14 confirms whether the operating frequency of the system processor 16 is the highest value, and when the operating frequency of the system processor 16 is the highest value, the control module 14 resumes the step of determining whether the temperature is greater than the first temperature set point (step S12). When the control module 14 confirms that the operating frequency of the system processor 16 is not the highest value, the next step S16 is performed. In step S16, the control module 14 increases the operating frequency by a frequency value according to a first time interval to the system processor 16, and then the control module 14 resumes the step of determining whether the temperature is greater than the first temperature set point (step S12). In one embodiment, the first time interval is 1 second, and when the control module 14 determines that the temperature is not greater than the first temperature set point and the operating frequency of the system processor 16 is not the highest value, the control module 14 waits for the first time interval of 1 second before increasing the operating frequency of the system processor 16 by a frequency value. If the control module 14 repeatedly confirms that the temperature is not greater than the first temperature set point and the operating frequency of the system processor 16 is not the highest value, the control module 14 increases the operating frequency of the system processor 16 by a frequency value every 1 second of the first time interval until the control module 14 determines other steps.
When the temperature is greater than the first temperature set point, the control module 14 continues to determine whether the temperature is greater than the second temperature set point as shown in step S18. When the temperature is greater than the first temperature set point and the temperature is not greater than the second temperature set point, as shown in step S20, the control module 14 starts a first down-conversion process for the system processor 16. When the temperature is greater than the second temperature set point, step S22 is performed to further determine whether to start the second down-conversion process or to shut down the system processor 16.
In step S20, the first down-conversion procedure further includes the control module 14 down-converting the system processor 16 to decrease the operating frequency of the system processor 16 by a frequency value. In an embodiment, if the first down-conversion procedure is started more than twice, a second time interval is spaced between the starting times of two adjacent first down-conversion procedures, wherein the second time interval is smaller than the first time interval, and the second time interval is equal to the cycle time. For example, when the second time interval is 250 milliseconds (ms), the control module 14 decreases the operating frequency of the system processor 16 by a frequency value every 250ms when the temperature is greater than the first temperature set point and less than the second temperature set point until the control module 14 determines other steps.
When the control module 14 determines that the temperature is greater than the second temperature set point, as shown in step S22, the control module 14 further determines whether the operating frequency of the system processor 16 is the lowest value, and when the operating frequency of the system processor 16 is not the lowest value, as shown in step S24, the control module 14 starts a second frequency down-conversion procedure for the system processor 16 to enable the control module 14 to down-convert the operating frequency of the system processor 16 to directly lower the operating frequency of the system processor 16 to the lowest value, and then the control module 14 resumes the step of determining whether the temperature is greater than the first temperature set point (returning to step S12) to further determine whether the temperature of the electronic device 10 is reduced. When the operating frequency of the system processor 16 is already at the minimum value, the control module 14 may directly shut down the system processor 16 as shown in step S26 to avoid the system processor 16 from being powered on or damaged due to an excessive temperature.
In one embodiment, when the control module 14 determines that the temperature is greater than the second temperature set point in step S18, the performance management method may omit step S22 and step S24, and directly proceed to step S26 to shut down the system processor 16.
Fig. 3 is a graph illustrating the working frequency versus temperature according to an embodiment of the present invention, please refer to fig. 1 and 3, at a time point t 1 When the temperature is higher than the first temperature set point and not higher than the second temperature set point, the control module 14 decreases the operating frequency of the system processor 16 by a frequency value, and after 250ms (second time interval), at time t 2 The operating frequency of the system processor 16 is reduced by a frequency magnitude and it is always determined whether the temperature is above the first temperature set point, so at time t 1 、t 2 、t 3 、t 4 T 5 The frequency is reduced every 250ms to the lowest value of the operating frequency. At time point t 6 At this time, the temperature begins to change below the first temperature set point, so the control module 14 will wait for 1s (first time interval) before increasing the operating frequency of the system processor 16 by a frequency magnitude, and at time t 7 、t 8 、t 9 、t 10 、t 11 The temperature is maintained below the first temperature set point, so that the operating frequency of the system processor 16 is gradually increased by a frequency amount every 1s until the maximum value of the operating frequency (at time t 6 After that, none of the temperatures is higher than the first temperature set point).
Fig. 4 is a schematic diagram showing a curve between the operating frequency and the temperature according to another embodiment of the present disclosure, referring to fig. 1 and fig. 4, when the temperature is less than the first temperature set point, in the process of waiting for the first time interval to increase the frequency, determining whether the temperature is higher than the first temperature set point according to the cycle time, and if yes, performing the frequency-reducing. Thus, at time t 1 While the temperature is less than the first temperature set point, wait for 1During s (first time interval), the temperature has changed only after 250ms (cycle time), at time point t 2 Has been higher than the first temperature set point (not higher than the second temperature set point), at a time point t 2 The control module 14 directly decreases the operating frequency of the system processor 16 by a frequency amount, and at a time point t, every 250ms (second time interval) passes 3 、t 4 The temperature of the system processor 16 is still above the first temperature set point, so that the operating frequency of the system processor 16 is progressively reduced by a frequency magnitude and a determination is made as to whether the temperature is above the first temperature set point. At time point t 5 At this point, the temperature begins to transition below the first temperature set point, so the control module 14 will wait for 1s (the first time interval) before increasing the operating frequency of the system processor 16 by a frequency magnitude, and since at time t 6 、t 7 、t 8 The temperature is maintained below the first temperature set point, so that the operating frequency of the system processor 16 is increased by a frequency value every 1s until the highest value of the operating frequency (at time t 5 After that, none of the temperatures is higher than the first temperature set point).
Fig. 5 is a graph showing the relationship between the operating frequency and the temperature according to still another embodiment of the present invention, please refer to fig. 1 and 5, at a time point t 1 When the temperature is higher than the first temperature set point and not higher than the second temperature set point, the control module 14 decreases the operating frequency of the system processor 16 by a frequency value, and after 250ms (second time interval), at a time point t 2 The operating frequency of the system processor 16 is reduced by a frequency magnitude and it is always determined whether the temperature is above the first temperature set point, so at time t 1 、t 2 、t 3 、t 4 T 5 The frequency is reduced every 250 ms. At time point t 6 At this time, the temperature begins to change below the first temperature set point, so the control module 14 waits for 1s (first time interval) before increasing the operating frequency of the system processor 16 by a frequency magnitude, and at time t 7 、t 8 、t 9 At the time, byThe operating frequency of the system processor 16 gradually increases by a frequency value every 1s while the temperature remains below the first temperature set point, but does not increase to the highest value of the operating frequency at time t 10 、t 11 The temperature is higher than the first temperature set value, so that the working frequency is gradually reduced, at a time point t 12 The temperature is again below the first temperature set point, so the control module 14 will again raise the operating frequency, and so on. At time point t 13 ～t 20 During this time, the system processor 16 is maintained to operate at the operating frequency above and below the first temperature set point by the frequency adjustment of the control module 14, so that the maximum performance of the system processor 16 at the time can be achieved.
When the temperature of the electronic device 10 is too high, the system processor 16 is safely used by using the fast frequency-reducing method, and the efficiency of the system processor 16 is achieved by slowly increasing the frequency when the temperature does not reach the first temperature set value. The control module 14 uses the first temperature setting to set the high threshold temperature so that the system processor 16 does not go above the first temperature setting and if the first temperature setting is exceeded, the system processor is down-converted to achieve the effect of reducing the temperature. If the temperature is not decreasing or is increasing, the control module 14 may determine to shut down the system processor 16 based on the second temperature set point.
Therefore, when the temperature of the electronic device is too high and the temperature needs to be reduced by adjusting the frequency, the working frequency of the system processor is adjusted by utilizing a gradual frequency reduction and frequency increase mode, and the electronic device is in an optimal working state by matching with a rapid frequency reduction and slow increase mode, so that the electronic device can maintain optimal efficiency effectively.
The embodiments described hereinabove are merely illustrative of the principles and features of the present invention, which will be apparent to those skilled in the art and may be practiced in other embodiments that depart from the spirit and scope of the invention, which is also susceptible to various modifications and equivalent arrangements.
[ symbolic description ]
10. Electronic device
12. Temperature sensor
14. Control module
16. System processor
18. Central processing unit
S10 to S26 steps
t 1 ～t 20 Time point
Claims (7)
1. A performance management method for an electronic device having a system processor, the performance management method comprising:
sensing a temperature of the electronic device;
judging whether the temperature is greater than a first temperature set value;
when the temperature is not greater than the first temperature set value, starting an up-conversion program;
when the temperature is greater than the first temperature set value, judging whether the temperature is greater than a second temperature set value, wherein the second temperature set value is greater than the first temperature set value;
when the temperature is greater than the first temperature set value and the temperature is not greater than the second temperature set value, a first frequency reducing program is started; and
when the temperature is greater than the second temperature set point, a second down-conversion procedure is started or the system processor is shut down,
wherein the up-conversion process further comprises:
judging whether the working frequency of the system processor is the highest value; and
when the operating frequency is not the highest value, the system processor is up-converted according to a first time interval to increase the operating frequency by a frequency magnitude,
when the first down-conversion procedure is started more than twice, a second time interval is arranged between the starting time of two adjacent first down-conversion procedures, wherein the second time interval is smaller than the first time interval.
2. The performance management method according to claim 1, wherein the first down-conversion procedure further comprises: the system processor is down-converted to decrease the operating frequency by the frequency magnitude.
3. The performance management method of claim 1, further comprising:
when the temperature is greater than the second temperature set value, judging whether the working frequency of the system processor is a minimum value;
when the operating frequency of the system processor is not the minimum value, starting the second down-conversion procedure; and
and when the working frequency of the system processor is the lowest value, the system processor is turned off.
4. The performance management method according to claim 3, wherein the second down-conversion procedure further comprises: the system processor is down-converted to reduce the operating frequency of the system processor to the minimum value.
5. The method of claim 1, wherein determining whether the temperature is greater than the first temperature setting is performed periodically according to a period of time, the period of time being equal to the second time interval.
6. The method of claim 1, wherein the electronic device is a system-on-a-chip.
7. An electronic device, comprising:
a temperature sensor for sensing a temperature;
a system processor having an operating frequency; and
a control module, which is electrically connected with the temperature sensor and the system processor, and starts an up-conversion program to the system processor when the temperature is smaller than a first temperature set value, starts a first down-conversion program to the system processor when the temperature is larger than the first temperature set value and not larger than a second temperature set value, wherein the second temperature set value is larger than the first temperature set value, starts a second down-conversion program or closes the system processor when the temperature is larger than the second temperature set value,
wherein the up-conversion process further comprises: the control module judges whether the working frequency of the system processor is a highest value, when the working frequency is not the highest value, the control module carries out frequency raising on the system processor according to a first time interval so as to raise the working frequency by a frequency magnitude,
when the first down-conversion procedure is started more than twice, a second time interval is arranged between the starting time of two adjacent first down-conversion procedures, wherein the second time interval is smaller than the first time interval.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911310380.8A CN113009998B (en) | 2019-12-18 | 2019-12-18 | Efficiency management method and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911310380.8A CN113009998B (en) | 2019-12-18 | 2019-12-18 | Efficiency management method and electronic device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113009998A CN113009998A (en) | 2021-06-22 |
| CN113009998B true CN113009998B (en) | 2024-01-26 |
Family
ID=76381151
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911310380.8A Active CN113009998B (en) | 2019-12-18 | 2019-12-18 | Efficiency management method and electronic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113009998B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101101504A (en) * | 2007-08-16 | 2008-01-09 | 中国科学院计算技术研究所 | Processor and its frequency-reducing device and method |
| JP2010097257A (en) * | 2008-10-14 | 2010-04-30 | Nec Corp | Processor control system, method, and program |
| CN103677192A (en) * | 2012-09-12 | 2014-03-26 | 宏达国际电子股份有限公司 | Electronic device with power management mechanism and power management method thereof |
| CN107153592A (en) * | 2016-03-02 | 2017-09-12 | 神讯电脑(昆山)有限公司 | Electronic installation and its power management method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7461272B2 (en) * | 2004-12-21 | 2008-12-02 | Intel Corporation | Device, system and method of thermal control |
| KR20170069730A (en) * | 2015-12-11 | 2017-06-21 | 삼성전자주식회사 | Operation processor device managing operations of cores according to temperature and spatial position, and electronic device including the operation processor device |
-
2019
- 2019-12-18 CN CN201911310380.8A patent/CN113009998B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101101504A (en) * | 2007-08-16 | 2008-01-09 | 中国科学院计算技术研究所 | Processor and its frequency-reducing device and method |
| JP2010097257A (en) * | 2008-10-14 | 2010-04-30 | Nec Corp | Processor control system, method, and program |
| CN103677192A (en) * | 2012-09-12 | 2014-03-26 | 宏达国际电子股份有限公司 | Electronic device with power management mechanism and power management method thereof |
| CN107153592A (en) * | 2016-03-02 | 2017-09-12 | 神讯电脑(昆山)有限公司 | Electronic installation and its power management method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113009998A (en) | 2021-06-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8495397B2 (en) | Computer system capable of adjusting operating frequency dynamically | |
| EP2278432B1 (en) | Adaptive temperature dependent feedback clock control system and method | |
| EP0699992A1 (en) | Heuristic clock speed optimizing mechanism and computer system employing same | |
| US7591433B2 (en) | Method for controlling fan speed | |
| US20070124609A1 (en) | System and method for controlling cpu overclocking | |
| TWI399635B (en) | Thermal protection method and related system for a computer system | |
| TWI634415B (en) | Chip aware thermal policy | |
| US7165183B2 (en) | Temperature controlled semiconductor circuit | |
| CN104808717A (en) | Temperature control method and temperature control device | |
| US20210382803A1 (en) | Method for regulating chip temperature | |
| CN113009998B (en) | Efficiency management method and electronic device | |
| US10114432B2 (en) | Thermal control system and thermal control method for electronic device | |
| US11231759B2 (en) | Power performance management method and electronic device | |
| US20060117205A1 (en) | Data processing device with cooling fan | |
| CN104836571A (en) | Clock pulse adjusting device and clock pulse adjusting method | |
| CN114546090B (en) | Adaptive voltage frequency adjustment method and device | |
| JP2010225111A (en) | Electronic apparatus | |
| CN107678986B (en) | USB3.0 transmission rate setting method, mobile terminal and storage medium | |
| TW201012189A (en) | Reciprocal wake-up system for handheld devices with insert type wireless communication module and a method therefore | |
| US10491006B2 (en) | Hand-held apparatus and method for power charging management thereof | |
| JPH11272365A (en) | Speed control system for cooling fan and electronic instrument | |
| CN101377755A (en) | Mainboard, computer system and multiple monitoring method thereof | |
| WO2024050185A1 (en) | Stepped clocking frequency mode for integrated circuit components | |
| CN115328248A (en) | Voltage self-adaptive adjusting method and device of integrated circuit and electronic equipment | |
| CN113589864A (en) | Temperature control method of energy controller |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |