CN113009854A - Device for obtaining effective value of analog input signal - Google Patents

Device for obtaining effective value of analog input signal Download PDF

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Publication number
CN113009854A
CN113009854A CN201911317237.1A CN201911317237A CN113009854A CN 113009854 A CN113009854 A CN 113009854A CN 201911317237 A CN201911317237 A CN 201911317237A CN 113009854 A CN113009854 A CN 113009854A
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China
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signal
circuit
analog input
triangular wave
input signal
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CN201911317237.1A
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CN113009854B (en
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李金宝
蒋纯纲
王术青
周宇峰
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Johnson Controls Air Conditioning and Refrigeration Wuxi Co Ltd
Johnson Controls Technology Co
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Johnson Controls Air Conditioning and Refrigeration Wuxi Co Ltd
Johnson Controls Technology Co
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423—Input/output
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/21—Pc I-O input output
    • G05B2219/21119—Circuit for signal adaption, voltage level shift, filter noise

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

The application provides a circuit for calculating an effective value of an analog input signal, comprising: the integrating circuit is used for receiving the analog input signal, integrating the analog input signal and converting the analog input signal into a triangular wave signal; the triangular wave detection circuit is used for indicating a high point and a low point of a triangular wave signal, wherein when the triangular wave signal is between the high point and the low point in a falling edge stage, the integrating circuit discharges with a first discharging slope along the falling edge, and when the triangular wave signal is lower than the low point in the falling edge stage, the integrating circuit discharges with a second discharging slope along the falling edge, and the second discharging slope is more gentle than the first discharging slope; and a discharge time counting means for counting at a falling edge stage of the triangular wave signal, wherein the count of the discharge time counting means is used to obtain an effective value of the analog input signal. Since the discharge is performed with the second slope being more gentle, the counting time is extended, thereby improving the accuracy of the time statistics, and thus improving the accuracy of calculating the effective value of the analog signal.

Description

Device for obtaining effective value of analog input signal
Technical Field
The present application relates to an apparatus, and more particularly, to an apparatus for obtaining an effective value of an analog input signal.
Background
In a control system, the effective value of the input analog signal may be used to control various devices in the system (e.g., various devices in a building), exemplary controlled devices including air conditioning systems, valves, fans, actuators, pumps. Therefore, it is very important to obtain the effective value of the input analog signal quickly, accurately, and economically.
Disclosure of Invention
The present application includes a circuit for calculating an effective value of an analog input signal, comprising: an integration circuit that receives an analog input signal and integrates the analog input signal such that the received analog input signal is converted into a plurality of triangular wave signals, wherein each triangular wave signal has a rising edge and a falling edge, and the integration circuit includes a variable resistance circuit, wherein the variable resistance circuit provides the integration circuit with a first discharge resistance having a first resistance value and a second discharge resistance having a second resistance value; a triangular wave detection circuit for generating a high point signal indicating a high point of the triangular wave signal generated by the integration circuit and a low point signal indicating a low point of the triangular wave signal, wherein the first discharge resistance in the integration circuit is connected when the voltage of the triangular wave signal is between the high point and the low point in a falling edge stage, and the second discharge resistor in the integration circuit is turned off to cause the integration circuit to discharge with a first discharge slope along the falling edge, wherein the second discharge resistance in the integration circuit is turned on when the voltage of the triangular wave signal is lower than the low point in a falling edge stage, and the first discharge resistor in the integration circuit is disconnected to cause the integration circuit to discharge along the falling edge with a second discharge slope, the second discharge slope being gentler than the first discharge slope; and a discharge time counting means for counting at a falling edge stage of the triangular wave signal, wherein the count of the discharge time counting means is used to obtain an effective value of the analog input signal.
According to the above, the triangular wave detection circuit is further configured to generate a count period indication signal for starting/stopping the discharge time counting means.
According to the above, the circuit of the present application further includes: and the control device receives the high-point signal and the low-point signal generated by the triangular wave detection circuit and controls the first discharge resistor or the second discharge resistor in the variable resistance circuit to be switched on and off according to the received high-point signal and low-point signal.
According to the above, the discharge time counting device can generate a first counting frequency and a second counting frequency, the first counting frequency corresponds to the first discharge slope, the second counting frequency corresponds to the second discharge slope, and the discharge time counting device counts at the first counting frequency or the second counting frequency in the falling edge stage of the triangular wave signal.
According to the above, the control device receives the counting cycle indication signal generated by the triangular wave detection circuit, and controls the discharge time counting device to count at the first counting frequency or the second counting frequency according to the received high point signal, low point signal and counting cycle indication signal.
According to the above, the discharge time counting device can generate a single counting frequency, and the discharge time counting device counts at the single counting frequency in the falling edge stage of the triangular wave signal.
According to the above, the control device receives the counting period indication signal generated by the triangular wave detection circuit, and controls the discharge time counting device to count at the single counting frequency according to the received high point signal, low point signal and counting period indication signal.
According to the above, the circuit of the present application further includes: an input signal detection circuit for generating an analog input signal indication signal indicative of the presence of an analog input signal; and a charge and discharge time counting means for counting the entire period of the triangular wave signal based on the count period indication signal generated by the triangular wave detection circuit and the analog input signal indication signal, wherein the count of the charge and discharge time counting means and the count of the charge and discharge time counting means are used to obtain an effective value of the analog input signal.
According to the above, the circuit of the present application further includes: a pre-processing circuit for pre-processing a received analog input signal to reduce noise and distortion of the analog input signal.
According to the above, the preprocessing circuit includes a voltage follower circuit and a voltage bias circuit.
According to the above, the circuit of the present application further includes: and the micro control unit MCU is used for obtaining the effective value of the analog input signal according to the counting of the charging time counting device and the counting of the charging and discharging time counting device.
Drawings
The features and advantages of the present application may be better understood by reading the following detailed description with reference to the drawings, in which like characters represent like parts throughout the drawings, wherein:
FIG. 1A shows a system block diagram of one embodiment of a circuit for calculating an effective value of an analog input signal of the present application.
FIG. 1B shows a system block diagram of another embodiment of the circuit for calculating a valid value of an analog input signal of the present application.
Fig. 2A (including fig. 2A (i) and 2A (ii)) shows a detailed circuit structure diagram of each module in the system block diagram 1A of the embodiment of the circuit for calculating an effective value of an analog input signal according to the present application.
Fig. 2B shows a specific circuit structure diagram of each module in the system block diagram 1B according to the embodiment of the circuit for calculating an effective value of an analog input signal.
Fig. 3 shows a specific circuit configuration diagram of an embodiment of the circuit for calculating an effective value of an analog input signal according to the present application, and fig. 2a (ii) shows a specific circuit configuration diagram of the control device 130.
Fig. 4A shows a schematic internal structural block diagram of a Micro Control Unit (MCU)134 in a system block diagram 1A according to an embodiment of the present application.
Fig. 4B shows a schematic internal structural block diagram of the Micro Control Unit (MCU)134 in the system block diagram 1B according to the embodiment of the present application.
Fig. 5 shows a timing chart of the triangular wave signal generated by the triangular wave detection circuit 124 during counting in the circuit for calculating the effective value of the analog input signal according to the present application, corresponding to each control signal.
Detailed Description
Various embodiments of the present application will now be described with reference to the accompanying drawings, which form a part hereof. It should be understood that wherever possible, the same or similar reference numbers used in the present application refer to the same or like parts.
Fig. 1A and 1B show system block diagrams of two embodiments of the circuit for calculating an effective value of an analog input signal of the present application, respectively.
As shown in fig. 1A, the circuit 100 for calculating the effective value of an analog input signal comprises: a preprocessing circuit 122, an integrating circuit 124, a triangular wave detection circuit 126, an input signal detection circuit 128, a control device 130, a counting device 132, and a Micro Control Unit (MCU) 134. The functions of the respective modules and the connection and fitting relationship between the respective modules will be described below with reference to fig. 1A.
The preprocessing circuit 122 in fig. 1A includes a voltage follower circuit 122.1 and a voltage bias circuit 122.2. The preprocessing circuit 122 includes an input and an output. The input terminal of the preprocessing circuit 122 is connected to the input terminal of the voltage follower circuit 122.1 through a connection line 121, the output terminal of the voltage follower circuit 122.1 is connected to the input terminal of the voltage bias circuit 122.2 through a connection line 141, the output terminal of the voltage bias circuit 122.2 outputs the preprocessed analog input signal to the input terminal of the integrating circuit 124 through a connection line 123, outputs the preprocessed analog input signal to the input terminal of the triangular wave detection circuit 126 through a connection line 127, and outputs the preprocessed analog input signal to the input terminal of the input signal detection circuit 128 through a connection line 129. The pre-processing circuit 122 functions to pre-process the received analog input signal to reduce noise and distortion of the analog input signal.
The function of the integrator circuit 124 in fig. 1A is to convert the received preprocessed analog input signal into a plurality of triangular wave signals, wherein each triangular wave signal generated by integration has a rising edge and a falling edge. To control the change in the falling edge slope, the integrating circuit 124 includes a variable resistor circuit 124.1, and the variable resistor circuit 124.1 includes a first discharge resistor having a first resistance value and a second discharge resistor having a second resistance value. The integrating circuit 124 has an input terminal, an output terminal, and first and second control terminals. An input of the integrating circuit 124 is connected to an output of the preprocessing circuit 122 via a line connection 123 for receiving the analog input signal processed by the preprocessing circuit 122. An output terminal of the integrating circuit 124 is connected to an input terminal of the triangular wave detecting circuit 126 through a connection line 125, for outputting the generated triangular wave signal to the triangular wave detecting circuit 126. A first control terminal of the integrating circuit 124 is connected to an output terminal of the control means 130 via a connection 135.1 for controlling the switching on and off of the first discharge resistor in the variable resistor circuit 124.1. A second control terminal of the integrating circuit 124 is connected to the output terminal of the control means 130 via a connection 135.2 for controlling the switching on and off of the second discharge resistor in the variable resistor circuit 124.1. The first and second discharge resistors in the variable resistor circuit 124.1 are used for discharging of the integration circuit 124, and when the first discharge resistor is selected to be turned on, the integration circuit 124 discharges with a first discharge slope, and when the second discharge resistor is selected to be turned on, the integration circuit 124 discharges with a second discharge slope. Since the resistance of the second discharge resistor is larger than that of the first discharge resistor, the second discharge slope in the integration circuit 124 is gentler than the first discharge slope.
The input signal detection circuit 128 in fig. 1A includes an input terminal and an output terminal. An input terminal of the input signal detection circuit 128 is connected to an output terminal of the preprocessing circuit 122 through a connection line 131, and an output terminal of the input signal detection circuit 128 is connected to an input terminal of the control device 130 through a connection line 133. The input signal detection circuit 128 functions to: an analog input signal indication signal (U) is generated from the received analog input signal indicating the continued presence of the analog input signal, and the analog input signal indication signal (U) is also generated to indicate the falling edge of the last triangular wave in the triangular wave signal.
The triangular wave detection circuit 126 in fig. 1A has two input terminals and three output terminals, including: the device comprises a triangular wave signal input end, an analog signal input end, an HI signal output end, an LO signal output end and a Z signal output end. A triangular wave signal input terminal of the triangular wave detection circuit 126 receives a triangular wave signal from the integration circuit 124 through a connection line 125; the analog signal input receives the preprocessed analog input signal from the preprocessing circuit 122 via connection 127; the HI, LO and Z signal outputs are each connected to three different inputs of the control device 130 via connection lines 129.1, 129.2 and 129.3. The triangular wave detection circuit 126 functions to: the HI signal, the LO signal, and the Z signal are generated based on the received triangular wave signal and the analog input signal. In one embodiment, the discharge time counter 132.1 is first used to perform the first type of counting during the first and second falling edge phases of all triangular waves generated by the integrator circuit 124, while the charge-discharge time counter 132.2 is used to perform the second type of counting during the rising and falling edge phases of all triangular waves generated by the integrator circuit 124. It should be noted that the discharge time counter 132.1 and the charge-discharge time counter 132.2 in the counter 132 count in the duration period of the triangular wave signal. The HI signal generated by the triangular wave detection circuit 126 is used to indicate the high point of the triangular wave signal generated by the integration circuit 124, the LO signal is used to indicate the low point of the triangular wave signal generated by the integration circuit 124, and the Z signal is used to indicate the count period for the entire duration of the triangular wave. Meanwhile, as described above, the U signal generated by the input signal detection circuit 128 is used to indicate the last falling edge stage of the triangular wave. Wherein, the time between the HI signal and the LO signal corresponds to a first falling edge stage of the triangular wave signal; the U signal (generated by the input signal detection circuit 128) and the LO signal together indicate the start of the second falling edge of the triangular wave signal, and the Z signal indicates the end of the second falling edge, i.e., the end of counting the triangular wave signal. Therefore, the discharge time counter 132.1 counts the triangular wave signal at the first counting frequency in the first falling edge phase and counts the triangular wave signal at the second counting frequency in the second falling edge phase; the charge-discharge counting device 132.2 counts at a third counting frequency over the entire duration of the triangular wave signal.
The control device 130 in fig. 1A has four inputs and five outputs. The four inputs include: a HI signal input terminal, a LO signal input terminal, a Z signal input terminal and a U signal input terminal; the five outputs include: the circuit comprises a first resistor control signal output end, a second resistor control signal output end, a rough counting control signal output end, a fine counting control signal output end and a total counting control signal output end. The HI signal input terminal, the LO signal input terminal and the Z signal input terminal of the control device 130 are respectively connected to the HI signal output terminal, the LO signal output terminal and the Z signal output terminal of the triangular wave detection circuit 126 through connection lines 129.1, 129.2 and 129.3; the U signal input of the control device 130 is connected to the output of the input signal detection circuit 128 via a connection line 133; the first resistance control signal output terminal and the second resistance control signal output terminal of the control device 130 are connected to the first control terminal and the second control terminal of the integration circuit 124 through connection lines 135.1 and 135.2, respectively; the coarse count control signal output, the fine count control signal output and the total count control signal output of the control device 130 are connected to three different inputs of the counting device 132 via connecting lines 137.1, 137.2 and 137.3, respectively. The functions of the control device 130 are: generating a first resistance control signal for controlling the on-off of a first discharge resistance in the variable resistance circuit 124.1 according to the received HI signal, LO signal and U signal; generating a second resistance control signal for controlling the on-off of a second discharge resistance in the variable resistance circuit 124.1 according to the received LO signal, U signal and Z signal; generating a coarse count control signal for controlling the discharge time counting means 132.1 to count at a first count frequency based on the received U signal and Z signal; generating a fine count control signal for controlling the discharge time counting means 132.1 to count at the second count frequency based on the HI signal, the LO signal, the U signal and the Z signal; and generating a total count control signal for controlling the charge-discharge time counting means 132.2 to count at the third counting frequency, based on the HI signal, the LO signal, the U signal and the Z signal.
The counting device 132 in fig. 1A includes a discharge time counting device 132.1 and a charge-discharge time counting device 132.2. In the embodiment of the application, the discharge time counting means 132.1 is a variable frequency counting means responsive to the control signal, i.e. it is capable of counting at two different counting frequencies under control of the control signal. Of course, it will be understood by those skilled in the art that the discharge time counting device 132.1 may also include two counters with different frequencies, and the counting function of the variable frequency counting device 132.1 in the present embodiment is realized by selectively starting and stopping the two separate counters. The counting device 132 has three inputs and three outputs. The three inputs include: a coarse count control signal input terminal, a fine count control signal input terminal and a total count control signal input terminal; the three outputs include: a coarse count number output terminal, a fine count number output terminal, and a total count number output terminal. Wherein, the rough count control signal input terminal and the fine count control signal input terminal of the counting device 132 are respectively connected to the rough count control signal output terminal and the fine count control signal output terminal of the control device 130 through connection lines 137.1 and 137.2; the total count control signal input end of the counting device 132 is connected to the total count control signal output end of the control device 130 through a connection line 137.3; the output end of the coarse count number, the output end of the fine count number and the output end of the total count number of the counting device 132 are respectively connected to the input end of the micro control unit MCU134 through connection lines 139.1, 139.2 and 139.3. The functions of the counting device 132 are: according to the received rough count control signal, the fine count control signal and the total count control signal, the discharge time counting device 132.1 is controlled to count at a first counting frequency in a first falling edge stage of the triangular wave signal, the discharge time counting device 132.1 is controlled to count at a second counting frequency in a second falling edge stage of the triangular wave signal, and the charge and discharge time counting device 132.2 is controlled to count at a third counting frequency in the whole counting period of the triangular wave signal.
It should be understood by those skilled in the art that the first counting frequency and the second counting frequency in the variable frequency counting device 132.1 in the present embodiment may be the same, and the counting device 132.1 with a single frequency can also achieve the technical effects of the present application.
The MCU134 in fig. 1A includes three inputs for receiving three parameters output from the counting device 132 via connections 139.1, 139.2 and 139.3, respectively, including: the number of rough counts N1, the number of fine counts N2, and the total number of counts N3, and an effective value of the analog input signal is obtained from these three parameters. Specifically, since the analog input signal is a gentle analog signal, the integrator circuit 124 outputs a triangular wave signal including a plurality of continuous triangular waves by the integrator circuit 124 through charge and discharge under the control of the first and second resistance selection signals. The rising phase of each triangular wave corresponds to the charging phase of the integrating circuit 124, and the falling phase of the triangular wave corresponds to the discharging phase of the integrating circuit 124. According to the charge and discharge charge balance principle, the functional relation between the voltage effective value of the analog input signal and the charge and discharge time can be obtained. Therefore, the effective voltage value of the analog input signal can be calculated by counting the charging and discharging time and then substituting the charging and discharging time into the corresponding functional expression. In the present application, the charging and discharging times are recorded by counting with a clock of a certain frequency by means of the counting means 132. That is, after counting the number of counts by the counting device 132, the voltage effective value of the analog input signal can be calculated by substituting the counted number of counts and the frequency of the counting clock into a function. Therefore, the calculation accuracy of the effective voltage value of the analog input signal is determined by the counted number of counts. The higher the clock frequency, the more the number of counts, the higher the calculation accuracy. On the other hand, however, the calculation rate of the computer needs to be considered, because the greater the number of counts, the slower the calculation rate. Therefore, in the present application, the integrating circuit 124 has two different discharging processes, namely: a first discharge process controlled by a first resistance selection signal and a second discharge process controlled by a second resistance selection signal. The second discharge process is a final discharge stage of the last triangular wave in the triangular wave signal output from the integrator circuit 124, and discharges at a slower rate than the discharge rate of the first discharge process. Therefore, in the final discharging stage, the number counted by the counter is increased, and the counting result is more accurate. More preferably, a clock with a higher frequency may be used for counting, so that the result of counting is further more accurate.
FIG. 1B shows a system block diagram of another embodiment of the circuit for calculating a valid value of an analog input signal of the present application. As shown in fig. 1B, the circuit 100 for calculating the effective value of an analog input signal comprises: a preprocessing circuit 122, an integrating circuit 124, a triangle wave detection circuit 126, an input signal detection circuit 128, and a Micro Control Unit (MCU) 134. The functions of the respective modules and the connection and fitting relationship between the respective modules will be described below with reference to fig. 1B.
The functions and the connection and matching relationship of the preprocessing circuit 122, the integrating circuit 124, the triangular wave detecting circuit 126 and the input signal detecting circuit 128 in fig. 1B are the same as those of the corresponding blocks in fig. 1A, and are not described again here. Unlike in fig. 1A, the Micro Control Unit (MCU)134 in fig. 1B can have the functions of the control device 130, the counting device 132, and the Micro Control Unit (MCU)134 in fig. 1A, which can be implemented by the Micro Control Unit (MCU)134 in fig. 1B through software.
Specifically, the Micro Control Unit (MCU)134 in fig. 1B has four inputs and two outputs, the four inputs including: HI signal input end, LO signal input end, Z signal input end and U signal input end, two output ends include: a first resistance control signal output terminal and a second resistance control signal output terminal. Wherein, an HI signal input terminal, an LO signal input terminal and a Z signal input terminal of the Micro Control Unit (MCU)134 are respectively connected to an HI signal output terminal, an LO signal output terminal and a Z signal output terminal of the triangular wave detection circuit 126 through connection lines 129.1, 129.2 and 129.3; a U signal input terminal of a Micro Control Unit (MCU)134 is connected to an output terminal of the input signal detection circuit 128 through a connection line 133; a first resistance control signal output terminal and a second resistance control signal output terminal of the Micro Control Unit (MCU)134 are connected to a first control terminal and a second control terminal of the integrating circuit 124 through connection lines 135.1 and 135.2, respectively. Therein, the Micro Control Unit (MCU)134 comprises a processing unit 134.1 and a storage unit 134.2. The storage unit 134.2 is used for storing received data, generated intermediate data, programs and the like, the processing unit 134.1 is used for carrying out logical operation according to the data stored in the storage unit 134.2, so as to generate a control signal for controlling the on and off of the first and second discharge resistors in the variable resistor circuit 124.1 in the integrating circuit 124 and a control signal for counting, and the counted number of counts is stored in the storage unit 134.2. The processing unit 134.1 calculates the effective value of the analog input signal from the number of counts stored in the storage unit 134.2. According to the above structure, the processing unit 134.1 is able to execute the programs stored in the storage unit 134.2 to perform the following functions:
(1) generating a first resistance control signal for controlling the on-off of a first discharge resistance in the variable resistance circuit 124.1 according to the received HI signal, LO signal and U signal, and generating a second resistance control signal for controlling the on-off of a second discharge resistance in the variable resistance circuit 124.1 according to the received LO signal, U signal and Z signal;
(2) performing coarse counting at a first counting frequency according to the received U signal and Z signal, performing fine counting at a second counting frequency according to the HI signal, the LO signal, the U signal and the Z signal, and performing total counting at a third counting frequency according to the HI signal, the LO signal, the U signal and the Z signal; and
(3) and calculating the effective value of the analog input signal according to the counted number N1 of the coarse counts, the number N2 of the fine counts and the total number N3 of the counts.
Fig. 2A (including fig. 2A (i) and fig. 2A (ii)) shows a detailed circuit structure diagram of a system block diagram 1A of an embodiment of a circuit for calculating an effective value of an analog input signal according to the present application; fig. 2B shows a specific circuit structure diagram of the system block diagram 1B of the embodiment of the circuit for calculating an effective value of an analog input signal according to the present application. The structure and function of each module in fig. 1A and 1B will be described in detail below with reference to fig. 2a (i) and fig. 2a (ii) and fig. 2B.
The preprocessing circuit 122 in fig. 2a (i) includes a voltage follower circuit 122.1 and a voltage bias circuit 122.2. As depicted in fig. 1A, the voltage follower circuit 122.1 is used to isolate the front stage circuit (analog input signal) from the back stage circuit (voltage bias circuit 122.2), and the voltage bias circuit 122.2 is used to generate a bias voltage to improve the noise immunity of the input analog signal. Specifically, as shown in fig. 2a (i), the voltage follower circuit 122.1 comprises a first operational amplifier OA1, the forward terminal of the first operational amplifier OA1 being connected to the analog signal input terminal for receiving the analog input signal, and a resistor R1 being connected between the forward terminal and the ground terminal of the first operational amplifier OA1, the reverse terminal of the first operational amplifier OA1 being connected to the output terminal. Since the output terminal of the first operational amplifier OA1 is connected to the inverting terminal, the output voltage of the first operational amplifier OA1 is equal to the voltage of the analog input signal received at the inverting terminal, i.e. its gain is 1. Since the common integrated circuit has the characteristics of high input impedance and low output impedance, the first operational amplifier OA1 can perform the function of impedance matching, and the front-stage circuit and the rear-stage circuit of the first operational amplifier OA1 can not be affected by each other.
The voltage bias circuit 122.2 in fig. 2a (i) comprises a second operational amplifier OA2, the inverting terminal of the second operational amplifier OA2 is connected to the output terminal of the voltage follower circuit 122.1 via a resistor R2, a resistor R3 is connected between the reference supply and the inverting terminal of the second operational amplifier OA2, and the inverting terminal of the second operational amplifier OA2 is connected to the output terminal of the second operational amplifier OA2 via a resistor R4, and the forward terminal of the second operational amplifier OA2 is connected to ground via a resistor R5. Since the output voltage of the second operational amplifier OA2 is equal to-R4 (Vref/R3+ U0/R2) — (2.5V + Ui), that is, the second operational amplifier OA2 biases the input voltage to-2.5V, the noise immunity of the input analog signal is improved. In one embodiment, the reference power supply provides 5V, the resistance of the resistor R1 is 100K Ω, the resistance of the resistor R2 is 10K Ω, the resistance of the resistor R3 is 20K Ω, the resistance of the resistor R4 is 10K Ω, the resistance of the resistor R5 is 10K Ω, and the resistance of the resistor R6 is 10K Ω. The power supply and resistor may have other voltage and resistance values, as will be appreciated by those skilled in the art.
The integrating circuit 124 in fig. 2a (i) includes a third operational amplifier OA3, a capacitor C1, a diode D1, a resistor R7, a resistor R8, a switch B, and a switch C. A resistor R7 is connected in series with switch B, a resistor R8 is connected in series with switch C, and the two series circuits are connected in parallel between the reference supply and the inverting input of the third operational amplifier OA 3. The resistors R7, R8 and the switch B, C constitute a variable resistor circuit 124.1. A capacitor C1 and a diode D1 are connected in parallel between the inverting input and the output of the third operational amplifier OA 3. The non-inverting input of the third operational amplifier OA3 is connected to ground.
During the duration of the analog input signal, when the integrator circuit 124 starts operating, the switches B and C are both open, so that the first resistor R1 and the second resistor R2 are disconnected from the inverting terminal of the third operational amplifier OA3, at this time, the preprocessed analog input signal charges the capacitor C1, a rising edge of a triangular wave is generated, and when the rising edge of the triangular wave rises to a high point, the switch B is closed according to the first resistor control signal generated by the controller 130, so that the resistor R7 is connected to the inverting terminal of the third operational amplifier OA3, so that the resistor C1 discharges through the resistor R7 at a first discharge rate, generating a falling edge of the triangular wave. When the falling edge of the triangular wave falls to the low point, the switch B is turned off according to the first resistance control signal generated by the control device 130, so that the resistor R7 is disconnected from the inverting terminal of the third operational amplifier OA3, and the capacitor C1 is charged again by the analog input signal, generating the rising edge of the next triangular wave. The above process is repeated during the duration of the analog input signal, thereby generating a plurality of triangular waves in the triangular wave signal output from the integrating circuit 124. When the analog input signal disappears and when the falling edge of the last triangle wave in the triangle wave signals falls to the low point, the switch C is closed according to the second resistance control signal generated by the control device 130, so that the resistor R8 is connected to the inverting terminal of the third operational amplifier OA3, and thus the resistor C1 continues to discharge through the resistor R8 at the second discharge rate and then the low point of the falling edge of the last triangle wave until the discharge is completed, thereby forming the last falling edge of the last triangle wave. Therefore, the operation of the integrating circuit 124 ends for the duration of the analog input signal.
In the embodiment of fig. 2a (i), the reference power source provides 5V, the first discharge resistor R7 has a resistance of 10K Ω, the second discharge resistor R8 has a resistance of 1.28M Ω, and the capacitor C1 has a capacitance of 22 nF. When the capacitor C1 in the integrator circuit 124 discharges through the second discharge resistor R8, since the resistance of the second discharge resistor R8 is greater than that of the first discharge resistor R7, the slope of the last falling edge of the last triangle wave signal in the triangle wave signal is smaller than the slopes of the other falling edges of the triangle wave signal. The power supply, resistors and capacitors described above may have other voltage, resistance and capacitance values as will be appreciated by those skilled in the art.
The triangular wave detection circuit 126 in fig. 2a (i) comprises a first comparator circuit 126.1, a second comparator circuit 126.2 and a third comparator circuit 126.3. The first comparator circuit 126.1 functions to: comparing the amplitude of the triangular wave signal output from the integrating circuit 124 with a first preset voltage, thereby generating a high point signal (HI signal); the second comparator 126.2 functions to: comparing the amplitude of the triangular wave signal output from the integrating circuit 124 with a second preset voltage, thereby generating a low point signal (LO signal); the third comparator 126.3 functions to: the voltage amplitude of the triangular wave signal output from the integrating circuit 124 is compared with the third preset signal, thereby generating a count period indicating signal (Z signal). How to generate the above high-point signal (HI signal), low-point signal (LO signal), and count period indication signal (Z signal) is described below in conjunction with a specific circuit configuration.
The first comparator circuit 126.1 comprises an operational amplifier OA4 (fourth operational amplifier OA 4). A non-inverting input terminal of the fourth operational amplifier OA4 is connected to the output terminal of the integrating circuit 124 for receiving the triangular wave signal, and an inverting input terminal is connected between the voltage-dividing resistors R9 and R10, wherein the voltage-dividing resistors R9, R10 and R11 are sequentially connected in series between the reference power supply and the ground terminal. In operation, the fourth operational amplifier OA4 compares the voltage levels at the positive and negative inputs and generates a pulse signal when the voltage level of the triangular wave signal received at the positive input is greater than the reference voltage level at the negative input. As an example, the voltage of the reference power source is 5v, the resistance of the resistor R9 is 10k Ω, the resistance of the resistor R10 is 9.52k Ω, and the resistance of the resistor R11 is 480 Ω, so that the voltage at the inverting input terminal of the fourth operational amplifier OA4 is 2.5 v. When the voltage amplitude of the triangular wave signal received by the triangular wave detection circuit 126 is greater than 2.5v, the fourth operational amplifier OA4 outputs a high level pulse signal (HI signal) indicating that the rising edge of the triangular wave signal reaches the high point.
The second comparator circuit 126.2 comprises an operational amplifier OA5 (fifth operational amplifier OA 5). The non-inverting input terminal of the fifth operational amplifier OA5 is connected to the output terminal of the integrating circuit 124 for receiving the triangular wave signal, and the inverting input terminal is connected between the voltage dividing resistors R10 and R11. In operation, the fifth operational amplifier OA5 compares the voltage values at the positive input terminal and the negative input terminal and generates a pulse signal when the voltage value of the triangular wave signal received at the positive input terminal is less than the voltage value at the negative input terminal. As an example, the voltage at the inverting input terminal of the fifth operational amplifier OA5 is 0.12v due to the voltage division of the resistors R9, R10, and R11. When the voltage amplitude of the triangular wave signal received by the triangular wave detection circuit 126 is less than 0.12v, the fifth operational amplifier OA5 outputs a low level pulse signal (LO signal) indicating that the falling edge of the triangular wave signal reaches the low point.
The third comparator circuit 126.3 comprises two operational amplifiers OA6 and OA7 (sixth operational amplifier OA6, seventh operational amplifier OA 7). The non-inverting input terminal of the sixth operational amplifier OA6 is connected to the output terminal of the integrating circuit 124, and the inverting terminal of the sixth operational amplifier OA6 is connected to ground through a resistor R13 and to the output terminal of the sixth operational amplifier OA6 through a resistor R14. The output of the sixth operational amplifier OA6 is connected to the positive input of the seventh operational amplifier OA7 and to the output of the seventh operational amplifier via a resistor R15. The inverting terminal of the seventh operational amplifier is grounded. In operation, the sixth operational amplifier OA6 is a forward amplifier and the seventh operational amplifier OA7 is a comparator. When the integrating circuit is in the charging and discharging process, the voltage at the positive input terminal of the seventh operational amplifier OA7 is a positive voltage, and the seventh operational amplifier OA7 outputs a high-level count period indication signal (Z signal); when the charging and discharging process of the integration circuit is finished, the voltage at the positive input terminal of the seventh operational amplifier OA7 is a negative voltage, and the seventh operational amplifier OA7 outputs a low level count period indication signal (Z signal) indicating that the operation of the integration circuit is finished.
The triangular wave detection circuit 126 transmits the generated high point signal (HI signal), low point signal (LO signal), and count period indication signal (Z signal) to the control device 130. Of course, it should be understood by those skilled in the art that the reference voltage and the resistors R9-R14 in the triangular wave detection circuit 126 may be set to other voltage values and resistance values according to the principles of the present application.
The input signal detection circuit 128 in fig. 2a (i) comprises an eighth operational amplifier OA8, the inverting terminal of the eighth operational amplifier OA8 is connected to the output terminal of the voltage bias circuit 122.2 through a resistor R6, and the forward terminal of the eighth operational amplifier OA8 is connected to ground. The eighth operational amplifier OA8 is operative to compare the voltage value of the input signal received at the inverting terminal with the 0v voltage to determine whether the input signal is present. In operation, when the inverting terminal of the eighth operational amplifier OA8 receives an input signal, the output terminal of the eighth operational amplifier OA8 outputs a low level analog input signal indicating signal (U signal); when the inverting terminal of the eighth operational amplifier OA8 does not receive the input signal, the output terminal of the eighth operational amplifier OA8 outputs a high level analog input signal indicating signal (U signal) indicating the start and end of the analog input signal. As will be appreciated by those skilled in the art, when the input signal is received at the inverting terminal of the eighth operational amplifier OA8, the output terminal of the eighth operational amplifier OA8 may also output a high level analog input signal indicating signal (U signal); the output of the eighth operational amplifier OA8 may also output a low analog input signal indicating signal (U signal) when the input signal is not received at the inverting terminal of the eighth operational amplifier OA 8. The input signal detection circuit 128 transmits the generated analog input signal indication signal (U signal) to the control device 130.
The control device 130 in fig. 2a (ii) includes five logic circuits formed by nor circuits, which are the first resistance control signal generator 130.1, the second resistance control signal generator 130.2, the coarse count control signal generator 130.3, the fine count control signal generator 130.4 and the total count control signal generator 130.5. The control device 130 functions to: first and second resistance control signals for controlling the on/off of the switches B and C in the integrating circuit 124, and a coarse and fine count control signal for controlling the count of the discharge time counting means 132.1 in the counting means 132 and a total count control signal for controlling the count of the charge and discharge time counting means 132.2 are generated based on a high point signal (HI signal), a low point signal (LO signal), a count period indication signal (Z signal) received from the triangular wave detecting circuit 126 and an analog input signal indication signal (U signal) received from the input signal detecting circuit 128.
In operation, the first resistance control signal generator 130.1 generates a first resistance control signal based on the received high-point signal (HI signal), low-point signal (LO signal) and second level signal (U signal), which is supplied to the integrating circuit 124 for controlling the switching of the B switch in the integrating circuit 124, so that the resistor R7 is connected to or disconnected from the capacitor C1 in the integrating circuit 124 or the capacitor C1. Furthermore, the first resistance control signal is supplied to the second resistance control signal generator 130.2 and the coarse count control signal generator 130.3. The second resistance control signal generator 130.2 generates a second resistance control signal according to the received first resistance control signal, the low point signal (LO signal), the count period indication signal (Z signal) and the analog input signal indication signal (U signal), and the second resistance control signal is transmitted to the integrating circuit 124 for controlling the on/off of the C switch in the integrating circuit 124, so that the resistor R8 is connected to or disconnected from the capacitor C1 in the integrating circuit 124 or the capacitor C1. Furthermore, the second resistance control signal is supplied to the fine count control signal generator 130.4. The coarse count control signal generator generates a coarse count control signal according to the received first resistance control signal and the count period indication signal (Z signal), and the coarse count control signal is transmitted to the discharge time counting device 132.1 for controlling the discharge time counting device 132.1 to count at the first count frequency. The fine count control signal generator generates a fine count control signal according to the received second resistance control signal and the count period indication signal (Z signal), and the coarse count control signal is transmitted to the discharge time counting device 132.1 for controlling the discharge time counting device 132.1 to count at the second count frequency. The total count control signal generator generates a total count control signal according to the received count period indication signal (Z signal) and the analog input signal indication signal (U signal), and the total count control signal is transmitted to the charge and discharge time counting device 132.2 for controlling the charge and discharge time counting device 132.2 to count at a third count frequency. A specific circuit configuration diagram of the five logic circuits in the control device 130 will be described in detail in the following fig. 3.
The counting device 132 in fig. 2a (ii) includes a discharge time counting device 132.1 and a charge and discharge time counting device 132.2. In operation, the discharge time counter 132.1 transmits the counted number N1 at the first counting frequency and the counted number N2 at the second counting frequency to the Micro Control Unit (MCU)134, and the charge-discharge time counter 132.2 transmits the counted number N3 at the third frequency to the Micro Control Unit (MCU) 134. The Micro Control Unit (MCU)134 calculates the effective value of the analog input signal based on the received count numbers N1, N2, and N3. The specific calculation process of the Micro Control Unit (MCU)134 will be described in detail with reference to the waveforms of the respective control signals in the timing diagram of fig. 5.
Fig. 2B shows a specific circuit structure diagram of the system block diagram 1B of the embodiment of the circuit for calculating an effective value of an analog input signal according to the present application. The specific structures of the preprocessing circuit 122, the integrating circuit 124, the triangular wave detecting circuit 126 and the input signal detecting circuit 128 are the same as the specific circuit structures of the corresponding modules in fig. 2a (i), and are not repeated here. Unlike in fig. 2a (ii), the high point signal (HI signal), the low point signal (LO signal), the count period indication signal (Z signal), and the analog input signal indication signal (U signal) output from the input signal detection circuit 128 in fig. 2B are output to the Micro Control Unit (MCU) 134. The Micro Control Unit (MCU)134 in fig. 2B can also implement the functions of the control device 130 and the counting device 132 in fig. 2a (ii), in addition to the calculation function of the Micro Control Unit (MCU)134 in fig. 2a (ii). Specifically, the Micro Control Unit (MCU)134 can generate a first resistance control signal and a second resistance control signal for controlling the on/off of the switches B and C in the integration circuit 124, and generate a coarse and fine count control signal and a total count control signal according to a high point signal (HI signal), a low point signal (LO signal), a count period indication signal (Z signal) received from the triangular wave detection circuit 126, and an analog input signal indication signal (U signal) received from the input signal detection circuit 128. The generation of the above-mentioned control signals may be implemented by software, and more specifically, may be implemented by a Micro Control Unit (MCU)134 running a corresponding program. The Micro Control Unit (MCU)134 may count at different counting frequencies according to the generated coarse and fine count control signals and the total count control signal, and calculate an effective value of the analog input signal according to the counted number of counts. As will be appreciated by those skilled in the art, the Micro Control Unit (MCU)134 may also have other functions in addition to those described above.
Fig. 3 shows a specific circuit configuration diagram of an embodiment of the circuit for calculating an effective value of an analog input signal according to the present application, and fig. 2a (ii) shows a specific circuit configuration diagram of the control device 130.
The first resistance control signal (B signal) generator 130.1 in fig. 3 is composed of a D flip-flop and an RS flip-flop and a nand gate circuit. The first resistance control signal (B signal) generator 130.1 generates the first resistance control signal (B signal) based on the HI signal (HI signal), the LO signal (LO signal) generated by the triangular wave detection circuit 126 and the analog input signal indication signal (U signal) generated by the input signal detection circuit 128. As shown, the first resistance control signal is in communication with a high-point signal (HI signal), a low-point signal (LO signal), and an analog input signal indicator signal (U signal)Is a RS flip-flop relationship, where R ═ LO;
Figure BDA0002326161740000131
and B is Q. When the analog input signal indicating signal (U signal) received by the control device 130 is at low level and the high point signal (HI signal) output by the triangular wave detection circuit 126 is received, the first resistance control signal (B signal) output by the control device 130 is at low level, thereby controlling the switch B in the variable resistance circuit 124.1 to switch from the open state to the closed state; when the control device 130 receives the analog input signal indicating signal (U signal) as low level and receives the low point signal (LO signal) outputted from the triangular wave detection circuit 126, the first resistance control signal (B signal) outputted from the control device 130 is high level, thereby controlling the switch B in the variable resistance circuit 124.1 to switch from the closed state to the open state; and so on until the integration process is finished.
The second resistance control signal (C-signal) generator 130.2 in fig. 3 is formed by a nand gate circuit. The second resistance control signal (C signal) generator 130.2 generates the second resistance control signal (C signal) based on the low point signal (LO signal) and the count period indicating signal (Z signal) generated by the triangular wave detecting circuit 126, the analog input signal indicating signal (U signal) generated by the input signal detecting circuit 128, and the first resistance control signal (B signal) generated by the first resistance control signal (B signal) generator 130.1. As shown, the logic relationship between the second resistance control signal (C signal) and the low point signal (LO signal), the count period indication signal (Z signal), the analog input signal indication signal (U signal), and the first resistance control signal (B signal) is:
Figure BDA0002326161740000141
when the first resistance control signal (B signal) is at a high level, the count period indication signal (Z signal) received by the control device 130, the analog input signal indication signal (U signal) are at a high level, and the low point signal (LO signal) output by the triangular wave detection circuit 126 is received, the second resistance control signal (C signal) output by the control device 130 is at a low level, thereby controlling the switch in the variable resistance circuit 124.1C, switching from the open state to the closed state; when the whole integration process is finished, i.e. the counting period indication signal (Z signal) received by the control device 130 changes to low level, the second resistance control signal (C signal) output by the control device 130 is high level, thereby controlling the switch C in the variable resistance circuit 124.1 to switch from the closed state to the open state.
The coarse count control signal (Ctrl1 signal) generator 130.3 in fig. 3 is formed by a nand gate circuit. The coarse count control signal (Ctrl1 signal) generator 130.3 generates the coarse count control signal (Ctrl1 signal) according to the first resistance control signal (B signal) generated by the first resistance control signal (B signal) generator 130.1 and the count period indication signal (Z signal) generated by the triangular wave detection circuit 126, and the generated coarse count control signal (Ctrl1 signal) is used to control the discharge time counter 132.1 to start and stop counting at the first count frequency. As shown, the logic relationship between the coarse count control signal (Ctrl1 signal), the first resistance control signal (B signal), and the count period indication signal (Z signal) is:
Figure BDA0002326161740000142
when the first resistance control signal (B signal) is at a low level and the count period indication signal (Z signal) is at a high level, the coarse count control signal (Ctrl1 signal) is at a low level, thereby controlling the discharge time counter 132.1 to count at the first count frequency, and when the coarse count control signal (Ctrl1 signal) is at a high level, the discharge time counter 132.1 stops counting.
The fine count control signal (Ctrl2 signal) generator 130.4 in fig. 3 is formed by a nand gate circuit. The fine count control signal (Ctrl2 signal) generator 130.4 generates the fine count control signal (Ctrl2 signal) according to the second resistance control signal (C signal) generated by the second resistance control signal (C signal) generator 130.2 and the count period indication signal (Z signal) generated by the triangular wave detection circuit 126, and the generated fine count control signal (Ctrl2 signal) is used to control the discharge time counter 132.1 to start and stop counting at the second count frequency. As shown, the fine count control signal (Ctrl2 signal), the second resistance control signal (C signal), and the countThe logic relationship between the period indication signals (Z signals) is:
Figure BDA0002326161740000151
when the second resistance control signal (C signal) is at low level and the count period indication signal (Z signal) is at high level, the fine count control signal (Ctrl2 signal) is at low level, so as to control the discharge time counter 132.1 to count at the second count frequency, and when the fine count control signal (Ctrl2 signal) is at high level, the discharge time counter 132.1 stops counting.
The total count control signal (Ctrl3 signal) generator 130.5 in fig. 3 is formed by an and nor gate circuit. The total count control signal (Ctrl3 signal) generator 130.5 generates the total count control signal (Ctrl3 signal) according to the analog input signal indication signal (U signal) generated by the input signal detection circuit 128 and the count period indication signal (Z signal) generated by the triangular wave detection circuit 126, and the generated total count control signal (Ctrl3 signal) is used to control the charging and discharging time counter 132.2 to start and stop counting at the third counting frequency. As shown, the logic relationship between the total count control signal (Ctrl3 signal), the analog input signal indication signal (U signal), and the count period indication signal (Z signal) is:
Figure BDA0002326161740000152
the charge/discharge time counter 132.2 starts counting when the analog input signal indication signal (U signal) generated by the input signal detection circuit 128 is at a low level, and the charge/discharge time counter 132.2 stops counting when the count period indication signal (Z signal) generated by the triangular wave detection circuit 126 is at a low level.
The control device 130 supplies a first resistance control signal (B signal) and a second resistance control signal (C signal) via connection lines 135.1 and 135.2, respectively, to the integrating circuit 124 for controlling the closing and opening of the switches B and C in the variable resistance circuit 124.1. The control device 130 sends the coarse count control signal (Ctrl1 signal) and the fine count control signal (Ctrl2 signal) to the discharge time counting device 132.1 through the connection lines 137.1 and 137.2, respectively, so that the counting is started and stopped at the first counting frequency or the second counting frequency; and the total count control signal (Ctrl3 signal) is transmitted to the charge-discharge time counting device 132.2 via the connection line 137.3, so that it starts and stops counting at the third counting frequency. It will be understood by those skilled in the art that the first, second and third counting frequencies may be different counting frequencies or the same counting frequency.
Fig. 4A and 4B respectively show schematic internal structural block diagrams of a Micro Control Unit (MCU)134 in system block diagrams 1A and 1B of an embodiment of the circuit for calculating an effective value of an analog input signal according to the present application.
As shown in FIG. 4A, the Micro Control Unit (MCU)134 in FIG. 1A includes a bus 402, a processor 404, an input interface circuit 406, an output interface circuit 408, and a memory 410 with a control program 412. Various components of the Micro Control Unit (MCU)134, including the processor 404, the input interface circuit 406, the output interface circuit 408, and the memory 410 are communicatively coupled to the bus 402 such that the processor 404 controls the operation of the input interface circuit 406, the output interface circuit 408, and the memory 410. In particular, memory 410 is used to store programs, instructions and data, and processor 404 reads the programs, instructions and data from memory 410 and can write data to memory 410. Processor 404 controls the operation of input interface circuit 406 and output interface circuit 408 by executing programs and instructions read from memory 410. The input interface circuit 406 receives incoming signals and data, including the count numbers N1, N2, and N3 from the counting device 132, via connections 139.1, 139.2, and 139.3. By the processor 404 executing the program stored in the memory 410, the processor calculates an effective value of the analog input signal based on the count numbers N1, N2, and N3.
As shown in FIG. 4B, the Micro Control Unit (MCU)134 in FIG. 1B includes a bus 402, a processor 404, an input interface circuit 406, an output interface circuit 408, and a memory 410 with a control program 412. Various components of the Micro Control Unit (MCU)134, including the processor 404, the input interface circuit 406, the output interface circuit 408, and the memory 410 are communicatively coupled to the bus 402 such that the processor 404 controls the operation of the input interface circuit 406, the output interface circuit 408, and the memory 410. In particular, memory 410 is used to store programs, instructions and data, and processor 404 reads the programs, instructions and data from memory 410 and can write data to memory 410. Processor 404 controls the operation of input interface circuit 406 and output interface circuit 408 by executing programs and instructions read from memory 410. Input interface circuit 306 receives extraneous signals and data, including a high point signal (HI signal), a low point signal (LO signal), and a count period indication signal (Z signal) received from triangular wave detection circuit 126 and an analog input signal indication signal (U signal) received from input signal detection circuit 128, via connections 129.1, 129.2, 129.3, and 133. Through the connection lines 135.1 and 135.2, the output interface circuit 308 sends out control signals to the outside, including sending out a first resistance control signal (B signal) for controlling the on-off of a switch B in the variable resistance circuit 124.1 and a second resistance control signal (C signal) for controlling the on-off of a switch C to the integrating circuit 124 in fig. 1B; meanwhile, by the processor 404 executing a program stored in the memory 410, the processor calculates an effective value of the analog input signal from the count numbers N1, N2, and N3. It should be noted that, in the embodiment of the present invention, a program that realizes the above-described control is stored in the memory 410 of the control device 130. The Micro Control Unit (MCU)134 issues a first resistance control signal (B signal) and a second resistance control signal (C signal) by the processor 404 executing a program stored in the memory 410.
Fig. 5 shows a timing chart of the triangular wave signal generated by the integrating circuit 124 in response to each control signal. The relationship between the triangular wave signal and the control signals will be described in chronological order.
As shown in fig. 5, the triangular wave signal generated by the integrating circuit 124 from the analog input signal includes four triangular waves each including a rising edge and a falling edge. The first triangular wave starts from 0v, rises along a rising edge to a preset high point, then falls along a falling edge to a preset low point, then the second triangular wave starts from the preset low point, rises along a rising edge to the preset high point, then falls along a falling edge to the preset low point, the rising and falling processes of the third triangular wave are the same as those of the second triangular wave, the fourth triangular wave rises along a rising edge to the preset high point, then falls along a falling edge to the preset low point, at the moment, the fourth triangular wave does not repeat the previous rising edge any more, but continues to fall with a second slope different from the slope of the previous falling edge until the triangular wave falls to 0v, and the whole integration process is finished. At the same time, the HI, LO, Z, U, B, and C control signals are generated at different stages of the triangular wave signal. The Z control signal is at a high level when the amplitude of the triangular wave signal is greater than 0v (T0-T10), and at a low level when the amplitude of the triangular wave signal is equal to 0 v. When the rising edge of the triangular wave signal reaches a preset high point 5v, a high-level pulse HI control signal is generated, and when the falling edge of the triangular wave signal reaches a preset low point 0.12v, a low-level pulse LO control signal is generated. The B control signal is low in the time period (T2-T3, T4-T5, T6-T7, T8-T9) between each HI control signal and the LO control signal thereafter, when the switch B in the integration circuit 124 is closed, and the B control signal is high in the other time periods, when the switch B in the integration circuit 124 is open. When the last LO control signal is generated until the Z control signal changes from high to low (T9-T10), the C control signal is low, at which time the switch C in the integration circuit 124 is closed, and in other time periods the C control signal is high, at which time the switch C in the integration circuit 124 is open. When the triangular wave signal reaches the last predetermined high point from 0v (T0-T8), the U control signal is at a low level, and the U control signal is at a high level in other periods.
At T0, because the B, C signal is high, the switches B, C in the variable resistor circuit 124.1 are both in the off state, and the first and second discharge resistors are both disconnected from the integrator circuit 124. At this time, the input analog input signal charges the capacitor C1 in the integrating circuit 124, thereby forming a rising edge of the first triangular wave in the triangular wave signal.
When the rising edge of the first triangular wave reaches the preset high point (T2), the first comparator circuit 128.1 generates an up-hopped HI pulse signal, at which time the variable frequency counter 132.1 starts counting (coarse counting) at the first counting frequency. According to the HI pulse signal, the B signal jumps from the high level signal to the low level signal, so that the B switch in the variable resistance circuit 124.1 is turned on, and the capacitor C1 in the integrating circuit 124 is discharged through the first discharging resistor R7 with the first discharging slope, thereby forming the falling edge of the first triangular wave in the triangular wave signal.
When the falling edge of the first triangular wave reaches the preset low point (T3), the first comparator circuit 128.1 generates a LO pulse signal that jumps down, at which time the variable frequency counter 132.1 stops counting at the first count frequency. According to the LO pulse signal, the B signal jumps from a low level signal to a high level signal, so that the B switch in the variable resistor circuit 124.1 is turned off, and the analog input signal charges the capacitor C1 in the integrator circuit 124, thereby forming the rising edge of the second triangular wave in the triangular wave signal.
The above process is repeated for the duration of the analog input signal, i.e. three triangular waves at T3-T9, and the variable frequency counter 132.1 switches between starting and stopping counting at the first counting frequency.
When the falling edge of the last triangle wave reaches the preset low point (T9), the first comparator circuit 128.1 generates a LO pulse signal that jumps down, at which time the variable frequency counter 132.1 starts counting (fine counting) at the second counting frequency. According to the LO pulse signal, the B signal jumps from a low level signal to a high level signal, so that the B switch in the variable resistance circuit 124.1 is turned off. Since the U signal has changed from low level to high level at this time, i.e. it means that the external analog input signal disappears, the triangular wave signal does not repeat the rising edge process. According to the LO pulse signal and the U signal, the C signal jumps from the high level signal to the low level signal, so that the C switch in the variable resistor circuit 124.1 is turned on, and the capacitor C1 in the integrator circuit 124 continues to discharge through the second discharge resistor R8 with the second discharge slope, thereby forming the second-stage falling edge of the last triangle wave in the triangle wave signal until the capacitor C1 is completely discharged.
When the discharge of the capacitor C1 is completed (T10), the Z signal jumps from high to low, indicating that the entire integration process is completed, at which time the variable frequency counter 132.1 stops counting at the second count frequency.
According to the working processThe variable frequency counter 132.1 in the counting device 132 performs coarse counting at a first counting frequency in a stage (T2-T3, T4-T5, T6-T7 and T8-T9 stages) where the amplitude of the triangular waveform is less than 5v and more than 0.12v, and performs fine counting at a second counting frequency in a stage (T9-T10 stages) where the amplitude of the triangular waveform is less than 0.12v and more than 0 v; the charge/discharge counting means 132.2 of the counting means 132 counts up at the third counting frequency at a stage where the amplitude of the triangular waveform is greater than 0v in fig. 5. As an example, the first counting frequency is 120kHz, the second counting frequency is 960kHz, and the third counting frequency is 120 kHz. Counting frequency and counting number N counted in counting period according to counter1、N2And N3The operating time T of the charge/discharge counter 132.2 can be calculatedGeneral assemblyOperating time T of discharge counter 132.1 at a first counting frequencyCoarseAnd an operating time T at a second counting frequencyExtract of Chinese medicinal materials，
Figure BDA0002326161740000181
And from this the charging time of the capacitor C in the integrating circuit 124 can be calculated
Figure BDA0002326161740000182
Time of discharge
Figure BDA0002326161740000183
At time TCharging deviceThe amount of charge in is
Figure BDA0002326161740000184
Wherein R is110k Ω, C is a capacitance value, ViIs the voltage amplitude of the analog input signal;
at time TPutThe internal discharge capacity is
Figure BDA0002326161740000185
Wherein R is2＝10kΩ，R31.28m Ω, C is capacitance value, VrefIs a reference voltage signal value;
according to the charge-charge and discharge-charge balancing principle: qCharging device＝QPutIs obtained by
Figure BDA0002326161740000191
The above values are substituted to obtain
Figure BDA0002326161740000192
Wherein Vref，N1，N2，N3Are all known values, so that the voltage value V of the analog input signal can be obtainedi。
As will be appreciated by those skilled in the art, the circuit for calculating the effective value of an analog input signal of the present application may employ other circuit configurations and arrangements to carry out the functions of the various circuits and arrangements of fig. 1.
The present application enables the falling edge of the triangular wave to have two slopes by using two different discharge resistors with a smaller resistance value and a larger resistance value in the integrating circuit 124. For the falling edge stage of the triangular wave between the HI signal and the LO signal, a discharge resistor with a smaller resistance value is used to make the slope of the falling edge steeper, the counting time is shorter, and the counting is carried out with a lower counting frequency (rough counting); for the phase in which the falling edge of the last triangular wave follows the LO signal, the slope of the falling edge of the triangular wave is made flat by using the discharge resistor with a large resistance value, and the counting (fine counting) is performed using a high counting frequency. Because the falling time of the triangular wave between the HI signal and the LO signal is long and the triangular wave has a plurality of repetition periods, the statistical accuracy in the period cannot be influenced by adopting a lower counting frequency in the falling edge period between the HI signal and the LO signal; in the phase after the falling edge of the last triangular wave is the LO signal, the counting time is prolonged after the slope is flattened, and the statistical accuracy can be improved even if the counting is performed at the lower counting frequency as described above, but the statistical accuracy in the phase can be further improved by using the higher counting frequency. Therefore, the scheme of the invention can meet the requirements of both the precision of calculating the effective value of the analog input signal and the speed of calculating the effective value of the analog input signal.
While only certain features of the application have been illustrated and described herein, many modifications and changes will occur to those skilled in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the true spirit of the application.

Claims (11)

1. A circuit for calculating an effective value of an analog input signal, comprising:
an integrating circuit (124), the integrating circuit (124) receiving an analog input signal and integrating the analog input signal such that the received analog input signal is converted into a plurality of triangular wave signals, wherein each triangular wave signal has a rising edge and a falling edge, and the integrating circuit (124) comprises a variable resistance circuit (124.1), wherein the variable resistance circuit (124.1) provides the integrating circuit (124) with a first discharge resistance having a first resistance value and a second discharge resistance having a second resistance value;
a triangular wave detection circuit (126), the triangular wave detection circuit (126) for generating a high point signal (HI) indicating a high point of a triangular wave signal generated by the integration circuit (124) and a low point signal (LO) indicating a low point of the triangular wave signal,
wherein when the voltage of the triangular wave signal is between the high point and the low point in a falling edge phase, the first discharge resistance in the integration circuit (124) is turned on and the second discharge resistance in the integration circuit (124) is turned off so that the integration circuit discharges with a first discharge slope along the falling edge,
wherein, when the voltage of the triangular wave signal is lower than the low point (LO) in a falling edge phase, the second discharge resistance in the integration circuit (124) is turned on, and the first discharge resistance in the integration circuit (124) is turned off, so that the integration circuit discharges with a second discharge slope along the falling edge, the second discharge slope being gentler than the first discharge slope; and
a discharge time counting device (132.1), the discharge time counting device (132.1) is used for counting in the falling edge stage of the triangular wave signal,
wherein the count of the discharge time counting means (132.1) is used to obtain an effective value of the analog input signal.
2. A circuit for calculating an effective value of an analog input signal as claimed in claim 1, characterized in that:
the triangular wave detection circuit (126) is further configured to generate a count period indication signal (Z) for activating/deactivating the discharge time counting means (132.1).
3. A circuit for calculating an effective value of an analog input signal as claimed in claim 2, further comprising:
a control device (130), wherein the control device (130) receives the high point signal (HI) and the low point signal (LO) generated by the triangular wave detection circuit (126), and controls the first discharge resistor or the second discharge resistor in the variable resistance circuit (124.1) to be switched on and off according to the received high point signal (HI) and low point signal (LO).
4. A circuit for calculating an effective value of an analog input signal as claimed in claim 3, characterized in that:
the discharge time counting device (132.1) is capable of generating a first counting frequency corresponding to the first discharge slope and a second counting frequency corresponding to the second discharge slope, and the discharge time counting device (132.1) counts at the first counting frequency or the second counting frequency in a falling edge stage of the triangular wave signal.
5. A circuit for calculating an effective value of an analog input signal as claimed in claim 4, characterized in that:
the control device (130) receives the counting period indication signal (Z) generated by the triangular wave detection circuit (126), and controls the discharge time counting device (132.1) to count at the first counting frequency or the second counting frequency according to the received high point signal (HI), low point signal (LO) and counting period indication signal (Z).
6. A circuit for calculating an effective value of an analog input signal as claimed in claim 3, characterized in that:
the discharge time counting device (132.1) can generate a single counting frequency, and the discharge time counting device (132.1) counts at the single counting frequency in the falling edge stage of the triangular wave signal.
7. A circuit for calculating an effective value of an analog input signal as claimed in claim 6, characterized in that:
the control device (130) receives the counting period indication signal (Z) generated by the triangular wave detection circuit (126) and controls the discharge time counting device (132.1) to count at the single counting frequency according to the received high point signal (HI), low point signal (LO) and counting period indication signal (Z).
8. A circuit for calculating an effective value of an analog input signal as claimed in claim 5 or 7, further comprising:
an input signal detection circuit (128), the input signal detection circuit (128) for generating an analog input signal indication signal (U) indicative of the presence of an analog input signal; and
a charge and discharge time counting means (132.2), said charge and discharge time counting means (132.2) being adapted to count the entire period of said triangular wave signal based on a counting period indication signal (Z) generated by said triangular wave detection circuit (126) and said analog input signal indication signal (U),
wherein the count of the discharge time counting means (132.1) and the count of the charge-discharge time counting means (132.2) are used to obtain an effective value of the analog input signal.
9. A circuit for calculating an effective value of an analog input signal as claimed in claim 1, further comprising:
a pre-processing circuit (122), the pre-processing circuit (122) for pre-processing the received analog input signal to reduce noise and distortion of the analog input signal.
10. A circuit for calculating an effective value of an analog input signal as claimed in claim 9, characterized in that:
the pre-processing circuit (122) comprises a voltage follower circuit (122.1) and a voltage bias circuit (122.2).
11. A circuit for calculating an effective value of an analog input signal as claimed in claim 8, further comprising:
a micro control unit MCU (134), said micro control unit MCU (134) is used for obtaining the effective value of said analog input signal according to the count of said charging time counting device (132.1) and the count of said charging and discharging time counting device (132.2).
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