CN112993995A - Bypass device - Google Patents
Bypass device Download PDFInfo
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- CN112993995A CN112993995A CN202110355079.XA CN202110355079A CN112993995A CN 112993995 A CN112993995 A CN 112993995A CN 202110355079 A CN202110355079 A CN 202110355079A CN 112993995 A CN112993995 A CN 112993995A
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- 238000010586 diagram Methods 0.000 description 9
- 238000000746 purification Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
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- 239000013307 optical fiber Substances 0.000 description 2
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/007—Arrangements for selectively connecting the load or loads to one or several among a plurality of power lines or power sources
- H02J3/0073—Arrangements for selectively connecting the load or loads to one or several among a plurality of power lines or power sources for providing alternative feeding paths between load and source when the main path fails, e.g. transformers, busbars
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Abstract
The invention relates to a bypass device, comprising a solid bypass switch and further comprising: the active driving circuit is used for being electrically connected with the main control device and the solid-state bypass switch and driving the solid-state bypass switch to be conducted when an enabling signal sent by the main control device is received; the master control device is used for outputting an enabling signal when the voltage quality of the contact network is detected to be abnormal; and the passive driving circuit is electrically connected with the solid-state bypass switch and is used for driving the solid-state bypass switch to be conducted when the voltage at two ends of the solid-state bypass switch is detected to exceed a preset threshold value. The invention utilizes the active driving circuit to obtain the enabling signal sent by the main control device, and when the enabling signal is received, the active driving circuit drives the solid bypass switch to be conducted; meanwhile, the passive driving circuit is used for detecting the voltage at two ends of the solid-state bypass switch, when the active driving circuit fails, the passive driving circuit detects that the voltage exceeds a preset threshold value, the passive driving circuit drives the solid-state bypass switch to be conducted, and the operation reliability of the bypass device is improved.
Description
Technical Field
The invention relates to the technical field of railway traction purification power supplies, in particular to a bypass device.
Background
The railway traction purification power supply is used for being installed under a railway traction transformer, taking electricity from the secondary side of the traction transformer, performing purification treatment such as voltage regulation and filtering on voltage, and eliminating the problems of electric energy quality such as voltage drop, sudden rise and sudden fall, overvoltage, undervoltage, voltage fluctuation, three-phase voltage unbalance, voltage harmonic wave and the like inherent in a contact network power grid, so as to obtain stable power supply equipment with three-phase voltage for a through line. The purification power supply is connected in series between a contact network power grid and a protected load, and compensates and controls the voltage of the load side.
The application of the purification power supply mainly comprises an online compensation operation state and an online bypass operation state, wherein when the voltage of a contact network has a quality problem, the purification power supply is in the online compensation operation state so as to ensure that a power distribution network system has a higher voltage quality level; when the voltage of the contact network returns to normal, the purification power supply is in an online bypass operation state so as to ensure the overall operation efficiency of the system.
In the process of converting the two states of the purifying power supply, if the operation reliability of the bypass switch is not high enough, the voltage system of the contact network cannot meet the requirement of uninterrupted power supply.
Disclosure of Invention
In view of the above, it is necessary to provide a highly reliable bypass device.
A bypass device comprising a solid state bypass switch, further comprising:
the active driving circuit is used for being electrically connected with the main control device and the solid-state bypass switch and driving the solid-state bypass switch to be conducted when an enabling signal sent by the main control device is received; the master control device is used for outputting the enabling signal when the voltage quality of the contact network is detected to be abnormal;
and the passive driving circuit is electrically connected with the solid-state bypass switch and is used for driving the solid-state bypass switch to be conducted when the voltage at two ends of the solid-state bypass switch is detected to exceed a preset threshold value.
In one embodiment, the active driving circuit includes:
the control circuit is used for being electrically connected with the main control device and outputting a first driving signal when receiving the enabling signal;
the forward driving circuit is electrically connected with the control circuit and the solid-state bypass switch and is used for outputting an active driving signal to the solid-state bypass switch when receiving the first driving signal; the active driving signal is used for driving the solid-state bypass switch to be conducted;
and the flyback power supply circuit is used for supplying power to the forward driving circuit and the control circuit.
In one embodiment, the control circuit comprises a signal receiving unit and a first driving unit;
the input end of the signal receiving unit is electrically connected with the main control device and is used for receiving the enabling signal sent by the main control device; the output end is electrically connected with the first driving unit and is used for outputting a trigger signal to the first driving unit when receiving the enabling signal;
the first driving unit is electrically connected with the forward driving circuit and used for outputting a first driving signal to the forward driving circuit when receiving the trigger signal.
In one embodiment, the forward driving circuit comprises a first forward unit and a forward control unit;
the forward control unit is electrically connected with the first driving unit and used for outputting a first control signal to the first forward unit when receiving the first driving signal;
the first forward unit is used for outputting an active driving signal when receiving the first control signal.
In one embodiment, the forward driving circuit further comprises a second forward unit;
the forward control unit is further used for outputting a first control signal to the second forward unit;
the second forward unit is used for outputting an active driving signal when receiving the first control signal.
In one embodiment, the forward control unit includes a peak current clamp module.
In one embodiment, the first driving unit includes: the circuit comprises an NPN triode Q1, an NPN triode Q2, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a diode D1, a diode D2, a diode D3 and a capacitor C1;
the first end of the resistor R1 is electrically connected with the output end of the signal receiving unit, and the second end is electrically connected with the anode of the diode D1;
the cathode of the diode D1 is electrically connected with the base of the NPN triode Q1;
the collector of the NPN triode Q1 is electrically connected with the first end of the resistor R2, and the emitter of the NPN triode Q1 is grounded;
the second end of the resistor R2 is electrically connected with the voltage output end of the flyback power supply circuit;
the first end of the resistor R3 is electrically connected with the first end of the resistor R2, and the second end of the resistor R4 is electrically connected with the first end of the resistor R2;
the second end of the resistor R4 is electrically connected with the anode of the diode D2;
the cathode of the diode D2 is electrically connected with the base of the NPN triode Q2;
the collector of the NPN triode Q2 is electrically connected with the first end of the resistor R5, and the emitter of the NPN triode Q2 is grounded;
the second end of the resistor R5 is used for being electrically connected with the reference power supply output end of the peak current clamping module;
the anode of the diode D3 is electrically connected to the first end of the resistor R5, and the cathode is electrically connected to the current feedback end of the peak current clamping module;
the first end of the resistor R6 is electrically connected with the collector of the NPN triode, and the second end of the resistor R6 is electrically connected with the cathode of the diode D3;
the first end of the capacitor C1 is electrically connected to the second end of the resistor R6 and the first driving signal receiving end of the forward control unit, and the second end is grounded.
In one embodiment, the peak current clamping module comprises a pulse width modulation chip U1, a resistor R7, a resistor R8, an NPN transistor Q3, a PNP transistor Q4, an NPN transistor Q5, and a PNP transistor Q6;
a power supply input end of the pulse width modulation chip U1 is electrically connected with a power supply output end of the flyback power supply circuit, a reverse pulse output end is electrically connected with the power supply input end, a first in-phase input end is electrically connected with a second in-phase input end, a first reverse input end is electrically connected with a second reverse input end and the reference power supply output end, and a pulse signal reference ground end is electrically connected with a first end of the resistor R7 and a first end of the resistor R8;
the second end of the resistor R7 is electrically connected with the base of the PNP triode Q4;
the collector of the PNP triode Q4 is grounded, and the emitter of the PNP triode Q4 is electrically connected with the emitter of the NPN triode Q3;
a base electrode of the NPN triode Q3 is electrically connected with the second end of the resistor R7, a collector electrode of the NPN triode Q3 is electrically connected with a power supply output end of the flyback power supply circuit, and an emitter electrode of the NPN triode Q3 is electrically connected with a controlled end of the first forward unit;
the second end of the resistor R8 is electrically connected with the base of the PNP triode Q6;
the collector of the PNP triode Q6 is grounded, and the emitter of the PNP triode Q6 is electrically connected with the emitter of the NPN triode Q5;
the base electrode of the NPN triode Q5 is electrically connected with the second end of the resistor R8, the collector electrode of the NPN triode Q5 is electrically connected with the power output end of the flyback power supply circuit, and the emitter electrode of the NPN triode Q5 is electrically connected with the controlled end of the second forward unit.
In one embodiment, the flyback power supply circuit is a closed-loop control flyback circuit.
In one embodiment, the passive driving circuit includes:
the overvoltage protection circuit is used for outputting an overvoltage driving signal when the voltage at two ends of the solid bypass switch is detected to exceed a preset threshold value;
the second driving circuit is used for receiving and latching the overvoltage driving signal and outputting a passive driving signal to the solid-state bypass switch according to the overvoltage driving signal; the passive drive signal is used to indicate that the solid-state bypass switch is conductive.
In one embodiment, the overvoltage protection circuit comprises: the resistor R9, the resistor R10, the diode D4, the breakdown diode BOD and the capacitor C2;
the resistor R9 has a first end electrically connected to the input end of the solid-state bypass switch and a second end electrically connected to the anode of the diode D4;
the cathode of the diode D4 is electrically connected with the anode of the breakdown diode BOD;
the cathode of the breakdown diode BOD is electrically connected with the first end of the resistor R10 and the input end of the second driving circuit;
the second end of the resistor R10 is electrically connected with the output end of the solid-state bypass switch;
the first end of the capacitor C2 is electrically connected to the first end of the resistor R10, and the second end is electrically connected to the second end of the resistor R10.
In one embodiment, the second driving circuit includes: an RS latch, an OR gate and a driving gate;
a first signal input end of the RS latch serves as an input end of the second driving circuit and is electrically connected with a cathode of the BOD and a first input end of the OR gate; a second signal input end of the RS latch is grounded, and a first output end of the RS latch is electrically connected with a second input end of the OR gate;
the output end of the OR gate is electrically connected with the input end of the driving gate;
and the output end of the driving gate is electrically connected with the controlled end of the solid-state bypass switch.
In one embodiment, the device further comprises a mechanical bypass switch,
the control end of the mechanical bypass switch is connected with an input switch of the system low-voltage power cabinet in series;
and an input switch of the system low-voltage power cabinet is connected with a control switch of the main control device in parallel.
The bypass device is provided with an active driving circuit and a passive driving circuit for the solid bypass switch, the active driving circuit is used for acquiring an enabling signal sent by the main control device, and when the enabling signal is received, the active driving circuit drives the solid bypass switch to be conducted; meanwhile, the passive driving circuit is used for detecting the voltage at two ends of the solid-state bypass switch, when the active driving circuit fails, the passive driving circuit detects that the voltage exceeds a preset threshold value, the passive driving circuit drives the solid-state bypass switch to be conducted, the operation reliability of the bypass device is improved, and the voltage system is guaranteed to realize uninterrupted power supply.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a block diagram of a bypass device according to an embodiment;
FIG. 2 is a second block diagram of the bypass device according to an embodiment;
FIG. 3 is a block diagram of a control circuit according to an embodiment;
FIG. 4 is a block diagram of a forward driving circuit according to an embodiment;
FIG. 5 is a block diagram of a forward driving circuit according to another embodiment;
FIG. 6 is a schematic circuit diagram of a first driving unit according to an embodiment;
FIG. 7 is a schematic circuit diagram of a peak current clamp module according to an embodiment;
FIG. 8 is a schematic diagram of a passive driving circuit according to an embodiment;
FIG. 9 is a third block diagram of a bypass device according to an embodiment.
Detailed Description
In order that the invention may be more fully understood, reference will now be made to the following description. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element and be integral therewith, or intervening elements may also be present. The terms "mounted," "one end," "the other end," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
In one embodiment, as shown in fig. 1, there is provided a bypass device comprising a solid-state bypass switch, further comprising:
the active driving circuit is used for being electrically connected with the main control device and the solid-state bypass switch and driving the solid-state bypass switch to be conducted when an enabling signal sent by the main control device is received; the master control device is used for outputting an enabling signal when the voltage quality of the contact network is detected to be abnormal;
and the passive driving circuit is electrically connected with the solid-state bypass switch and is used for driving the solid-state bypass switch to be conducted when the voltage at two ends of the solid-state bypass switch is detected to exceed a preset threshold value.
The main control device can detect the voltage quality condition of the contact network, and when the voltage of the contact network is normal, a solid-state bypass switch is not required to be input; when the voltage of the contact network is abnormal, the master control device outputs an enable signal to the active driving circuit to indicate the active driving circuit to drive the solid-state bypass switch to be conducted. The active driving circuit is used for driving the solid-state bypass switch according to an enable signal of the main control device, but the active driving circuit needs to depend on a signal indication of the main control device, and a situation that the signal transmission of the main control device is abnormal may occur. The passive driving circuit is used as a standby drive, the voltages at two ends of the solid-state bypass switch are directly detected, and when the voltage exceeds a preset threshold value, the passive driving circuit directly drives the solid-state bypass switch to be conducted.
The bypass device is provided with an active driving circuit and a passive driving circuit for the solid bypass switch, the active driving circuit is used for acquiring an enabling signal sent by the main control device, and when the enabling signal is received, the active driving circuit drives the solid bypass switch to be conducted; meanwhile, the passive driving circuit is used for detecting the voltage at two ends of the solid-state bypass switch, when the active driving circuit fails, the passive driving circuit detects that the voltage exceeds a preset threshold value, the passive driving circuit drives the solid-state bypass switch to be conducted, the operation reliability of the bypass device is improved, and the voltage system is guaranteed to realize uninterrupted power supply.
As shown in fig. 2, in one embodiment, the active driving circuit includes:
the control circuit is electrically connected with the main control device and outputs a first driving signal when receiving the enabling signal;
the forward driving circuit is electrically connected with the control circuit and the solid-state bypass switch and is used for outputting an active driving signal to the solid-state bypass switch when receiving a first driving signal; the active driving signal is used for driving the solid-state bypass switch to be conducted;
and the flyback power supply circuit is used for supplying power to the forward drive circuit and the control circuit.
The control circuit is used for enabling when receiving an enabling signal output by the main control device, outputting a first driving signal to the forward driving circuit, and the first driving signal is used for driving the forward driving circuit to output an active driving signal. When receiving the first driving signal, the forward driving circuit outputs an active driving signal to the controlled end of the solid-state bypass switch to drive the solid-state bypass switch to be conducted. The forward driving circuit has the advantages of simple circuit topology structure, electrical isolation of input and output, wide voltage rising and falling range and easiness in multi-path output, and can improve the reliability and safety when used for driving the solid-state bypass switch.
The flyback power supply circuit is used for continuously supplying power for the forward driving circuit and the control circuit, and the control circuit and the forward driving circuit can reliably work when the main control device outputs an enabling signal. The flyback power supply circuit has the advantages of simpler circuit, fewer elements compared with a forward switching power supply, smaller volume and lower cost. In addition, the amplitude of the output voltage of the flyback power supply circuit is modulated by the duty ratio and is much higher than that of the forward switching power supply, so that the amplitude of an error signal for regulating and controlling the duty ratio is lower, the gain and the dynamic range of an error signal amplifier are smaller, multi-path output and multi-voltage output can be simply realized, and different power supply voltages can be output according to the requirements of the control circuit and the forward driving circuit.
As shown in fig. 3, in one embodiment, the control circuit includes a signal receiving unit and a first driving unit;
the input end of the signal receiving unit is electrically connected with the main control device and is used for receiving an enabling signal sent by the main control device; the output end is electrically connected with the first driving unit and used for outputting a trigger signal to the first driving unit when receiving the enabling signal;
the first driving unit is electrically connected with the forward driving circuit and used for outputting a first driving signal to the forward driving circuit when receiving the trigger signal.
The signal receiving unit can be electrically connected with the main control device in a wired connection and wireless connection mode so as to receive the enabling signal sent by the main control device. According to different signal output modes of the main control device, the signal receiving unit receives signals by adopting corresponding elements. In one embodiment, the master control device sends the enabling signal through the optical fiber transmitter, and the signal receiving unit comprises an optical fiber receiver for receiving the enabling signal sent by the master control device. When receiving the enable signal, the signal receiving unit outputs a trigger signal to the first driving unit to trigger the first driving unit to output the first driving signal. In one embodiment, the master control device may further send the enabling signal to the signal receiving unit through a wireless communication manner such as bluetooth, wifi, or cellular data.
As shown in fig. 4, in one embodiment, the forward driving circuit includes a first forward unit and a forward control unit;
the forward control unit is electrically connected with the first driving unit and used for outputting a first control signal to the first forward unit when receiving the first driving signal;
the first forward unit is used for outputting an active driving signal when receiving a first control signal.
The forward control unit is used for carrying out drive control on the first forward unit according to the first drive signal, and outputting a first control signal to drive the first forward unit to output an active drive signal to the solid-state bypass switch when receiving the first drive signal.
In one embodiment, in order to ensure that the solid-state bypass switch can operate reliably, the first forward unit is provided with multiple parallel drive outputs, and each drive output is electrically connected with the controlled end of the solid-state bypass switch, so that the problem that the solid-state bypass switch cannot be normally driven due to the fault of the single drive output is avoided.
As shown in fig. 5, in one embodiment, the forward driving circuit further includes a second forward unit;
the forward control unit is also used for outputting a first control signal to the second forward unit;
the second forward unit is used for outputting an active driving signal when receiving the first control signal.
In order to further improve the driving reliability, the second forward unit and the first forward unit are arranged to be mutually standby, when the forward control unit outputs the first control signal, the first forward unit and the second forward unit simultaneously output an active driving signal to the solid-state bypass switch, and if the first forward unit fails, the second forward unit can also normally drive the solid-state bypass switch to be switched on.
In one embodiment, the forward control unit includes a peak current clamp module.
As shown in fig. 6, in one embodiment, the first driving unit includes: the circuit comprises an NPN triode Q1, an NPN triode Q2, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a diode D1, a diode D2, a diode D3 and a capacitor C1;
the first end of the resistor R1 is electrically connected with the output end of the signal receiving unit, and the second end is electrically connected with the anode of the diode D1;
the cathode of the diode D1 is electrically connected with the base of an NPN triode Q1;
the collector of the NPN triode Q1 is electrically connected with the first end of the resistor R2, and the emitter is grounded;
the second end of the resistor R2 is electrically connected with the voltage output end of the flyback power supply circuit;
the first end of the resistor R3 is electrically connected with the first end of the resistor R2, and the second end is electrically connected with the first end of the resistor R4;
a second end of the resistor R4 is electrically connected with the anode of the diode D2;
the cathode of the diode D2 is electrically connected with the base of an NPN triode Q2;
the collector of the NPN triode Q2 is electrically connected with the first end of the resistor R5, and the emitter is grounded;
the second end of the resistor R5 is used for being electrically connected with the reference power supply output end of the peak current clamping module;
the anode of the diode D3 is electrically connected with the first end of the resistor R5, and the cathode of the diode D3 is electrically connected with the current feedback end of the peak current clamping module;
the first end of the resistor R6 is electrically connected with the collector of the NPN triode, and the second end is electrically connected with the cathode of the diode D3;
the first end of the capacitor C1 is electrically connected to the second end of the resistor R6 and the first driving signal receiving end of the forward control unit, and the second end is grounded.
When the signal receiving unit receives the enable signal, a high level is output to the base of the NPN triode Q1 through the resistor R1 and the diode D1 to serve as a trigger signal, so that the NPN triode Q1 is turned on, the base level of the NPN triode Q2 is pulled down, the NPN triode Q2 is turned off, the capacitor C1 discharges to the resistor R6, the first end of the capacitor C1 serves as a first driving signal output end and is electrically connected with the current feedback end of the peak current clamping module, after the electric energy stored in the capacitor C1 is exhausted, the resistor R6 does not have current, and at the moment, the current feedback end of the peak current clamping module detects no current, namely receives the first driving signal, so that soft start is achieved, the current received by the forward control unit during start can be effectively limited, and damage of the forward control unit due to overcurrent is avoided. The diode D1 and the diode D2 are used to prevent voltage reversal. The resistor R2 is a pull-up resistor for pulling up the collector voltage of the NPN transistor Q1, and simultaneously when the NPN transistor Q1 is turned off, the resistor R2 is also used for pulling up the base voltage of the NPN transistor Q2. The resistor R3 is used to divide the voltage with the resistor R2 to provide the appropriate voltage to the collector of the NPN transistor Q1 and the base of the NPN transistor Q2. The resistor R5 is used for pulling up the collector voltage of the NPN triode Q2 and realizing current limiting, and when the NPN triode Q2 is conducted, the reference power supply output end of the peak current clamping module charges the capacitor C1 through the resistor R6. Diode D3 is used to prevent the discharge of capacitor C1 from flowing backward to the reference power supply output of the peak current clamp block.
As shown in fig. 7, in one embodiment, the peak current clamping module includes a pwm chip U1, a resistor R7, a resistor R8, an NPN transistor Q3, a PNP transistor Q4, an NPN transistor Q5, and a PNP transistor Q6;
the power supply input end of the pulse width modulation chip U1 is electrically connected with the power supply output end of the flyback power supply circuit, the reverse pulse output end is electrically connected with the power supply input end, the first in-phase input end is electrically connected with the second in-phase input end, the first reverse input end is electrically connected with the second reverse input end and the reference power supply output end, and the pulse signal reference ground end is electrically connected with the first end of the resistor R7 and the first end of the resistor R8;
the second end of the resistor R7 is electrically connected with the base of the PNP triode Q4;
the collector of the PNP triode Q4 is grounded, and the emitter is electrically connected with the emitter of the NPN triode Q3;
the base electrode of the NPN triode Q3 is electrically connected with the second end of the resistor R7, the collector electrode of the NPN triode Q3 is electrically connected with the power supply output end of the flyback power supply circuit, and the emitter electrode of the NPN triode Q3 is electrically connected with the controlled end of the first forward unit;
the second end of the resistor R8 is electrically connected with the base of the PNP triode Q6;
the collector of the PNP triode Q6 is grounded, and the emitter is electrically connected with the emitter of the NPN triode Q5;
the base electrode of the NPN triode Q5 is electrically connected with the second end of the resistor R8, the collector electrode of the NPN triode Q5 is electrically connected with the power supply output end of the flyback power supply circuit, and the emitter electrode of the NPN triode Q5 is electrically connected with the controlled end of the second forward unit.
The reference power supply output end of the pulse width modulation chip U1 is the reference power supply output end of the peak current clamping module, and the current feedback end is the current feedback end of the peak current clamping module. When the current feedback end of the pulse width modulation chip U1 detects that the current of the resistor R6 is 0, the current feedback end is started, a PWM signal is output by referring to the ground end through a pulse signal, when the PWM signal is effective, the base level of the NPN triode Q3, the base level of the PNP triode Q4, the base level of the NPN triode Q5 and the base level of the PNP triode Q6 are lowered, the PNP triode Q4 and the PNP triode Q6 are conducted, the NPN triode Q3 and the NPN triode Q5 are cut off, PWM control signals are output to the controlled end of the first forward unit and the controlled end of the second forward unit respectively, the first forward unit and the second forward unit are driven to output active driving signals, and the bypass solid-state switch is driven to be conducted. Resistor R7 is a current limiting resistor for limiting the current flowing into the base of PNP transistor Q4 and NPN transistor Q3. Resistor R8 is also a current limiting resistor for limiting the current flowing into the base of PNP transistor Q6 and the base of NPN transistor Q5.
In one embodiment, the flyback power supply circuit is a closed-loop control flyback circuit.
In the working process of the flyback power supply circuit, the conditions of sudden load change and input voltage fluctuation sometimes occur, and in order to ensure that the output voltage is stable and prevent oscillation in the process of supplying power for the control circuit and the forward driving circuit, the closed-loop control flyback circuit is adopted as the flyback power supply circuit.
In one embodiment, the passive drive circuit includes:
the overvoltage protection circuit is used for outputting an overvoltage driving signal when the voltage at two ends of the solid-state bypass switch is detected to exceed a preset threshold value;
the second driving circuit is used for receiving and latching the overvoltage driving signal and outputting a passive driving signal to the solid-state bypass switch according to the overvoltage driving signal; the passive drive signal is used to indicate that the solid state bypass switch is conductive.
When the voltage at the two ends of the solid-state bypass switch exceeds a preset threshold value, the solid-state bypass switch needs to be driven to be conducted, the voltage at the two ends of the solid-state bypass switch is detected by using the overvoltage protection circuit, and when the voltage exceeds the preset threshold value, an overvoltage driving signal is output. The second driving circuit is used for receiving the overvoltage driving signal and outputting a passive driving signal according to the overvoltage driving signal, and the second driving circuit latches when receiving the overvoltage driving signal in order to ensure that the solid-state bypass switch keeps conducting.
As shown in fig. 8, in one embodiment, the overvoltage protection circuit includes: the resistor R9, the resistor R10, the diode D4, the breakdown diode BOD and the capacitor C2;
a first end of the resistor R9 is electrically connected with the input end of the solid-state bypass switch, and a second end of the resistor R9 is electrically connected with the anode of the diode D4;
the cathode of the diode D4 is electrically connected to the anode of the breakdown diode BOD;
the first end of a cathode electric connection resistor R10 of a breakdown diode BOD and the input end of a second driving circuit;
a second end of the resistor R10 is electrically connected with the output end of the solid-state bypass switch;
the capacitor C2 has a first terminal electrically connected to the first terminal of the resistor R10 and a second terminal electrically connected to the second terminal of the resistor R10.
The voltage flows to the input end of the second driving circuit through the resistor R9, the diode D4 and the breakdown diode BOD, the output end of the second driving circuit is electrically connected with the controlled end of the solid-state bypass switch, and when the voltage output to the controlled end of the solid-state bypass switch reaches the working voltage of the controlled end of the solid-state bypass switch, the voltage is the voltage at the two ends of the solid-state bypass switch reaches the preset threshold value. The resistor R10 and the capacitor C2 are used for filtering.
As shown in fig. 8, in one embodiment, the second driving circuit includes: an RS latch, an OR gate and a driving gate;
a first signal input end of the RS latch serves as an input end of the second driving circuit and is electrically connected with a cathode of the breakdown diode BOD and a first input end of the OR gate OR; a second signal input end of the RS latch is grounded, and a first output end of the RS latch is electrically connected with a second input end of the OR gate;
the output end of the OR gate is electrically connected with the input end of the driving gate;
the output end of the driving gate is electrically connected with the controlled end of the solid-state bypass switch.
The RS latch is used for latching the overvoltage driving signal, two input ends of the OR gate are respectively and electrically connected with a first output end of the RS latch and a cathode of the breakdown diode BOD, and when voltage flows to the first input end of the OR gate through the breakdown diode BOD, the OR gate outputs a passive driving signal to a controlled end of the solid-state bypass switch through the driving gate; when the RS latch outputs the latched overvoltage driving signal to the second input terminal of the OR gate OR, the OR gate OR outputs a passive driving signal to the controlled terminal of the solid-state bypass switch through the driving gate.
In one embodiment, as shown in fig. 9, the bypass device further comprises a mechanical bypass switch,
the control end of the mechanical bypass switch is connected in series with an input switch of the system low-voltage power cabinet;
and an input switch of the system low-voltage power cabinet is connected with a control switch of the main control device in parallel.
The control end of the mechanical bypass switch is interlocked with the input switch of the system low-voltage power cabinet and the control switch of the main control device, so that the bypass switch is in a closed state when the low-voltage power cabinet is not operated, and uninterrupted power supply of a power grid system is guaranteed.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (13)
1. A bypass device comprising a solid state bypass switch, further comprising:
the active driving circuit is used for being electrically connected with the main control device and the solid-state bypass switch and driving the solid-state bypass switch to be conducted when an enabling signal sent by the main control device is received; the master control device is used for outputting the enabling signal when the voltage quality of the contact network is detected to be abnormal;
and the passive driving circuit is electrically connected with the solid-state bypass switch and is used for driving the solid-state bypass switch to be conducted when the voltage at two ends of the solid-state bypass switch is detected to exceed a preset threshold value.
2. The bypass device of claim 1, wherein the active drive circuit comprises:
the control circuit is used for being electrically connected with the main control device and outputting a first driving signal when receiving the enabling signal;
the forward driving circuit is electrically connected with the control circuit and the solid-state bypass switch and is used for outputting an active driving signal to the solid-state bypass switch when receiving the first driving signal; the active driving signal is used for driving the solid-state bypass switch to be conducted;
and the flyback power supply circuit is used for supplying power to the forward driving circuit and the control circuit.
3. The bypass device according to claim 2, wherein the control circuit comprises a signal receiving unit and a first driving unit;
the input end of the signal receiving unit is electrically connected with the main control device and is used for receiving the enabling signal sent by the main control device; the output end is electrically connected with the first driving unit and is used for outputting a trigger signal to the first driving unit when receiving the enabling signal;
the first driving unit is electrically connected with the forward driving circuit and used for outputting a first driving signal to the forward driving circuit when receiving the trigger signal.
4. The bypass device according to claim 3, wherein the forward driving circuit comprises a first forward unit and a forward control unit;
the forward control unit is electrically connected with the first driving unit and used for outputting a first control signal to the first forward unit when receiving the first driving signal;
the first forward unit is used for outputting an active driving signal when receiving the first control signal.
5. The bypass device according to claim 4, wherein the forward driving circuit further comprises a second forward unit;
the forward control unit is further used for outputting a first control signal to the second forward unit;
the second forward unit is used for outputting an active driving signal when receiving the first control signal.
6. The bypass device of claim 5, wherein the forward control unit comprises a peak current clamp module.
7. The bypass device according to claim 6, wherein the first driving unit comprises: the circuit comprises an NPN triode Q1, an NPN triode Q2, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a diode D1, a diode D2, a diode D3 and a capacitor C1;
the first end of the resistor R1 is electrically connected with the output end of the signal receiving unit, and the second end is electrically connected with the anode of the diode D1;
the cathode of the diode D1 is electrically connected with the base of the NPN triode Q1;
the collector of the NPN triode Q1 is electrically connected with the first end of the resistor R2, and the emitter of the NPN triode Q1 is grounded;
the second end of the resistor R2 is electrically connected with the voltage output end of the flyback power supply circuit;
the first end of the resistor R3 is electrically connected with the first end of the resistor R2, and the second end of the resistor R4 is electrically connected with the first end of the resistor R2;
the second end of the resistor R4 is electrically connected with the anode of the diode D2;
the cathode of the diode D2 is electrically connected with the base of the NPN triode Q2;
the collector of the NPN triode Q2 is electrically connected with the first end of the resistor R5, and the emitter of the NPN triode Q2 is grounded;
the second end of the resistor R5 is used for being electrically connected with the reference power supply output end of the peak current clamping module;
the anode of the diode D3 is electrically connected to the first end of the resistor R5, and the cathode is electrically connected to the current feedback end of the peak current clamping module;
the first end of the resistor R6 is electrically connected with the collector of the NPN triode, and the second end of the resistor R6 is electrically connected with the cathode of the diode D3;
the first end of the capacitor C1 is electrically connected to the second end of the resistor R6 and the first driving signal receiving end of the forward control unit, and the second end is grounded.
8. The bypass device of claim 7, wherein the peak current clamp module comprises a pulse width modulation chip U1, a resistor R7, a resistor R8, an NPN transistor Q3, a PNP transistor Q4, an NPN transistor Q5, and a PNP transistor Q6;
a power supply input end of the pulse width modulation chip U1 is electrically connected with a power supply output end of the flyback power supply circuit, a reverse pulse output end is electrically connected with the power supply input end, a first in-phase input end is electrically connected with a second in-phase input end, a first reverse input end is electrically connected with a second reverse input end and the reference power supply output end, and a pulse signal reference ground end is electrically connected with a first end of the resistor R7 and a first end of the resistor R8;
the second end of the resistor R7 is electrically connected with the base of the PNP triode Q4;
the collector of the PNP triode Q4 is grounded, and the emitter of the PNP triode Q4 is electrically connected with the emitter of the NPN triode Q3;
a base electrode of the NPN triode Q3 is electrically connected with the second end of the resistor R7, a collector electrode of the NPN triode Q3 is electrically connected with a power supply output end of the flyback power supply circuit, and an emitter electrode of the NPN triode Q3 is electrically connected with a controlled end of the first forward unit;
the second end of the resistor R8 is electrically connected with the base of the PNP triode Q6;
the collector of the PNP triode Q6 is grounded, and the emitter of the PNP triode Q6 is electrically connected with the emitter of the NPN triode Q5;
the base electrode of the NPN triode Q5 is electrically connected with the second end of the resistor R8, the collector electrode of the NPN triode Q5 is electrically connected with the power output end of the flyback power supply circuit, and the emitter electrode of the NPN triode Q5 is electrically connected with the controlled end of the second forward unit.
9. The bypass device of claim 2, wherein the flyback power supply circuit is a closed-loop-control flyback circuit.
10. The bypass device according to claim 1, wherein the passive drive circuit comprises:
the overvoltage protection circuit is used for outputting an overvoltage driving signal when the voltage at two ends of the solid bypass switch is detected to exceed a preset threshold value;
the second driving circuit is used for receiving and latching the overvoltage driving signal and outputting a passive driving signal to the solid-state bypass switch according to the overvoltage driving signal; the passive drive signal is used to indicate that the solid-state bypass switch is conductive.
11. The bypass device according to claim 10, wherein the overvoltage protection circuit comprises: the resistor R9, the resistor R10, the diode D4, the breakdown diode BOD and the capacitor C2;
the resistor R9 has a first end electrically connected to the input end of the solid-state bypass switch and a second end electrically connected to the anode of the diode D4;
the cathode of the diode D4 is electrically connected with the anode of the breakdown diode BOD;
the cathode of the breakdown diode BOD is electrically connected with the first end of the resistor R10 and the input end of the second driving circuit;
the second end of the resistor R10 is electrically connected with the output end of the solid-state bypass switch;
the first end of the capacitor C2 is electrically connected to the first end of the resistor R10, and the second end is electrically connected to the second end of the resistor R10.
12. The bypass device according to claim 11, wherein the second driving circuit comprises: an RS latch, an OR gate and a driving gate;
a first signal input end of the RS latch serves as an input end of the second driving circuit and is electrically connected with a cathode of the BOD and a first input end of the OR gate; a second signal input end of the RS latch is grounded, and a first output end of the RS latch is electrically connected with a second input end of the OR gate;
the output end of the OR gate is electrically connected with the input end of the driving gate;
and the output end of the driving gate is electrically connected with the controlled end of the solid-state bypass switch.
13. The bypass device of claim 1, further comprising a mechanical bypass switch,
the control end of the mechanical bypass switch is connected with an input switch of the system low-voltage power cabinet in series;
and an input switch of the system low-voltage power cabinet is connected with a control switch of the main control device in parallel.
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| CN202110355079.XA CN112993995B (en) | 2021-04-01 | 2021-04-01 | Bypass device |
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| CN112993995B (en) | 2024-05-03 |
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