Disclosure of Invention
Accordingly, the present invention provides a high-precision overcurrent short-circuit protection circuit to solve the above-mentioned technical problems.
The technical scheme of the invention is as follows:
a high precision overcurrent short circuit protection circuit comprising:
the surge suppression circuit is electrically connected between the external input end and the external output end;
the bootstrap circuit is used for providing a driving voltage for the surge suppression circuit in a normal working state, and the output end of the bootstrap circuit is electrically connected with the driving of the surge suppression circuit;
the sampling circuit is used for extracting an output current signal of an external output end and converting the current signal into a voltage signal, and the input end of the sampling circuit is electrically connected with the external output end;
the comparison circuit is used for receiving the voltage signal sent by the sampling circuit, comparing the voltage signal with a reference voltage and sending a comparison result to the logic control circuit, wherein the input end of the comparison circuit is electrically connected with the output end of the sampling circuit, and the output end of the comparison circuit is electrically connected with the input end of the logic control circuit;
the logic control circuit is used for controlling the on and off of the surge suppression circuit, and the output end of the logic control circuit is electrically connected with the drive of the surge suppression circuit and used for pulling down the drive voltage of the surge suppression circuit in an overcurrent working state;
and the power supply circuit is respectively and electrically connected with the external input end, the bootstrap circuit, the sampling circuit, the comparison circuit and the logic control circuit and is used for ensuring the normal power supply of the subsequent circuit.
Preferably, the surge suppression circuit includes:
at least two parallel clamping units, said clamping units comprising:
the source electrode of the first MOSFET is electrically connected with the external input end, the drain electrode of the first MOSFET is electrically connected with the external output end, the grid electrode of the first MOSFET is electrically connected with one end of the first capacitor, the other end of the first capacitor is grounded, one end of the first capacitor departing from the grounding end is electrically connected with one end of the seventeenth resistor, and the other end of the seventeenth resistor is electrically connected with the drain electrode of the first MOSFET.
Preferably, the external input end is electrically connected with one end of a second capacitor, and the other end of the second capacitor is grounded; the external output end is electrically connected with one end of a third capacitor, and the other end of the third capacitor is grounded.
Preferably, the power supply circuit includes:
first power supply circuit for overcurrent protection circuit provides stable voltage, guarantee that overcurrent protection circuit lasts online, include:
a first resistor with one end electrically connected with the external input end, the other end of the first resistor being electrically connected with the cathode of a first voltage-regulator tube, the anode of the first voltage-regulator tube being grounded; one end of the second resistor is electrically connected with the external input end, and the other end of the second resistor is electrically connected with the cathode of the first voltage-regulator tube; the cathode of the first voltage-regulator tube is electrically connected with the base of a first triode, the collector of the first triode is electrically connected with the external input end, the emitter of the first triode is electrically connected with one end of a fourth capacitor, and the other end of the fourth capacitor is grounded; the emitter of the first triode is also electrically connected with one end of a third resistor, the other end of the third resistor is electrically connected with one end of an integrated circuit, the integrated circuit is used for providing reference voltage, the integrated circuit is electrically connected with a first input end of a comparison circuit, and the other end of the integrated circuit is grounded;
the second power supply circuit is used for providing stable voltage for the rear-stage circuit and ensuring the normal power supply of the rear-stage circuit, and comprises:
a fourth resistor, one end of which is electrically connected with the external input end, the other end of the fourth resistor is electrically connected with one end of a fifth capacitor, and the other end of the fifth capacitor is grounded; the other end of the fifth resistor is electrically connected with one end of the fifth capacitor, which deviates from the grounding end; the other end of the sixth resistor is electrically connected with one end of the fifth capacitor, which deviates from the grounding end; a collector of the second triode is electrically connected with the external input end, a base of the second triode is electrically connected with one end of the fifth capacitor, which is deviated from the grounding end, an emitter of the second triode is electrically connected with one end of the sixth capacitor, and the other end of the sixth capacitor is grounded; the base electrode of the second triode is electrically connected with the anode of the first diode, the cathode of the first diode is electrically connected with the cathode of the second voltage-stabilizing tube, and the anode of the second voltage-stabilizing tube is grounded; an emitting electrode of the second triode is electrically connected with one end of a seventh capacitor, and the other end of the seventh capacitor is grounded; and the base electrode of the second triode is electrically connected with the first reference voltage interface end of the logic control circuit, and the emitter electrode of the second triode is electrically connected with the second reference voltage interface end of the logic control circuit.
Preferably, the sampling circuit includes:
the positive power supply interface of the operational amplifier is electrically connected with the emitter of the first triode, and the negative power supply interface of the operational amplifier is grounded; the first input end of the operational amplifier is electrically connected with one end of a seventh resistor, and the other end of the seventh resistor is grounded; a second input end of the operational amplifier is electrically connected with one end of an eighth capacitor, and the other end of the eighth capacitor is grounded; the second input end of the operational amplifier is also electrically connected with one end of an eighth resistor, and the other end of the eighth resistor is grounded; the second input end of the operational amplifier is also electrically connected with one end of a ninth resistor, the other end of the ninth resistor is electrically connected with one end of a tenth resistor, and the other end of the tenth resistor is grounded; one end of the tenth resistor, which is far away from the grounding end, is also electrically connected with one end of a ninth capacitor, and the other end of the ninth capacitor is electrically connected with an external output end; one end of the seventh resistor, which is far away from the grounding end, is electrically connected with one end of the eleventh resistor, the other end of the eleventh resistor is electrically connected with the output end of the operational amplifier, one end of the seventh resistor, which is far away from the grounding end, is electrically connected with one end of the tenth capacitor, the other end of the tenth capacitor is electrically connected with the output end of the operational amplifier, and the output end of the operational amplifier is electrically connected with the second input end of the comparison circuit.
Preferably, the comparison circuit includes:
a positive power supply interface of the comparator is electrically connected with the emitter of the second triode, and a negative power supply interface of the comparator is grounded; a first input end of the comparator is electrically connected with one end of a twelfth resistor, and the other end of the twelfth resistor is electrically connected with one end of the integrated circuit; a second input end of the comparator is electrically connected with one end of a thirteenth resistor, and the other end of the thirteenth resistor is electrically connected with an output end of the sampling circuit; the second input end of the comparator is also electrically connected with one end of a fourteenth resistor, the other end of the fourteenth resistor is electrically connected with the anode of a second diode, the cathode of the second diode is electrically connected with the output end of the comparator, and the output end of the comparator is also electrically connected with the input end of the logic control circuit.
Preferably, the logic control circuit includes:
the source electrode of the second MOSFET is electrically connected with the base electrode of the second triode, the drain electrode of the second MOSFET is grounded, and the grid electrode of the second MOSFET is electrically connected with the output end of the comparison circuit;
a source electrode of the third MOSFET is electrically connected with one end of a fifteenth resistor, the other end of the fifteenth resistor is used as an output end and is electrically connected with a grid electrode of the first MOSFET, a drain electrode of the third MOSFET is grounded, and the grid electrode of the third MOSFET is electrically connected with a grid electrode of the second MOSFET;
and the source electrode of the fourth MOSFET is electrically connected with one end of a sixteenth resistor, the other end of the sixteenth resistor is electrically connected with the emitting electrode of the second triode, the drain electrode of the fourth MOSFET is grounded, and the grid electrode of the fourth MOSFET is electrically connected with the grid electrode of the second MOSFET.
Preferably, the fourth resistor, the fifth resistor, the sixth resistor and the fifth capacitor have a plurality of different replacement specifications for adjusting the start-up delay time of the system.
Preferably, the second power supply circuit is replaced with a timing circuit.
The high-precision overcurrent short-circuit protection circuit has the advantages that the output current is restrained by accurately detecting the surge, and when the output current exceeds the set current, the main power MOSFET in the clamping circuit is closed, so that the requirement of a protection module is met.
Compared with the prior art, the invention can flexibly amplify and freely zoom errors, provides overcurrent protection of different currents for modules with different power levels, reduces the power consumption of overcurrent protection, effectively reduces the power consumption of a surge suppression circuit during continuous overcurrent and short circuit by adjusting the power-on delay time, improves the reliability of products, has strong practicability and is worthy of popularization.
Detailed Description
The invention provides a high-precision overcurrent short-circuit protection circuit, which is described below with reference to the structural schematic diagrams of fig. 1 to 7.
Example 1
A high-precision overcurrent short-circuit protection circuit is shown in a circuit diagram in figures 1 and 2 and comprises a surge suppression circuit, wherein the surge suppression circuit is electrically connected between an external input end and an external output end, the voltage surge suppression circuit is a non-isolated linear circuit, when input voltage is higher than set voltage, the voltage surge suppression circuit works to clamp the output voltage within the set voltage, and the part higher than the set voltage is absorbed by the voltage surge suppression circuit and is released in a thermal mode.
The surge suppression circuit includes:
at least two parallel clamping units, said clamping units comprising:
a source electrode of the first MOSFET transistor is electrically connected with the external input end, a drain electrode of the first MOSFET transistor is electrically connected with an external output end, a gate electrode of the first MOSFET transistor is electrically connected with one end of a first capacitor C2A, the other end of the first capacitor C2A is grounded, one end of the first capacitor C2A, which is away from the ground end, is electrically connected with one end of a seventeenth resistor R2A, and the other end of the seventeenth resistor R2A is electrically connected with the drain electrode of the first MOSFET transistor;
further comprising:
the circuit comprises a bootstrap circuit, a sampling circuit, a comparison circuit, a power supply circuit and a logic control circuit, wherein the bootstrap circuit is used for providing a grid driving voltage for the clamping unit under a normal working state, and the output end of the bootstrap circuit is electrically connected with the grid of the first MOSFET;
the sampling circuit is used for extracting an output current signal of an external output end and converting the current signal into a voltage signal, the input end of the sampling circuit is electrically connected with the external output end, and the output end of the sampling circuit is electrically connected with the input end of the comparison circuit;
the comparison circuit is used for receiving a voltage signal sent by the sampling circuit, comparing the voltage signal with a reference voltage and sending a comparison result to the logic control circuit, the output end of the comparison circuit is electrically connected with the input end of the logic control circuit, the logic control circuit is used for controlling the on and off of the surge suppression circuit, and the output end of the logic control circuit is electrically connected with the grid electrode of the first MOSFET and used for pulling down the grid electrode driving voltage of the clamping unit in an overcurrent working state;
and the power supply circuit is respectively electrically connected with the bootstrap circuit, the sampling circuit, the comparison circuit and the logic control circuit and used for ensuring the normal power supply of a post-stage circuit, and the input end of the power supply circuit is electrically connected with the external input end.
Furthermore, the external input end is electrically connected with one end of a second capacitor CA, and the other end of the second capacitor CA is grounded; the external output end is electrically connected with one end of a third capacitor CB, and the other end of the third capacitor CB is grounded.
Further, the power supply circuit includes:
the first power supply circuit, as shown in fig. 3, i.e., the power supply portion of the over-current protection circuit, is configured to provide a stable voltage for the over-current protection circuit, and ensure that the over-current protection circuit is continuously on-line, and includes a first resistor R1, a second resistor R2, a first triode VT1, a first voltage regulator DZ1, and a fourth capacitor C1.
The first power supply circuit includes:
a first resistor R1 with one end electrically connected with the external input end, the other end of the first resistor R1 is electrically connected with the cathode of a first voltage regulator tube DZ1, and the anode of the first voltage regulator tube DZ1 is grounded; a second resistor R2 with one end electrically connected with the external input end, and the other end of the second resistor R2 is electrically connected with the cathode of the first voltage regulator tube DZ 1; a cathode of the first voltage regulator tube DZ1 is electrically connected with a base of a first triode VT1, a collector of the first triode VT1 is electrically connected with the external input terminal, an emitter of the first triode VT1 is electrically connected with one end of a fourth capacitor C1, and the other end of the fourth capacitor C1 is grounded; the emitter of the first transistor VT1 is further electrically connected to one end of a third resistor R3, the other end of the third resistor R3 is electrically connected to one end of an integrated circuit IC1, the integrated circuit IC1 is configured to provide a reference voltage, the integrated circuit IC1 is electrically connected to a first input terminal of the comparison circuit, and the other end of the integrated circuit IC1 is grounded;
the first resistor R1 and the second resistor R2 are current-limiting resistors at the base of the first transistor VT1, and the first voltage regulator DZ1 is a limiting voltage regulator diode at the base of the first transistor VT 1. The integrated circuit IC1 provides a reference signal Vref1 for an overcurrent protection circuit, the third resistor R3 is a current-limiting resistor of the integrated circuit IC1, and the model of the integrated circuit IC1 is TL 431.
The second power supply circuit, as shown in fig. 4, is a power supply part of the surge suppression circuit, and is configured to provide a stable voltage to a subsequent circuit, so as to ensure normal power supply of the subsequent circuit, where the power supply circuit is composed of a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a second triode VT2, a first diode D1, a second voltage regulator DZ2 for voltage regulation, a fifth capacitor C2, a sixth capacitor C3 for outputting a voltage, and a seventh capacitor C4. The second power supply circuit has a configuration including:
a fourth resistor R4 with one end electrically connected with the external input end, the other end of the fourth resistor R4 being electrically connected with one end of a fifth capacitor C2, the other end of the fifth capacitor C2 being grounded; a fifth resistor R5 having one end electrically connected to the external input terminal, wherein the other end of the fifth resistor R5 is electrically connected to one end of the fifth capacitor C2 away from the ground end; a sixth resistor R6 having one end electrically connected to the external input end, wherein the other end of the sixth resistor R6 is electrically connected to one end of the fifth capacitor C2 away from the ground end; a collector of the second transistor VT2 is electrically connected to the external input terminal, a base of the second transistor VT2 is electrically connected to one end of the fifth capacitor C2 away from the ground terminal, an emitter of the second transistor VT2 is electrically connected to one end of the sixth capacitor C3, and the other end of the sixth capacitor C3 is grounded; the base electrode of the second triode VT2 is electrically connected with the anode of a first diode D1, the cathode of the first diode D1 is electrically connected with the cathode of a second voltage-stabilizing tube DZ2, and the anode of the second voltage-stabilizing tube DZ2 is grounded; an emitter of the second transistor VT2 is electrically connected with one end of a seventh capacitor C4, and the other end of the seventh capacitor C4 is grounded; the base electrode of the second triode VT2 is electrically connected with the first reference voltage interface end of the logic control circuit, and the emitter electrode of the second triode VT2 is electrically connected with the second reference voltage interface end of the logic control circuit.
The fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 are current-limiting resistors at the base of the second triode VT2, the second voltage-stabilizing tube DZ2 is a limiting voltage-stabilizing diode output by the base of the triode, and the first diode D1 is a high-low temperature drift-compensating diode. The fifth capacitor C2, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 form a starting power supply delay circuit, and the starting power supply delay time of the whole system can be changed by adjusting the size of the starting power supply delay circuit.
Further, as shown in fig. 7, the sampling circuit is used for extracting a sampling signal and converting a current signal into a voltage signal to be sent to the comparison circuit.
The sampling circuit includes:
an operational amplifier IC2A, wherein the positive power supply interface is electrically connected with the emitter of the first triode VT1, and the negative power supply interface is grounded; a first input end of the operational amplifier IC2A is electrically connected with one end of a seventh resistor R13, and the other end of the seventh resistor R13 is grounded; a second input end of the operational amplifier IC2A is electrically connected with one end of an eighth capacitor C7, and the other end of the eighth capacitor C7 is grounded; the second input end of the operational amplifier IC2A is also electrically connected with one end of an eighth resistor R14, and the other end of the eighth resistor R14 is grounded; the second input end of the operational amplifier IC2A is further electrically connected to one end of a ninth resistor R15, the other end of the ninth resistor R15 is electrically connected to one end of a tenth resistor R16, the other end of the tenth resistor R16 is grounded, and a tenth resistor R16 is a current sampling resistor; one end of the tenth resistor R16, which is far away from the ground end, is also electrically connected to one end of a ninth capacitor CC, and the other end of the ninth capacitor CC is electrically connected to an external output end; one end of the seventh resistor R13, which is away from the ground end, is electrically connected to one end of an eleventh resistor R10, the other end of the eleventh resistor R10 is electrically connected to the output end of the operational amplifier IC2A, one end of the seventh resistor R13, which is away from the ground end, is electrically connected to one end of a tenth capacitor C6, the other end of the tenth capacitor C6 is electrically connected to the output end of the operational amplifier IC2A, and the output end of the operational amplifier IC2A is electrically connected to the second input end of the comparison circuit.
The eleventh resistor R10, the seventh resistor R13, the eighth resistor R14 and the ninth resistor R15 form a differential amplification circuit, a current signal flowing through the tenth resistor R16 is converted into a voltage signal, and then voltage is output. The output amplification factor can be changed by adjusting the eleventh resistor R10, the output voltage can be flexibly adjusted, and the overcurrent point can be changed, and then, the module overcurrent point can also be changed by adjusting the tenth resistor R16. The tenth capacitor C6 and the eleventh resistor R10 form an RC parallel network to accelerate response speed, the eighth capacitor C7 is a filter capacitor to eliminate noise signals in a sampling process, improve anti-interference performance of sampled signals and enable the module to run more reliably and stably. In the figure, the resistor and the capacitor are both in high-precision grade, and the operational amplifier IC2A is a high-speed operational amplifier, so that the response speed and the sampling precision of the sampling circuit can be effectively improved.
And a tenth resistor R16 for sampling, wherein the sampling can be performed by connecting a plurality of resistors in parallel.
Further, as shown in fig. 5, the function of the comparison circuit is to send a comparison voltage signal to the logic control circuit, which includes:
a comparator IC3A, wherein the positive power supply interface is electrically connected with the emitter of the second triode VT2, and the negative power supply interface is grounded; a first input end of the comparator IC3A is electrically connected with one end of a twelfth resistor R12, and the other end of the twelfth resistor R12 is electrically connected with one end of an integrated circuit IC 1; a second input end of the comparator IC3A is electrically connected with one end of a thirteenth resistor R11, and the other end of the thirteenth resistor R11 is electrically connected with an output end of the sampling circuit; the second input end of the comparator IC3A is further electrically connected to one end of a fourteenth resistor R9, the other end of the fourteenth resistor R9 is electrically connected to the anode of a second diode D2, the cathode of the second diode D2 is electrically connected to the output end of the comparator IC3A, and the output end of the comparator IC3A is further electrically connected to the input end of the logic control circuit.
As shown in fig. 5, the comparator IC3A is a rail-to-rail comparator, in the figure, the sampled voltage signal BJ and the reference signal Vref1 compare the voltage signals through a thirteenth resistor R11 and a twelfth resistor R12, when the sampled voltage signal BJ is smaller than the reference signal Vref1, the output is a low level (0-0.7V), the module normally operates, when the sampled voltage signal BJ is greater than the reference signal Vref1, the output is a high level, the module is turned off, the fourteenth resistor R9 in the figure implements negative logic feedback, the second diode D2 is a unidirectional hysteretic diode, and the over-current point of the module which normally operates again can be changed by adjusting the fourteenth resistor R9.
Further, as shown in fig. 6, the function of the logic control circuit is to control the on and off of the surge suppression circuit, and the logic control circuit includes:
a second MOSFET Q3, the source of which is electrically connected to the base of the second transistor VT2, the drain of the second MOSFET Q3 is grounded, and the gate of the second MOSFET Q3 is electrically connected to the output terminal of the comparison circuit;
a third MOSFET Q4, a source of which is electrically connected to one end of a fifteenth resistor R7, the other end of the fifteenth resistor R7 is electrically connected to a gate of the first MOSFET as an output terminal, a drain of the third MOSFET Q4 is grounded, and a gate of the third MOSFET Q4 is electrically connected to a gate of the second MOSFET Q3;
a source of the fourth MOSFET Q5 is electrically connected to one end of a sixteenth resistor R8, the other end of the sixteenth resistor R8 is electrically connected to an emitter of the second transistor VT2, a drain of the fourth MOSFET Q5 is grounded, and a gate of the fourth MOSFET Q5 is electrically connected to a gate of the second MOSFET Q3.
When the surge suppression circuit works normally, the sampling circuit converts the sampled output current signal into a voltage signal to be compared with the reference voltage, at the moment, the output voltage signal is smaller than the reference voltage, the comparison circuit outputs low level, and the surge suppression circuit works normally.
When overcurrent occurs, the sampling circuit converts the sampled output current signal into a voltage signal to be compared with reference voltage, at the moment, the output voltage signal is higher than the reference voltage, the comparison circuit outputs high level, and the comparison circuit sends the signal to the logic control circuit. And a second MOSFET tube Q3, a third MOSFET tube Q4 and a fourth MOSFET tube Q5 in the logic control circuit are all pulled down, the surge suppression circuit stops working, the surge suppression circuit is restarted, and if the surge suppression circuit is still in an overcurrent state, the processes are repeated, so that the design requirement of overcurrent protection is met. And if the surge suppression circuit is restarted, the surge suppression circuit does not overflow and works normally.
Furthermore, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6 and the fifth capacitor C2 have a plurality of different alternative specifications for adjusting the start-up delay time of the system.
The start-up delay time of the system may also be achieved by other means, such as setting a timing circuit.
In the invention, as shown in fig. 5, the comparison circuit sends the LJKZ signal to the logic control circuit, when the logic control signal is at a low level (0-0.7V), the logic control circuit does not work, and when the LJKZ signal is at a high level, the second MOSFET Q3, the third MOSFET Q4 and the fourth MOSFET Q5 are all pulled down, and the surge suppression circuit stops working.
In fig. 6, the second MOSFET Q3 is connected to the base stage of the power supply part in the surge suppressing circuit, the second MOSFET Q3 is turned on, so that the power supply transistor cannot output the power supply voltage until the LJKZ signal becomes a low level signal, the second MOSFET Q3 is turned off, the power supply transistor outputs the power supply voltage again, the power supply start delay time is determined by the fourth resistor R4, the fifth resistor R5, the sixth resistor R6 and the fifth capacitor C2, and the restart interval time of the surge suppressing circuit can be changed by adjusting 4, the fifth resistor R5, the sixth resistor R6 and the fifth capacitor C2.
In fig. 6, the third MOSFET Q4 is a gate signal for pulling down the second stage of the main power MOSFET, and when LJKZ is high, VTH2 is pulled down rapidly, turning off the main power MOSFET, and stopping the surge suppressing circuit.
The fourth MOSFET Q5 in fig. 6 supplies power to pull VCC low, so that other circuits for surge suppression also stop working.
The high-precision overcurrent short-circuit protection circuit provided by the invention can flexibly amplify and freely zoom errors, provides overcurrent protection of different currents for modules with different power levels, reduces the power consumption of overcurrent protection, effectively reduces the power consumption of a surge suppression circuit during continuous overcurrent and short circuit by adjusting the power-on delay time, improves the reliability of products, has strong practicability and is worthy of popularization.
The above disclosure is only for the preferred embodiments of the present invention, but the embodiments of the present invention are not limited thereto, and any variations that can be made by those skilled in the art are intended to fall within the scope of the present invention.