CN112993151A - Semiconductor structure and forming method thereof - Google Patents
Semiconductor structure and forming method thereof Download PDFInfo
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- CN112993151A CN112993151A CN201911215888.XA CN201911215888A CN112993151A CN 112993151 A CN112993151 A CN 112993151A CN 201911215888 A CN201911215888 A CN 201911215888A CN 112993151 A CN112993151 A CN 112993151A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/01—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/10—Magnetoresistive devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/80—Constructional details
Abstract
A semiconductor structure and a forming method thereof are provided, wherein the forming method comprises the following steps: providing a substrate; forming a bottom ferromagnetic structure on the substrate; forming a buffer material layer and a non-magnetic insulating layer on the bottom ferromagnetic structure; a top ferromagnetic structure is formed on the nonmagnetic insulating layer. In the method for forming a semiconductor structure provided by the embodiment of the invention, the materials of the bottom ferromagnetic structure and the top ferromagnetic structure both generally include FeCoB, the buffer material layer can prevent B ions in the bottom ferromagnetic structure from diffusing into the nonmagnetic insulating layer, the buffer material layer can prevent B ions in the top ferromagnetic structure from diffusing into the nonmagnetic insulating layer, the nonmagnetic insulating layer is not easily affected by the B ions and has a high magnetoresistance ratio, and a plurality of magnetic tunnel junction units are formed after the bottom ferromagnetic structure, the buffer material layer, the nonmagnetic insulating layer and the top ferromagnetic structure are patterned, so that the tunnel magnetoresistance effect of the magnetic tunnel junction units is strong.
Description
Technical Field
Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same.
Background
Magnetic Random Access Memory (MRAM) is a nonvolatile MRAM that can maintain Memory integrity after power is turned off. MRAM devices possess the high speed read and write capabilities of Static Random Access Memory (SRAM), as well as the high integration of Dynamic Random Access Memory (DRAM), and can be written to repeatedly, essentially indefinitely, magnetic random access memory is a "full kinetic" solid-state memory. Therefore, the application prospect is very considerable, and the market of the next generation of memory is expected to be dominated.
MRAM is a memory device that includes an array of MRAM cells that each store a data bit using a resistance value rather than an electrical charge. Each MRAM cell includes a Magnetic Tunnel Junction (MTJ) cell whose resistance can be adjusted to represent a logic "0" or a logic "1". The MTJ cell includes a bottom ferromagnetic structure, a nonmagnetic insulating layer, and a top ferromagnetic structure. The resistance of the MTJ cell can be adjusted by changing the orientation of the magnetic moment of the top ferromagnetic structure relative to the bottom ferromagnetic structure. Specifically, the resistance of the MTJ element is low when the magnetic moment of the top ferromagnetic structure is parallel to the magnetic moment of the bottom ferromagnetic structure, corresponding to a logic "0," whereas the resistance of the MTJ element is high when the magnetic moment of the top ferromagnetic structure is not parallel to the magnetic moment of the bottom ferromagnetic structure, corresponding to a logic "1. The MTJ cell is connected between top and bottom electrodes and a current flowing through the MTJ cell from one electrode to the other can be detected to determine the resistance and, thus, the logic state.
The Tunnel Magnetoresistance (TMR) effect in magnetic tunnel junctions is a key to the development of magnetic random access memories, magnetic sensors and new programmable logic devices.
Disclosure of Invention
Embodiments of the present invention provide a semiconductor and a method for forming the same, which improve electrical properties of a semiconductor structure.
To solve the above problems, an embodiment of the present invention provides a method for forming a semiconductor structure, including: providing a substrate; forming a bottom ferromagnetic structure on the substrate; forming a buffer material layer and a non-magnetic insulating layer on the bottom ferromagnetic structure; a top ferromagnetic structure is formed on the nonmagnetic insulating layer.
Correspondingly, an embodiment of the present invention further provides a semiconductor structure, including: a substrate; a bottom ferromagnetic structure on the substrate; a layer of buffer material and a non-magnetic insulating layer on the bottom ferromagnetic structure; a top ferromagnetic structure on the nonmagnetic insulating layer.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following advantages:
in the method for forming a semiconductor structure provided by the embodiment of the present invention, the bottom ferromagnetic structure and the top ferromagnetic structure both generally include FeCoB, the buffer material layer is generally formed below the nonmagnetic insulating layer, and the buffer material layer can block B ions in the bottom ferromagnetic structure from diffusing into the nonmagnetic insulating layer; alternatively, a buffer material layer is typically formed over the nonmagnetic insulating layer, the buffer material layer being capable of blocking diffusion of B ions in the top ferromagnetic structure into the nonmagnetic insulating layer; or, a buffer material layer is formed below the nonmagnetic insulating layer and above the nonmagnetic insulating layer at the same time, the buffer material layer can block B ions in the bottom ferromagnetic structure from diffusing into the nonmagnetic insulating layer, and the buffer material layer can block B ions in the top ferromagnetic structure from diffusing into the nonmagnetic insulating layer. Under the three conditions, the nonmagnetic insulating layer is not easily affected by B ions and has a high magnetic resistance ratio, and the bottom ferromagnetic structure, the buffer material layer, the nonmagnetic insulating layer and the top ferromagnetic structure are patterned subsequently to form a plurality of magnetic tunnel junction units, so that the tunnel magnetic resistance effect of the magnetic tunnel junction units is strong when the semiconductor structure works, and the improvement of the electrical property of the semiconductor structure is facilitated.
Drawings
FIG. 1 is a schematic diagram of a semiconductor structure;
FIGS. 2 to 9 are schematic structural diagrams corresponding to steps of a method for forming a semiconductor structure according to an embodiment of the present invention;
FIG. 10 is a schematic diagram of a magnetic tunnel junction cell.
Detailed Description
The semiconductor structure formed at present still has a problem of poor performance. The reason for the poor performance of a semiconductor structure is analyzed by combining a schematic structure diagram of the semiconductor structure.
Fig. 1 shows a schematic structural diagram of a semiconductor structure.
Referring to fig. 1, the semiconductor structure includes: a substrate 10 having an interconnect structure 16 therein; a bottom electrode 11 is located on the substrate 10, and the bottom electrode 11 is connected with the interconnection structure 16; a bottom ferromagnetic structure 12 located on said bottom electrode 11; a non-magnetic insulating layer 13 on the bottom ferromagnetic structure 12; a top ferromagnetic structure 14 on the nonmagnetic insulating layer 13; a second electrode 15 is located on the top ferromagnetic structure 14.
The materials of the bottom ferromagnetic structure 12 and the top ferromagnetic structure 14 generally include FeCoB, and after the top ferromagnetic structure 14 is formed, the semiconductor structure is generally annealed, during the annealing process, B ions in the FeCoB in the bottom ferromagnetic structure 12 and the top ferromagnetic structure 14 move faster and easily diffuse into the nonmagnetic insulating layer 13, the nonmagnetic insulating layer 13 is affected by the B ions, and the magnetoresistance ratio of the nonmagnetic insulating layer 13 is reduced, so that the Tunnel Magnetoresistance (TMR) effect of the magnetic tunnel junction unit formed by the bottom ferromagnetic structure 12, the nonmagnetic insulating layer 13 and the top ferromagnetic structure 14 is weaker, and the electrical performance of the semiconductor structure is poorer.
In order to solve the technical problem, an embodiment of the present invention provides a method for forming a semiconductor structure, including: providing a substrate; forming a bottom ferromagnetic structure on the substrate; forming a buffer material layer and a non-magnetic insulating layer on the bottom ferromagnetic structure; a top ferromagnetic structure is formed on the nonmagnetic insulating layer.
In the method for forming a semiconductor structure provided by the embodiment of the present invention, the materials of the bottom ferromagnetic structure and the top ferromagnetic structure both generally include FeCoB, the buffer material layer is formed below the nonmagnetic insulating layer, and the buffer material layer can block B ions in the bottom ferromagnetic structure from diffusing into the nonmagnetic insulating layer; or a buffer material layer is formed above the nonmagnetic insulating layer, and the buffer material layer can block B ions in the top ferromagnetic structure from diffusing into the nonmagnetic insulating layer; or, a buffer material layer is formed below the nonmagnetic insulating layer and above the nonmagnetic insulating layer at the same time, the buffer material layer can block B ions in the bottom ferromagnetic structure from diffusing into the nonmagnetic insulating layer, and the buffer material layer can block B ions in the top ferromagnetic structure from diffusing into the nonmagnetic insulating layer. Under the three conditions, the nonmagnetic insulating layer is not easily affected by B ions and has a high magnetic resistance ratio, and the bottom ferromagnetic structure, the buffer material layer, the nonmagnetic insulating layer and the top ferromagnetic structure are patterned subsequently to form a plurality of magnetic tunnel junction units, so that the tunnel magnetic resistance effect of the magnetic tunnel junction units is strong when the semiconductor structure works, and the improvement of the electrical property of the semiconductor structure is facilitated.
In order to make the aforementioned objects, features and advantages of the embodiments of the present invention comprehensible, specific embodiments accompanied with figures are described in detail below.
Fig. 2 to 9 are schematic structural diagrams corresponding to steps in an embodiment of a method for forming a semiconductor structure according to the present invention.
Referring to fig. 2, a substrate 100 is provided, the substrate 100 including a dielectric layer 101 and a conductive structure 102 located in the dielectric layer 101.
The substrate 100 is used to provide a process platform for the subsequent formation of Magnetic Tunnel Junction (MTJ) cells.
In this embodiment, functional structures such as a transistor, a resistor structure, a conductive structure, and the like may be formed at the bottom of the dielectric layer 101. The transistor may be one or two of an NMOS transistor and a PMOS transistor, and specifically, the transistor includes a gate structure, and source-drain doped regions located at two sides of the gate structure.
The dielectric layer 101 is used for realizing electrical isolation between the conductive structures 102 and between a device at the bottom of the dielectric layer 101 and a subsequently formed magnetic tunnel junction unit.
Specifically, the dielectric layer 101 is made of a low-k dielectric material (low-k dielectric material refers to a dielectric material having a relative dielectric constant of greater than or equal to 2.6 and less than or equal to 3.9), an ultra-low-k dielectric material (ultra-low-k dielectric material refers to a dielectric material having a relative dielectric constant of less than 2.6), a dielectric material such as silicon oxide, silicon nitride, or silicon oxynitride.
In this embodiment, the dielectric layer 101 is made of a low-k dielectric material, which is beneficial to reducing parasitic capacitance between the back-end interconnection structures, and further beneficial to reducing the back-end RC delay. In other embodiments, the dielectric layer may also be an inter-metal dielectric layer (IMD) according to the actual process.
The bottom end of the conductive structure 102 is connected with a source-drain doped region in the transistor at the bottom of the dielectric layer 101, and the top end of the conductive structure 102 is used for electrically connecting with a subsequently formed magnetic tunnel junction unit.
In this embodiment, the conductive structure 102 is made of copper. In other embodiments, the material of the conductive structure may also be cobalt, tungsten, or other conductive materials.
Referring to fig. 3, a bottom ferromagnetic structure (fining Layer)103 is formed on the conductive structure 102.
The bottom ferromagnetic structure 103 has a fixed magnetic orientation. The bottom ferromagnetic structure 103 is used in preparation for patterning with a subsequently formed nonmagnetic insulating layer and a top ferromagnetic structure to form a magnetic tunnel cell.
In the present embodiment, the bottom ferromagnetic structure 103 includes an antiferromagnetic-ferromagnetic (AFM) 1031 and a pinned layer (fix layer)1032 on the antiferromagnetic layer 1031.
The antiferromagnetic layer 1031 is used to fix the magnetization direction of the pinned layer 1032 during writing of a magnetic tunnel junction cell, and thus, it is prevented from being influenced by the direction of an induced magnetic field generated when a current flows in a bit line or a word line due to insufficient coercivity of the pinned layer 1032.
Specifically, the material of the antiferromagnetic layer 1031 includes: one or more of platinum manganese (PtMn), iridium manganese (IrMn), rhodium manganese (RhMn), iron manganese (FeMn), Pt alloy, and Mn alloy. In the present embodiment, the material of the antiferromagnetic layer 1031 includes platinum manganese (PtMn).
In the present embodiment, the antiferromagnetic layer 1031 is formed by a Physical Vapor Deposition (PVD) process. The physical vapor deposition process has the advantages of low deposition temperature (usually below 550 ℃), high deposition speed, controllable components and structure of a deposition layer, simple operation, high efficiency and low cost, and the physical vapor deposition process has high compatibility with the existing machine and process flow. In other embodiments, the antiferromagnetic Layer may be formed by Chemical Vapor Deposition (CVD) or Atomic Layer Deposition (ALD).
The pinned layer 1032 comprises a Fe-containing material. Specifically, the material of the pinned layer 1032 includes: one or more of FeCoB, CoFeTa, NiFe and FePt. In this embodiment, the material of the pinned layer 1032 includes FeCoB.
In this embodiment, the pinned layer 1032 is formed using a physical vapor deposition process. In other embodiments, the pinned layer may also be formed using a chemical vapor deposition or atomic layer deposition process.
In the step of forming the bottom ferromagnetic structure 103, a first coupling layer 1033 is also formed on the antiferromagnetic layer 1031 after the formation of the antiferromagnetic layer 1031 and before the formation of the pinned layer 1032.
In operation of the semiconductor structure, the first coupling layer 1033 enables the antiferromagnetic layer 1031 and the pinned layer 1032 to be antiferromagnetically coupled, and magnetic flux closure is formed between the antiferromagnetic layer 1031 and the pinned layer 1032. The magnetic lines of force are closed, so that the influence on the magnetization direction between the magnetic tunnel junctions caused by the leaked magnetic lines of force can be avoided.
Specifically, the first coupling layer 1033 is composed of a non-magnetic conductive material, and in this embodiment, the first coupling layer 1033 includes ruthenium (Ru). In other embodiments, the first coupling layer may also comprise other suitable materials, such as Ti, Ta, Cu, or Ag.
In this embodiment, the first coupling layer 1033 is formed by a physical vapor deposition process. In other embodiments, the first coupling layer may be formed by a chemical vapor deposition or atomic layer deposition process.
The method for forming the semiconductor structure further comprises the following steps: after providing the substrate, a first electrode 104 is formed on the conductive structure 102 before forming the bottom ferromagnetic structure 103.
The first Electrode 104 is a Bottom Electrode (BE), and the first Electrode 104 is used for electrically connecting with a subsequently formed magnetic tunnel junction unit.
In this embodiment, the material of the first electrode 104 includes one or more of tantalum nitride (TaN), tantalum (Ta), titanium (Ti), and titanium nitride (TiN). In this embodiment, the first electrode 104 has a single-layer structure, and the material of the first electrode 104 is tantalum.
In this embodiment, the first electrode 104 is formed by an atomic layer deposition process. The atomic layer deposition process includes multiple atomic layer deposition cycles, which is beneficial to improving the flatness and thickness uniformity of the first electrode 104, thereby improving the formation quality of the first electrode 104, and further improving the flatness and thickness uniformity of the bottom ferromagnetic structure subsequently formed on the first electrode 104. In other embodiments, the first electrode may also be formed using a chemical vapor deposition process.
Referring to fig. 4-6, a layer of buffer material and a nonmagnetic insulating layer 108 are formed on the bottom ferromagnetic structure 103.
The materials of the bottom ferromagnetic structure 103 and the subsequently formed top ferromagnetic structure both typically comprise FeCoB, the buffer material layer is formed below the nonmagnetic insulating layer 108, and the buffer material layer is capable of blocking B ions in the bottom ferromagnetic structure 103 from diffusing into the nonmagnetic insulating layer 108; alternatively, a buffer material layer is formed above the nonmagnetic insulating layer 108, and the buffer material layer can block B ions in the top ferromagnetic structure from diffusing into the nonmagnetic insulating layer 108; alternatively, a buffer material layer is formed below the nonmagnetic insulating layer 108 and above the nonmagnetic insulating layer 108, the buffer material layer can block B ions in the bottom ferromagnetic structure 103 from diffusing into the nonmagnetic insulating layer 108, and the buffer material layer can block B ions in the top ferromagnetic structure from diffusing into the nonmagnetic insulating layer 108. Under the three conditions, the nonmagnetic insulating layer 108 is not easily affected by B ions and has a high magnetic resistance ratio, and a plurality of magnetic tunnel junction units are formed after the bottom ferromagnetic structure 103, the buffer material layer, the nonmagnetic insulating layer 108 and the top ferromagnetic structure are patterned subsequently, so that the tunnel magnetic resistance effect of the magnetic tunnel junction units is high when the semiconductor structure works, and the electrical property of the semiconductor structure is favorably improved.
In this embodiment, the buffer material layer below the nonmagnetic insulating layer 108 is used as the first buffer material layer 105, and the buffer material layer above the nonmagnetic insulating layer 108 is used as the second buffer material layer 109.
It should be noted that, in this embodiment, the step of forming the buffer material layer and the nonmagnetic insulating layer 108 on the bottom ferromagnetic structure 103 includes: forming the first buffer material layer 105; forming a nonmagnetic insulating layer 108 on the first buffer material layer 105; a second buffer 109 is formed on the nonmagnetic insulating layer 108.
As shown in fig. 4, a first buffer material layer 105 is formed on the bottom ferromagnetic structure 103.
The material of the first buffer material layer 105 includes a non-magnetic insulating material.
In this embodiment, the material of the first buffer material layer 105 includes BN. BN has good thermal stability, and thus is not easily decomposed during the annealing process performed subsequently, and B in the first buffer material layer 105 is not easily diffused into the non-magnetic insulating layer formed subsequently; and BN is generally rhombohedral lattice or cubic lattice structure, so that the crystal lattice of BN is small, and the gaps between the crystal lattices of BN are small, so that the first buffer material layer 105 can play a role of blocking B in the bottom ferromagnetic structure 103 from passing through, so that the non-magnetic insulating layer has a large magnetoresistance ratio. In addition, BN is not easily reacted with the iron group metal or alloy, that is, the first buffer material layer 105 is not easily reacted with the bottom ferromagnetic structure 103, so that the first buffer material layer 105 has good blocking stability.
In this embodiment, the first buffer material Layer 105 is formed by a Plasma Enhanced Atomic Layer Deposition (PEALD) process. Through a plasma enhanced atomic layer deposition process, the first buffer material layer 105 is formed on the surface of the bottom ferromagnetic structure 103 in an atomic layer manner, so that the uniformity, thickness uniformity and compactness of the deposition rate of the first buffer material layer 105 are improved, and the probability of generating defects such as pinholes, cavities, cracks and the like in the first buffer material layer 105 is reduced; in addition, the process temperature of the atomic layer deposition process is generally low, so that the Thermal Budget (Thermal Budget) is favorably reduced, and the probability of performance deviation of the device at the bottom of the dielectric layer 101 is reduced. In other embodiments, the first buffer material layer 105 may also be formed by a chemical vapor deposition process or a physical vapor deposition process.
In the step of forming the first buffer material layer 105, the first buffer material layer 105 is not too thick or too thin. If the first buffer material layer 105 is too thin, the first buffer material layer 105 is difficult to block B in the bottom ferromagnetic structure 103 from diffusing into the nonmagnetic insulating layer, so that the content of amorphous MgO in the nonmagnetic insulating layer is not easily increased in the subsequent annealing process, the tunnel magnetoresistance effect of the magnetic tunnel junction unit is strong, and when the magnetic tunnel junction unit works, electrons cannot be well blocked to realize electron tunneling on the nonmagnetic insulating layer, and thus the magnetic tunnel junction unit is difficult to control switching between a high resistance state and a low resistance state, and the magnetoresistance ratio of the magnetic tunnel junction unit is poor. If the first buffer material layer 105 is too thick, it is not beneficial to improve the forming efficiency of the first buffer material layer 105, and further the forming rate of the semiconductor structure is not easily improved, and if the first buffer material layer 105 is too thick, it is difficult to realize electron tunneling during the subsequent magnetic tunnel junction unit operation, which results in that the magnetic tunnel junction unit cannot be conveniently switched between the high resistance state and the low resistance state. In this embodiment, in the step of forming the first buffer material layer 105, the thickness of the first buffer material layer 105 is
To
Referring to fig. 5, a nonmagnetic insulating layer 108 is formed on the first buffer material layer 105.
The nonmagnetic insulating layer 108 serves to electrically isolate the bottom ferromagnetic structure 103 from the subsequently formed top ferromagnetic structure while allowing tunneling of electrons through the nonmagnetic insulating layer 108 under appropriate conditions.
Specifically, the material of the nonmagnetic insulating layer 108 includes MgO, AlO, AlN, or AlON. In this embodiment, the material of the nonmagnetic insulating layer 108 includes MgO.
In this embodiment, the nonmagnetic insulating layer 108 is formed by an Electron Beam Evaporation (EBE) process. The electron beam evaporation process is to heat the single-crystal metal oxide by electron beams to melt or sublimate and gasify the single-crystal metal oxide, deposit the single-crystal metal oxide on the bottom ferromagnetic structure 103, and obtain the high-purity nonmagnetic insulating layer 108 after cooling. In other embodiments, the nonmagnetic insulating layer may also be formed by a plasma enhanced atomic layer deposition process, a chemical vapor deposition process, or a physical vapor deposition process.
It should be noted that, in the step of forming the nonmagnetic insulating layer 108 by using the electron beam evaporation process, the temperature is not too high nor too low. If the temperature is too high, the metal oxide is melted or sublimated too fast under the heating of the electron beam, which easily causes the poor thickness uniformity of the non-magnetic insulating layer 108 at each position on the first buffer material layer 105, and thus, the process risk, the process stability and the thermal budget are easily increased. If the temperature is too low, the metal oxide is too slow to melt or sublimate under the heating of the electron beam, so that the content of the gaseous metal oxide in the chamber is low, and correspondingly, the speed of depositing the nonmagnetic insulating layer 108 on the first buffer material layer 105 is too slow, and the forming speed of the semiconductor structure is not easy to increase. In this embodiment, in the step of forming the nonmagnetic insulating layer 108 by using the electron beam evaporation process, the temperature is 300 ℃ to 500 ℃.
In the step of forming the nonmagnetic insulating layer 108 on the first buffer material layer 105, the nonmagnetic insulating layer 108 is not too thick or too thin. If the non-magnetic insulating layer 108 is too thick, a bias voltage large enough needs to be applied to the magnetic tunnel junction unit, so that electrons can tunnel through the non-magnetic insulating layer 108, the magnetic tunnel junction unit cannot be conveniently switched between a high resistance state and a low resistance state, the reduction of energy consumption of the magnetic tunnel junction unit is not facilitated, and the electrical performance of the semiconductor structure is poor. If the non-magnetic insulating layer 108 is too thin, electrons cannot be well blocked from realizing electron tunneling on the non-magnetic insulating layer 108 when the magnetic tunnel junction unit works, so that the magnetic tunnel junction unit is difficult to control switching between a high resistance state and a low resistance state, and the magnetic resistance ratio of the magnetic tunnel junction unit is poor. In this embodiment, in the step of forming the nonmagnetic insulating layer 108 on the first buffer material layer 105, the thickness of the nonmagnetic insulating layer 108 is 1 nm to 3 nm.
Referring to fig. 6, a second buffer material layer 109 is formed on the nonmagnetic insulating layer 108.
In the method for forming the semiconductor structure provided by the embodiment of the invention, the material of the top ferromagnetic structure usually includes FeCoB, and the second buffer material layer 109 can prevent B ions in the top ferromagnetic structure from diffusing into the nonmagnetic insulating layer 108, so that the nonmagnetic insulating layer 108 is not easily affected by the B ions when the semiconductor structure works, and has a higher magnetoresistance ratio, so that the tunnel magnetoresistance effect of the magnetic tunnel junction unit is stronger, and the electrical property of the semiconductor structure is favorably improved.
The material of the second buffer material layer 109 includes a non-magnetic insulating material. The second buffer material layer 109 can, together with the first buffer material layer 105 and the nonmagnetic insulating layer 108, achieve electrical isolation between the bottom ferromagnetic structure 103 and the subsequently formed top ferromagnetic structure while allowing electron tunneling through the first buffer material layer 105, the nonmagnetic insulating layer 108, and the second buffer material layer 109 under appropriate conditions.
In this embodiment, the material of the second buffer material layer 109 includes BN. BN has good thermal stability, and thus is not easily decomposed during the annealing process performed subsequently, and B in the second buffer material layer 109 is not easily diffused into the nonmagnetic insulating layer 108; and BN is usually rhombus lattice or cubic lattice structure, so that the crystal lattice of BN is small, and the gap between the crystal lattices of BN is small, so that the second buffer material layer 109 can play a role of blocking B in the top ferromagnetic structure from passing through, so that the magnetic resistance of the non-magnetic insulating layer 108 is large. In addition, BN is not easily reactive with the fe group metal or alloy, that is, the buffer material layer is not easily reactive with the subsequently formed top ferromagnetic structure, which can make the second buffer material layer 109 have good blocking stability.
In this embodiment, the second buffer material Layer 109 is formed by a Plasma Enhanced Atomic Layer Deposition (PEALD) process. Through a plasma enhanced atomic layer deposition process, the second buffer material layer 109 is formed on the surface of the nonmagnetic insulating layer 108 in an atomic layer manner, so that the uniformity, thickness uniformity and compactness of the deposition rate of the second buffer material layer 109 are improved, and the probability of generating defects such as pinholes, cavities, cracks and the like in the second buffer material layer 109 is reduced; in addition, the process temperature of the atomic layer deposition process is generally low, so that the Thermal Budget (Thermal Budget) is favorably reduced, and the probability of performance deviation of the device at the bottom of the dielectric layer 101 is reduced. In other embodiments, the second buffer material layer 109 may also be formed by a chemical vapor deposition process or a physical vapor deposition process.
In the step of forming the second buffer material layer 109, the second buffer material layer 109 is not too thick or too thin. If the second buffer material layer 109 is too thin, the second buffer material layer 109 is difficult to block B in the top ferromagnetic structure from diffusing into the nonmagnetic insulating layer 108, in the subsequent annealing process, the content of amorphous MgO in the nonmagnetic insulating layer 108 is not easily increased, so that the tunnel magnetoresistance effect of the magnetic tunnel junction unit is strong, and when the magnetic tunnel junction unit works, electrons cannot be well blocked from realizing electron tunneling on the nonmagnetic insulating layer 108, so that the magnetic tunnel junction unit is difficult to control the switching between the high resistance state and the low resistance state, and the magnetoresistance ratio of the magnetic tunnel junction unit is poor. If the second buffer material layer 109 is too thick, it is not favorable to increase the forming efficiency of the second buffer material layer 109, and thus the forming rate of the semiconductor structure is not easily increased, andif the second buffer material layer 109 is too thick, it is difficult to realize electron tunneling during the subsequent operation of the magnetic tunnel junction unit, so that the magnetic tunnel junction unit cannot be conveniently switched between a high resistance state and a low resistance state. In this embodiment, in the step of forming the second buffer material layer 109, the thickness of the second buffer material layer 109 is
To
It should be noted that, in other embodiments, the step of forming the buffer material layer and the nonmagnetic insulating layer on the bottom ferromagnetic structure includes: forming the buffer material layer; and forming a nonmagnetic insulating layer on the buffer material layer.
The buffer material layer can prevent B ions in the bottom ferromagnetic structure from diffusing into the nonmagnetic insulating layer, the nonmagnetic insulating layer is not easily influenced by the B ions and has a high magnetic resistance ratio, and a plurality of magnetic tunnel junction units are formed after the bottom ferromagnetic structure, the buffer material layer, the nonmagnetic insulating layer and the top ferromagnetic structure are patterned subsequently, so that the tunnel magnetic resistance effect of the magnetic tunnel junction units is strong when the semiconductor structure works, and the improvement of the electrical property of the semiconductor structure is facilitated.
In other embodiments, the step of forming a layer of buffer material and a non-magnetic insulating layer on the bottom ferromagnetic structure comprises: forming the nonmagnetic insulating layer; after the non-magnetic insulating layer is formed, the buffer material layer is formed.
A layer of buffer material is typically formed over the nonmagnetic insulating layer, the layer of buffer material being capable of blocking diffusion of B ions in the top ferromagnetic structure into the nonmagnetic insulating layer. The non-magnetic insulating layer is not easily affected by B ions and has a high magnetic resistance ratio, and a plurality of magnetic tunnel junction units are formed after the bottom ferromagnetic structure, the buffer material layer, the non-magnetic insulating layer and the top ferromagnetic structure are patterned subsequently, so that the tunnel magnetic resistance effect of the magnetic tunnel junction units is high when the semiconductor structure works, and the electric property of the semiconductor structure is improved.
Referring to FIG. 7, a top ferromagnetic structure 106 is formed on the nonmagnetic insulating layer 108
Specifically, a top ferromagnetic structure 106 is formed on the second buffer material layer 109.
The top ferromagnetic structure 106, the buffer material layer, the nonmagnetic insulating layer 105, and the bottom ferromagnetic structure 103 provide for the subsequent formation of a magnetic tunnel junction cell.
The top ferromagnetic structure 106 has a free magnetic orientation, and when the magnetic tunnel junction cell is operating, the magnetic polarity of the top ferromagnetic structure 106 is typically changed or switched using the Spin Transfer Torque (STT) effect, parallel or opposite to the magnetization direction of the bottom ferromagnetic structure 103, thereby enabling the magnetic tunnel junction cell to be in a low resistance state or a high configuration. According to the STT effect, a current flows through the magnetic tunnel junction cell to induce a flow of electrons from the bottom ferromagnetic structure 103 to the top ferromagnetic structure 106. As the electrons pass through the bottom ferromagnetic structure 103, the spins of the electrons are polarized. When the spin-polarized electrons reach the top ferromagnetic structure 106, the spin-polarized electrons apply a torque to the top ferromagnetic structure 106 and switch the state of the top ferromagnetic structure 106.
In this embodiment, the top ferromagnetic structure 106 includes a first free layer 1061 and a second free layer 1062 on the first free layer 1061. Magnetic line closure is formed between the first free layer 1061 and the second free layer 1062, and the magnetic line closure can prevent the magnetic direction between the magnetic tunnel junction units from being affected by the leaked magnetic lines.
Specifically, the material of the first free layer 1061 includes FeCo, CoNi, CoFeB, FeB, FePt, FePd, and an alloy of Fe, Co, and Ni. In this embodiment, the material of the first free layer 1061 includes CoFeB.
In this embodiment, the first free layer 1061 is formed by a physical vapor deposition process. In other embodiments, the first free layer may be formed by a chemical vapor deposition or atomic layer deposition process.
The material of the second free layer 1062 includes FeCo, CoNi, CoFeB, FeB, FePt, FePd, and an alloy of Fe, Co, and Ni. In this embodiment, the material of the second free layer 1062 includes an alloy of Co and Ni.
In this embodiment, the second free layer 1062 is formed by a physical vapor deposition process. In other embodiments, the second free layer may be formed by a chemical vapor deposition or atomic layer deposition process.
The method for forming the semiconductor structure further comprises the following steps: after the top ferromagnetic structure 106 is formed, the bottom ferromagnetic structure 103, the buffer material layer, the nonmagnetic insulating layer 108, and the top ferromagnetic structure 106 are annealed.
The annealing process makes FeCoB in the pinned layer 1032 of the bottom ferromagnetic structure 103 and the first free layer 1061 of the top ferromagnetic structure 106 change from amorphous to single-crystalline state, and MgO in the non-magnetic insulating layer 108 changes from multi-crystalline to single-crystalline state, so that the Tunnel Magnetoresistance (TMR) effect of the magnetic tunnel junction cell is strong; and the annealing process can magnetize the magnetic particles in the bottom ferromagnetic structure 103 and the top ferromagnetic structure 106, so that the spin directions of the magnetic particles in the bottom ferromagnetic structure 103 and the top ferromagnetic structure 106 are ordered, and the Tunnel Magnetoresistance (TMR) effect of the subsequently formed magnetic tunnel junction unit is strong.
The annealing process results in an increased diffusion rate of B ions in the bottom ferromagnetic structure 103 and B ions in the top ferromagnetic structure 106. The first buffer material layer 105 can prevent B ions in the bottom ferromagnetic structure 103 from diffusing into the nonmagnetic insulating layer 108, and the second buffer material layer 109 can prevent B ions in the top ferromagnetic structure 106 from diffusing into the nonmagnetic insulating layer 108, so that when the semiconductor structure works, the nonmagnetic insulating layer 108 is not easily affected by the B ions, and has a high magnetoresistance ratio, so that a tunnel magnetoresistance effect of a subsequently formed magnetic tunnel junction unit is strong, and the electrical property of the semiconductor structure is favorably improved.
In this embodiment, annealing may be performed by high-intensity magnetic field annealing.
Referring to fig. 8, a second electrode 107 is formed on the top ferromagnetic structure 106.
The second Electrode 107 is a Top Electrode (TE), and the second Electrode 107 is used for electrically connecting the magnetic tunnel junction unit and a metal layer formed on the magnetic tunnel junction unit.
In this embodiment, the material of the second electrode 107 is one or more of tantalum nitride (TaN), tantalum (Ta), titanium (Ti), and titanium nitride (TiN). In this embodiment, the second electrode 107 has a single-layer structure, and the material of the second electrode 107 is tantalum.
Referring to fig. 9 and 10, the method of forming the semiconductor structure further includes: after the second electrode 107 is formed, the bottom ferromagnetic structure 103, the buffer material layer, the nonmagnetic insulating layer 108, and the top ferromagnetic structure 106 are patterned to form a plurality of magnetic tunnel junction units 200. Wherein figure 10 is a schematic diagram of a magnetic tunnel junction cell.
Specifically, in the process of forming the magnetic tunnel junction cell 200: the first electrode 104 and the second electrode 107 are also patterned.
In this embodiment, dry etching is used for patterning. The dry etching process has anisotropic etching characteristics and good etching profile controllability, is beneficial to enabling the morphology of the magnetic tunnel junction unit 200 to meet the process requirements, and can use the dielectric layer 101 as an etching stop position in the dry etching process, so that the conductive structure 102 in the dielectric layer 101 is not easily damaged; in addition, the first electrode 104, the bottom ferromagnetic structure 103, the buffer material layer, the nonmagnetic insulating layer 108, the top ferromagnetic structure 106, and the second electrode 107 can be etched in the same etching apparatus by replacing the etching gas, simplifying the process steps.
Correspondingly, the embodiment of the invention also provides a semiconductor structure. Referring to fig. 9, a schematic structural diagram of an embodiment of a semiconductor structure of the present invention is shown.
The semiconductor structure includes: a substrate 100; a bottom ferromagnetic structure 103 on the substrate 100; a layer of buffer material and a non-magnetic insulating layer 108 on the bottom ferromagnetic structure 103; a top ferromagnetic structure 106 on the nonmagnetic insulating layer 108.
The materials of the bottom ferromagnetic structure 103 and the top ferromagnetic structure 106 generally comprise FeCoB, and the buffer material layer is located below the nonmagnetic insulating layer 108 and can block B ions in the bottom ferromagnetic structure 103 from diffusing into the nonmagnetic insulating layer 108; alternatively, a buffer material layer is located above the nonmagnetic insulating layer 108, and the buffer material layer can block the B ions in the top ferromagnetic structure 106 from diffusing into the nonmagnetic insulating layer 108; alternatively, a buffer material layer is located below the nonmagnetic insulating layer 108 and above the nonmagnetic insulating layer 108, the buffer material layer can block B ions in the bottom ferromagnetic structure 103 from diffusing into the nonmagnetic insulating layer 108, and the buffer material layer can block B ions in the top ferromagnetic structure 106 from diffusing into the nonmagnetic insulating layer 108. Under the three conditions, the nonmagnetic insulating layer 108 is not easily affected by B ions and has a high magnetoresistance ratio, and the bottom ferromagnetic structure 103, the buffer material layer, the nonmagnetic insulating layer 108 and the top ferromagnetic structure 106 are used as the magnetic tunnel junction unit 200, so that when the semiconductor structure works, the tunnel magnetoresistance effect of the magnetic tunnel junction unit is strong, and the improvement of the electrical property of the semiconductor structure is facilitated.
In this embodiment, the buffer material layer below the nonmagnetic insulating layer 108 is used as the first buffer material layer 105, and the buffer material layer above the nonmagnetic insulating layer 108 is used as the second buffer material layer 109.
In this embodiment, a first buffer material layer 105 is formed below the nonmagnetic insulating layer 108; a second buffer material layer 109 is formed over the nonmagnetic insulating layer 108.
The substrate 100 is used to provide a process platform for a process. The substrate 100 comprises a dielectric layer 101 and a conductive structure 102 located in said dielectric layer 101.
In this embodiment, the bottom of the dielectric layer 101 may have functional structures such as a transistor, a resistor structure, and a conductive structure. The transistor may be one or two of an NMOS transistor and a PMOS transistor, and specifically, the transistor includes a gate structure, and source-drain doped regions located at two sides of the gate structure.
The dielectric layer 101 is used for realizing electrical isolation between the conductive structures 102 and between the device at the bottom of the dielectric layer 101 and the magnetic tunnel junction unit 200.
Specifically, the dielectric layer 101 is made of a low-k dielectric material (low-k dielectric material refers to a dielectric material having a relative dielectric constant of greater than or equal to 2.6 and less than or equal to 3.9), an ultra-low-k dielectric material (ultra-low-k dielectric material refers to a dielectric material having a relative dielectric constant of less than 2.6), a dielectric material such as silicon oxide, silicon nitride, or silicon oxynitride.
In this embodiment, the dielectric layer 101 is made of a low-k dielectric material, which is beneficial to reducing parasitic capacitance between the back-end interconnection structures, and further beneficial to reducing the back-end RC delay. In other embodiments, the dielectric layer may also be an inter-metal dielectric layer (IMD) according to the actual process.
The bottom end of the conductive structure 102 is connected to the source-drain doped region in the transistor at the bottom of the dielectric layer 101, and the top end of the conductive structure 102 is used for electrically connecting to the magnetic tunnel junction unit 200.
In this embodiment, the conductive structure 102 is made of copper. In other embodiments, the material of the conductive structure may also be cobalt, tungsten, or other conductive materials.
The bottom ferromagnetic structure 103 has a fixed magnetic orientation.
In the present embodiment, the bottom ferromagnetic structure 103 includes an antiferromagnetic layer 1031 and a pinned layer 1032 located on the antiferromagnetic layer 1031.
The antiferromagnetic layer 1031 is used to fix the magnetization direction of the pinned layer 1032 during writing of the magnetic tunnel junction cell 200, and thus, it is prevented from being influenced by the direction of an induced magnetic field generated when a current flows in a bit line or a word line due to insufficient coercivity of the pinned layer 1032.
Specifically, the material of the antiferromagnetic layer 1031 includes: one or more of platinum manganese (PtMn), iridium manganese (IrMn), rhodium manganese (RhMn), iron manganese (FeMn), Pt alloy, and Mn alloy. In the present embodiment, the material of the antiferromagnetic layer 1031 includes platinum manganese (PtMn).
The pinned layer 1032 comprises a Fe-containing material. Specifically, the material of the pinned layer 1032 includes: one or more of FeCoB, CoFeTa, NiFe and FePt. In this embodiment, the material of the pinned layer 1032 includes FeCoB.
The semiconductor structure further includes: a first electrode located between the conductive structure 102 and the bottom ferromagnetic structure 103.
The first Electrode 104 is a Bottom Electrode (BE), and the first Electrode 104 is used for electrically connecting with the magnetic tunnel junction unit 200.
In this embodiment, the material of the first electrode 104 is one or more of tantalum nitride (TaN), tantalum (Ta), titanium (Ti), and titanium nitride (TiN). In this embodiment, the first electrode 104 has a single-layer structure, and the material of the first electrode 104 is tantalum.
The first buffer material layer 105 can block B ions in the bottom ferromagnetic structure 103 from diffusing into the nonmagnetic insulating layer 108, so that when the semiconductor structure works, the nonmagnetic insulating layer 108 is not easily affected by the B ions in the bottom ferromagnetic structure 103, and has a higher magnetoresistance ratio, so that the tunnel magnetoresistance effect of the magnetic tunnel junction unit 200 is stronger, and the electrical performance of the semiconductor structure is favorably improved.
The material of the first buffer material layer 105 includes a non-magnetic insulating material.
In this embodiment, the material of the first buffer material layer 105 includes BN. BN has good stability and is therefore not easily decomposed, and B in the first buffer material layer 105 is not easily diffused into the nonmagnetic insulating layer 108; and BN is generally rhombohedral lattice or cubic lattice structure, so that the crystal lattice of BN is small, and the gaps between the crystal lattices of BN are small, so that the first buffer material layer 105 can play a role of blocking B in the bottom ferromagnetic structure 103 from passing through, so that the non-magnetic insulating layer has a large magnetoresistance ratio. In addition, BN is not easily reacted with the iron group metal or alloy, that is, the first buffer material layer 105 is not easily reacted with the bottom ferromagnetic structure 103, so that the first buffer material layer 105 has good blocking stability.
Note that the first buffer material layer 105 is not too thick nor too thin. If soThe first buffer material layer 105 is too thin, the first buffer material layer 105 is difficult to block B in the bottom ferromagnetic structure 103 from diffusing into the nonmagnetic insulating layer 108, so that the content of amorphous MgO in the nonmagnetic insulating layer 108 is reduced, the tunnel magnetoresistance effect of the magnetic tunnel junction unit 200 is poor, and when the magnetic tunnel junction unit 200 works, electrons cannot be well blocked from realizing electron tunneling on the nonmagnetic insulating layer 108, so that the magnetic tunnel junction unit 200 is difficult to control switching between a high resistance state and a low resistance state. If the first buffer material layer 105 is too thick, it is not beneficial to improve the forming efficiency of the first buffer material layer 105, and further the forming rate of the semiconductor structure is not easily improved, and if the first buffer material layer 105 is too thick, it is difficult to implement electron tunneling when the magnetic tunnel junction unit 200 works, resulting in that the magnetic tunnel junction unit 200 cannot be conveniently switched between the high resistance state and the low resistance state. In this embodiment, the thickness of the first buffer material layer 105 is
To
The nonmagnetic insulating layer 108 serves to electrically isolate the bottom ferromagnetic structure 103 from the top ferromagnetic structure 106 while allowing tunneling of electrons through the nonmagnetic insulating layer 108 under appropriate conditions.
Specifically, the material of the nonmagnetic insulating layer 108 includes MgO, AlO, AlN, or AlON. In this embodiment, the material of the nonmagnetic insulating layer 108 includes MgO.
It should be noted that the nonmagnetic insulating layer 108 is not too thick or too thin. If the non-magnetic insulating layer 108 is too thick, a bias voltage large enough needs to be applied to the magnetic tunnel junction unit 200, so that electrons can tunnel through the non-magnetic insulating layer 108, and the magnetic tunnel junction unit 200 cannot be conveniently switched between a high resistance state and a low resistance state, which is not beneficial to reducing the energy consumption of the magnetic tunnel junction unit 200, and leads to poor electrical performance of the semiconductor structure. If the non-magnetic insulating layer 108 is too thin, electrons cannot be well blocked from realizing electron tunneling to the non-magnetic insulating layer 108 when the magnetic tunnel junction unit 200 works, so that the magnetic tunnel junction unit 200 is difficult to control switching between a high resistance state and a low resistance state, and the magnetic resistance ratio of the magnetic tunnel junction unit 200 is poor. In this embodiment, the thickness of the nonmagnetic insulating layer 108 is 1 nm to 3 nm.
The second buffer material layer 109 can block B ions in the top ferromagnetic structure 106 from diffusing into the nonmagnetic insulating layer 108, so that when the semiconductor structure works, the nonmagnetic insulating layer 108 is not easily affected by the B ions, and has a higher magnetoresistance ratio, so that the magnetic tunnel junction unit 200 has a stronger tunnel magnetoresistance effect, and the electrical performance of the semiconductor structure is improved.
The material of the second buffer material layer 109 includes a non-magnetic insulating material. The second buffer material layer 109 can, together with the first buffer material layer 105 and the nonmagnetic insulating layer 108, achieve electrical isolation between the bottom ferromagnetic structure 103 and the top ferromagnetic structure 106 while allowing electron tunneling through the first buffer material layer 105, the nonmagnetic insulating layer 108, and the second buffer material layer 109 under appropriate conditions.
In this embodiment, the material of the second buffer material layer 109 includes BN. BN has good stability and is not easy to decompose, and B in the second buffer material layer 109 is not easy to diffuse into the nonmagnetic insulating layer 108; and BN is usually rhombus lattice or cubic lattice structure, so that the crystal lattice of BN is small, and the gaps between the crystal lattices of BN are small, so that the second buffer material layer 109 can play a role of blocking B in the top ferromagnetic structure 106 from passing through, and the magnetic resistance of the nonmagnetic insulating layer 108 is large. In addition, BN is not easily reacted with the iron group metal or alloy, that is, the buffer material layer 108 is not easily reacted with the top ferromagnetic structure 106, so that the blocking stability of the second buffer material layer 109 can be good.
It should be noted that the second buffer material layer 109 is not too thick or too thin. If the second buffer material layer 109 is too thin, the second buffer material layer 109 is difficult to block B in the top ferromagnetic structure 106 from diffusing into the non-magnetic insulating layer 108, which results in a decrease in the content of amorphous MgO in the non-magnetic insulating layer 108, which results in a poor tunnel magnetoresistance effect of the magnetic tunnel junction unit 200, and the magnetic tunnel junction unit 200 cannot operateThe non-magnetic insulating layer 108 is well blocked from electron tunneling, so that the magnetic tunnel junction unit 200 is difficult to control switching between a high resistance state and a low resistance state. If the second buffer material layer 109 is too thick, it is not beneficial to improve the forming efficiency of the second buffer material layer 109, and further the forming rate of the semiconductor structure is not easily improved, and if the second buffer material layer 109 is too thick, it is difficult to implement electron tunneling when the magnetic tunnel junction unit 200 works, which results in that the magnetic tunnel junction unit 200 cannot be conveniently switched between the high resistance state and the low resistance state. In this embodiment, the thickness of the second buffer material layer 109 is
To
The top ferromagnetic structure 106 has a free magnetic orientation, and when the magnetic tunnel junction cell 200 is operating, the magnetic polarity of the top ferromagnetic structure 106 is typically changed or switched using the Spin Transfer Torque (STT) effect, parallel or opposite to the magnetization direction of the bottom ferromagnetic structure 103, thereby enabling the magnetic tunnel junction cell 200 to be in a low resistance state or a high configuration. According to the STT effect, a current flows through the magnetic tunnel junction cell 200 to induce a flow of electrons from the bottom ferromagnetic structure 103 to the top ferromagnetic structure 106. As the electrons pass through the bottom ferromagnetic structure 103, the spins of the electrons are polarized. When the spin-polarized electrons reach the top ferromagnetic structure 106, the spin-polarized electrons apply a torque to the top ferromagnetic structure 106 and shear the state of the top ferromagnetic structure 106.
In this embodiment, the top ferromagnetic structure 106 includes a first free layer 1061 and a second free layer 1062 on the first free layer 1061. Magnetic line closure is formed between the first free layer 1061 and the second free layer 1062, and the magnetic line closure can prevent the magnetic tunnel junction unit 200 from being influenced by the magnetic line of force leaked outside.
Specifically, the material of the first free layer 1061 includes FeCo, CoNi, CoFeB, FeB, FePt, FePd, and an alloy of Fe, Co, and Ni. In this embodiment, the material of the first free layer 1061 includes CoFeB.
The material of the second free layer 1062 includes FeCo, CoNi, CoFeB, FeB, FePt, FePd, and an alloy of Fe, Co, and Ni. In this embodiment, the material of the second free layer 1062 includes an alloy of Co and Ni.
The semiconductor structure further includes: a second electrode 107 located on the top ferromagnetic structure 106.
The second Electrode 107 is a Top Electrode (TE), and the second Electrode 107 is used to electrically connect the magnetic tunnel junction unit 200 and a metal layer formed on the magnetic tunnel junction unit 200.
In this embodiment, the material of the second electrode 107 is one or more of tantalum nitride (TaN), tantalum (Ta), titanium (Ti), and titanium nitride (TiN). In this embodiment, the second electrode 107 has a single-layer structure, and the material of the second electrode 107 is tantalum.
It should be noted that, in other embodiments, the semiconductor structure has only one buffer material layer; a nonmagnetic insulating layer is on the buffer material layer.
The buffer material layer can prevent B ions in the bottom ferromagnetic structure from diffusing into the nonmagnetic insulating layer, the nonmagnetic insulating layer is not easily influenced by the B ions, and the nonmagnetic insulating layer has a high magnetic resistance ratio, so that the magnetic tunnel junction unit has a strong tunnel magnetic resistance effect when the semiconductor structure works, and the electric property of the semiconductor structure is favorably improved.
In other embodiments, the semiconductor structure has only one buffer material layer, and the non-magnetic insulating layer is located on the buffer material layer.
A buffer material layer is formed over the nonmagnetic insulating layer, the buffer material layer being capable of blocking B ions in the top ferromagnetic structure from diffusing into the nonmagnetic insulating layer. The nonmagnetic insulating layer is not easily affected by B ions and has higher magnetoresistance ratio, so that the tunnel magnetoresistance effect of the magnetic tunnel junction unit is stronger when the semiconductor structure works, and the electrical property of the semiconductor structure is favorably improved.
The semiconductor structure of this embodiment may be formed by the formation method described in the foregoing embodiment, or may be formed by other formation methods. For a detailed description of the semiconductor structure in this embodiment, reference may be made to the corresponding description in the foregoing embodiments, and details of this embodiment are not repeated herein.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (16)
1. A method of forming a semiconductor structure, comprising:
providing a substrate;
forming a bottom ferromagnetic structure on the substrate;
forming a buffer material layer and a non-magnetic insulating layer on the bottom ferromagnetic structure;
a top ferromagnetic structure is formed on the nonmagnetic insulating layer.
2. The method of forming a semiconductor structure of claim 1, wherein the step of forming the buffer material layer and nonmagnetic insulating layer comprises: forming a buffer material layer; forming a nonmagnetic insulating layer on the buffer material layer;
alternatively, the first and second electrodes may be,
forming a nonmagnetic insulating layer; forming a buffer material layer after forming the nonmagnetic insulating layer;
alternatively, the first and second electrodes may be,
the step of forming the buffer material layer and the nonmagnetic insulating layer includes: forming a buffer material layer; forming a nonmagnetic insulating layer on the buffer material layer; and after the nonmagnetic insulating layer is formed and before the top ferromagnetic structure is formed, forming a buffer material layer on the nonmagnetic insulating layer.
3. The method of claim 1 or 2, wherein the buffer material layer is formed by a plasma enhanced atomic layer deposition process, a chemical vapor deposition process, or a physical vapor deposition process.
4. The method of forming a semiconductor structure according to claim 1 or 2, wherein a material of the buffer material layer includes BN.
5. The method of claim 1 or 2, wherein in the step of forming the buffer material layer, the buffer material layer has a thickness of
To
6. The method of forming a semiconductor structure of claim 1, wherein a material of the nonmagnetic insulating layer comprises MgO, AlO, AlN, or AlON.
7. The method of forming a semiconductor structure of claim 1, wherein the bottom ferromagnetic structure comprises an antiferromagnetic layer and a pinned layer on the antiferromagnetic layer;
the material of the pinned layer includes FeCoB.
8. The method of forming a semiconductor structure of claim 1, wherein the top ferromagnetic structure comprises a first free layer and a second free layer on the first free layer;
the material of the first free layer includes FeCoB.
9. The method of forming a semiconductor structure of claim 1, further comprising: after the top ferromagnetic structure is formed, annealing the bottom ferromagnetic structure, the buffer material layer, the nonmagnetic insulating layer, and the top ferromagnetic structure.
10. A semiconductor structure, comprising:
a substrate;
a bottom ferromagnetic structure on the substrate;
a layer of buffer material and a non-magnetic insulating layer on the bottom ferromagnetic structure;
a top ferromagnetic structure on the nonmagnetic insulating layer.
11. The semiconductor structure of claim 10, wherein the layer of buffer material is between the bottom ferromagnetic structure and the nonmagnetic insulating layer;
alternatively, the first and second electrodes may be,
the buffer material layer is positioned between the nonmagnetic insulating layer and the top ferromagnetic structure;
alternatively, the first and second electrodes may be,
the nonmagnetic insulating layer is positioned between the two buffer material layers;
the top ferromagnetic structure is on a layer of buffer material on the nonmagnetic insulating layer.
12. The semiconductor structure of claim 10 or 11, wherein the material of the buffer material layer comprises BN.
13. The semiconductor structure of claim 10 or 11, wherein the buffer material layer has a thickness of
To
14. The semiconductor structure of claim 10, wherein a material of the nonmagnetic insulating layer comprises MgO, AlO, AlN, or AlON.
15. The semiconductor structure of claim 10, wherein the bottom ferromagnetic structure comprises an antiferromagnetic layer and a pinned layer on the antiferromagnetic layer;
the material of the pinned layer includes FeCoB.
16. The semiconductor structure of claim 10, wherein the top ferromagnetic structure comprises a first free layer and a second free layer on the first free layer;
the material of the first free layer includes FeCoB.
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