CN112993099A - Manufacturing method of LED chip with protective layer - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 36
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/025—Physical imperfections, e.g. particular concentration or distribution of impurities
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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Abstract
The invention provides a manufacturing method of an LED chip with a protective layer, which adds a space baking treatment after the growth of each quantum well layer is finished, and aims to properly reduce the problems of In precipitation, interface roughness, high defect density and the like caused by an In supersaturation state by a space baking mode after the growth of a high-In material is finished. Furthermore, compare individual layer AlGaN protective layer among the prior art, adopt the compound protective layer of GaN protective layer and AlGaN protective layer, can reduce with the quantum well layer in the lattice mismatch of InGaN material, and then weakened the adverse effect that the polarized electric field brought, improve the luminous efficacy of LED chip.
Description
Technical Field
The invention relates to the technical field of semiconductor photoelectronics, in particular to a manufacturing method of an LED chip with a protective layer.
Background
With the continuous development of science and technology, various LED (Light Emitting Diode) devices have been widely used in people's life and work, and bring great convenience to people's daily life.
Due to excellent physical and chemical characteristics of the III-V compound material, such as large forbidden bandwidth, high breakdown electric field, high electron saturation mobility and the like, the III-V compound material has attracted extensive attention and application in the fields of electricity, optics and the like, such as Micro-LEDs, Mini-LEDs, violet LEDs and the like which are popular in the market at present.
However, in practical applications, due to the limitations of materials, structures and processes, the mass application of various new LED products still has many problems, such as high defect density of crystals, severe overflow caused by insufficient electron confinement, strong polarization field caused by large lattice mismatch, and the like, which all pose great challenges to commercialization of LED products.
Therefore, how to improve the light emitting efficiency of the LED chip is an urgent technical problem to be solved by those skilled in the art.
Disclosure of Invention
In view of the above, in order to solve the above problems, the present invention provides a method for manufacturing an LED chip with a protective layer, which has the following technical scheme:
a manufacturing method of an LED chip with a protective layer comprises the following steps:
providing a substrate;
growing a quantum barrier layer on one side of the substrate at a first growth temperature;
growing a quantum well layer on the side of the quantum barrier layer away from the substrate at a second growth temperature;
performing air baking treatment on the quantum well layer at a third growth temperature, and growing a GaN protective layer on one side of the quantum well layer, which is far away from the substrate;
growing an AlGaN protective layer on one side of the GaN protective layer, which is far away from the substrate, at a fourth growth temperature;
repeatedly growing the quantum barrier layer, the quantum well layer, the GaN protective layer and the AlGaN protective layer at corresponding growth temperatures for a preset period;
growing a last quantum barrier layer at the first growth temperature;
wherein the first, second, third, and fourth growth temperatures are different from each other.
Optionally, in the above manufacturing method, in the first direction, an Al composition in the plurality of AlGaN protective layers is fixed;
the first direction is perpendicular to the substrate and is directed to the quantum barrier layer by the substrate.
Optionally, in the above manufacturing method, in the first direction, the Al composition in the plurality of AlGaN protective layers gradually increases;
the first direction is perpendicular to the substrate and is directed to the quantum barrier layer by the substrate.
Optionally, in the above manufacturing method, in the first direction, the Al composition in the plurality of AlGaN protective layers gradually decreases;
the first direction is perpendicular to the substrate and is directed to the quantum barrier layer by the substrate.
Optionally, in the above manufacturing method, before the step of growing the quantum barrier layer on one side of the substrate at the first growth temperature,
the manufacturing method further comprises the following steps:
and growing an undoped AlN low-temperature nucleating layer, an undoped GaN layer and an N-type current expanding layer on one side of the substrate in sequence.
Optionally, in the above manufacturing method, the N-type current spreading layer includes a plurality of periods of AlGaN layers and GaN layers stacked together.
Optionally, in the above manufacturing method, the AlGaN layer is an undoped AlGaN layer;
and the doping element of the GaN layer is Si element.
Optionally, in the above manufacturing method, after the last quantum barrier layer is grown at the first growth temperature,
the manufacturing method further comprises the following steps:
sequentially growing a P-type AlGaN superlattice electron blocking layer and a P-type GaN layer on one side of the last quantum barrier layer, which is far away from the substrate;
etching to expose part of the N-type current spreading layer;
and growing a first electrode on the N-type current extension layer, and growing a second electrode on the P-type GaN layer.
Optionally, in the above manufacturing method, a thickness of the GaN protection layer is smaller than a thickness of the AlGaN protection layer.
Optionally, in the above manufacturing method, the last quantum barrier layer has a thickness of 10nm to 30nm and is an undoped film layer.
Compared with the prior art, the invention has the following beneficial effects:
the invention provides a manufacturing method of an LED chip with a protective layer, which comprises the steps of firstly growing a quantum barrier layer, a quantum well layer, a GaN protective layer and an AlGaN protective layer In a variable temperature growth mode for a preset period, and adding air baking treatment after the growth of each quantum well layer is finished, so that the problems of In precipitation, interface roughness, high defect density and the like caused by an In supersaturation state are properly reduced through the air baking mode after the growth of a high In material is finished, and the crystal quality is improved to a certain extent.
And secondly, the grown GaN protective layer can protect the quantum well layer and reduce In precipitation, and the existence of the GaN protective layer can further raise the temperature to grow the AlGaN protective layer, so that the crystal quality of the AlGaN protective layer is improved, a higher effective electron barrier height is obtained, and electron leakage is reduced.
Furthermore, compare individual layer AlGaN protective layer among the prior art, adopt the compound protective layer of GaN protective layer and AlGaN protective layer, can reduce with the quantum well layer in the lattice mismatch of InGaN material, and then weakened the adverse effect that the polarized electric field brought, and then improve the luminous efficacy of LED chip.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic flow chart of a method for manufacturing an LED chip with a protective layer according to an embodiment of the present invention;
FIGS. 2-8 are schematic structural diagrams corresponding to the manufacturing method shown in FIG. 1;
fig. 9 is a schematic flowchart of another method for manufacturing an LED chip with a protective layer according to an embodiment of the present invention;
FIG. 10 is a schematic structural diagram corresponding to the manufacturing method shown in FIG. 9;
FIG. 11 is a schematic diagram of growth parameters of a multiple quantum structure in one period according to an embodiment of the present invention;
fig. 12 is a schematic flowchart of a method for manufacturing an LED chip with a protective layer according to another embodiment of the present invention;
FIGS. 13-15 are schematic structural views corresponding to the method of FIG. 12; .
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
Referring to fig. 1, fig. 1 is a schematic flow chart illustrating a method for manufacturing an LED chip with a protective layer according to an embodiment of the present invention.
The manufacturing method comprises the following steps:
s101: as shown in fig. 2, a substrate 11 is provided.
In this step, the substrate 11 includes, but is not limited to, a c-plane sapphire substrate.
S102: as shown in fig. 3, a quantum barrier layer 12 is grown on one side of the substrate 11 at a first growth temperature.
S103: as shown in fig. 4, a quantum well layer 13 is grown on the side of the quantum barrier layer 12 facing away from the substrate 11 at the second growth temperature.
S104: as shown in fig. 5, the quantum well layer 13 is subjected to a blank baking process at a third growth temperature, and a GaN protection layer 14 is grown on the side of the quantum well layer 13 away from the substrate 11.
S105: as shown in fig. 6, at a fourth growth temperature, an AlGaN protective layer 15 is grown on the side of the GaN protective layer 14 facing away from the substrate 11.
S106: as shown in fig. 7, the quantum barrier layer 12, the quantum well layer 13, the GaN protection layer 14, and the AlGaN protection layer 15 are repeatedly grown at corresponding growth temperatures for a predetermined period.
S107: as shown in fig. 8, at the first growth temperature, the last quantum barrier layer 12 is grown.
Wherein the first, second, third, and fourth growth temperatures are different from each other.
Optionally, the thickness of the GaN protection layer 14 is smaller than the thickness of the AlGaN protection layer 15.
In the embodiment, the manufacturing method firstly adopts a variable temperature growth mode to grow the quantum barrier layer 12, the quantum well layer 13, the GaN protection layer 14 and the AlGaN protection layer 15 for a preset period, and a blank baking treatment is added after the growth of each quantum well layer 13 is completed, so that the problems of In precipitation, interface roughness, high defect density and the like caused by an In supersaturation state are properly reduced through the blank baking mode after the growth of a high In material is completed, and the crystal quality is improved to a certain extent.
And secondly, the grown GaN protective layer 14 can protect the quantum well layer 13, so that In precipitation is reduced, the AlGaN protective layer 15 can be grown by heating due to the existence of the GaN protective layer 14, and the crystal quality of the AlGaN protective layer 15 is improved, so that a higher electron effective barrier height is obtained, and electron leakage is reduced.
Further, compare the individual layer AlGaN protective layer among the prior art, adopt GaN protective layer 14 and AlGaN protective layer 15's compound protective layer, can reduce with the lattice mismatch of InGaN material in the quantum well layer 13, and then weakened the adverse effect that the polarization electric field brought, and then improve LED chip's luminous efficacy.
Further, according to the above embodiment of the present invention, in the first direction, the Al composition in the plurality of AlGaN protection layers 15 is fixed;
the first direction is perpendicular to the substrate 11 and is directed from the substrate 11 to the quantum barrier layer 12.
In this embodiment, by controlling the Al composition in each AlGaN protective layer 15, the performance of the GaN protective layer 14 and the composite protective layer of the AlGaN protective layer 15 in terms of electron blocking and polarization field weakening is greatly improved.
Further, according to the above embodiment of the present invention, in the first direction, the Al composition in the AlGaN protection layer 15 gradually increases;
the first direction is perpendicular to the substrate 11 and is directed from the substrate 11 to the quantum barrier layer 12.
In this embodiment, by controlling the Al composition in each AlGaN protective layer 15, the performance of the GaN protective layer 14 and the composite protective layer of the AlGaN protective layer 15 in terms of electron blocking and polarization field weakening is greatly improved.
Further, according to the above embodiment of the present invention, the composition of Al in the AlGaN protection layer 15 is gradually decreased;
the first direction is perpendicular to the substrate 11 and is directed from the substrate 11 to the quantum barrier layer 12.
In this embodiment, by controlling the Al composition in each AlGaN protective layer 15, the performance of the GaN protective layer 14 and the composite protective layer of the AlGaN protective layer 15 in terms of electron blocking and polarization field weakening is greatly improved.
Further, based on the above embodiment of the present invention, referring to fig. 9, fig. 9 is a schematic flow chart of a manufacturing method of another LED chip with a protective layer according to an embodiment of the present invention.
The quantum barrier layer 12 is grown on one side of the substrate 11 at the first growth temperature, which is prior to the step,
the manufacturing method further comprises the following steps:
s108: as shown in fig. 10, an undoped AlN low-temperature nucleation layer 16, an undoped GaN layer 17, and an N-type current spreading layer 18 are sequentially grown on one side of the substrate 11.
Optionally, the N-type current spreading layer 18 includes a plurality of periods of AlGaN layers and GaN layers stacked together.
The AlGaN layer is an undoped AlGaN layer;
and the doping element of the GaN layer is Si element.
In this embodiment, the substrate 11 is a c-plane sapphire substrate as an example.
The equipment is MOCVD, and comprises TMGa/TEGa, TMAl, TMIn, and NH3Is Ga source, Al source, In source, N2As carrier gas, the N-type doping source is silane SiH4The P-type doping source is magnesium dicocene CP2 Mg.
And (3) placing the c-plane sapphire substrate into an MOCVD reaction chamber, introducing high-purity hydrogen at the temperature of 1100 ℃ for H-crystallization for 5-10min, cooling to the temperature of 960 ℃, introducing an Al source and an N source, and growing an undoped AlN low-temperature nucleation layer 16 with the thickness of 10 nm.
And continuously heating to 1050-1100 ℃, closing the Al source, introducing the TMGa source, and growing an undoped GaN layer of 2.0-2.5 um, wherein the aim is to reduce the lattice mismatch between the c-plane sapphire substrate and a subsequent growth material by growing the high-quality undoped GaN layer 17.
And then introducing an Al source at the temperature of 980-1020 ℃ to grow the AlGaN layer in the N-type current expansion layer 18, wherein the thickness of the AlGaN layer is 10-20 nm.
Closing Al source, introducing silane, growing Si-doped GaN layer with doping concentration of 5 × 1018cm-3-10×1018cm-3。
The AlGaN layer and the GaN layer alternately grow to form an N-type current expansion layer 18 with 10-20 periods, and the N-type current expansion layer 18 can further block dislocation by using an SL structure, improve the crystal quality and further enhance the current expansion capability by using an intermittent doping mode.
The specific growth process of steps S101-S107 will be explained in detail below:
referring to fig. 11, fig. 11 is a schematic diagram of growth parameters of a multiple quantum structure in one period according to an embodiment of the present invention.
Reducing the growth temperature to 800-900 ℃ in t0 time interval, and simultaneously introducing TEGa and SiH4Growing a quantum barrier layer 12 with the thickness of 8nm-15nm, wherein the doping concentration of the quantum barrier layer 12 is 5 multiplied by 1017cm-3-10×1017cm-3。
Continuously cooling to 700-800 deg.C, continuously introducing TEGa/TMIn and simultaneously closing SiH in t1 time interval4And H2And a quantum well layer 13 of 2nm to 4nm thickness is grown.
Then the Ga source and the In source are turned off, and only N is reserved2/NH3And raising the temperature by 20-40 ℃, and finishing air baking treatment, wherein the air baking time interval is t2, and t2 is more than 0 and less than or equal to 10 s.
The Ga source is continued to be applied for a time interval t3 to grow 10-20 a of the GaN cap layer 14.
Raising the temperature by 20-40 ℃, starting to introduce an Al source at the time interval of t4, and growing the AlGaN protective layer 15 with the thickness of 20-40 angstroms.
Then, the quantum barrier layer 12, the quantum well layer 13, the GaN protection layer 14, and the AlGaN protection layer 15 are repeatedly grown for a predetermined period, typically 5 to 10 periods, under corresponding growth conditions.
Finally, the Al source is turned off and H is turned on2And the time interval is t5, the temperature is raised to the growth temperature of the quantum barrier layer 12, and the last quantum barrier layer 12 grows.
The last quantum barrier layer 12 is 10nm-30nm thick and is an undoped film layer.
That is, the thickness of the last quantum barrier layer 12 is thicker than the thickness of the other quantum barrier layers 12.
Further, based on the above embodiments of the present invention, referring to fig. 12, fig. 12 is a schematic flow chart of a manufacturing method of an LED chip with a protective layer according to an embodiment of the present invention.
After the last quantum barrier layer 12 is grown at the first growth temperature,
the manufacturing method further comprises the following steps:
s109: as shown in fig. 13, a P-type AlGaN superlattice electron blocking layer 19 and a P-type GaN layer 20 are sequentially grown on the side of the last quantum barrier layer 12 away from the substrate 11.
S110: as shown in fig. 14, an etching process is performed to expose a portion of the N-type current spreading layer 18.
S111: as shown in fig. 15, a first electrode 21 is grown on the N-type current spreading layer 18, and a second electrode 22 is grown on the P-type GaN layer 20.
In the embodiment, after the last quantum barrier layer 12 is grown, the temperature is adjusted to 900-1000 ℃, an Al source, a TMGa source, an N source and magnesium dicocene are introduced to grow a P-type AlGaN superlattice electron blocking layer 19, the superlattice period is about 5-20, and the doping concentration is 1 multiplied by 1018cm-3-5×1018cm-3。
After the growth of the P-type AlGaN superlattice electron blocking layer 19 is completed, a P-type GaN layer 20 is grown on the side, away from the substrate 11, of the P-type AlGaN superlattice electron blocking layer 19 to serve as a contact layer, and the P-type doping concentration is 5 multiplied by 1018cm-3-10×1018cm-3In N at2Annealing at 850-900 deg.c for 20-30 min in atmosphere.
The grown epitaxial layer is then processed to expose a portion of the N-type current spreading layer 18.
A first electrode 21 is grown on the N-type current spreading layer 18, and a second electrode 22 is grown on the P-type GaN layer 20.
In the manufacturing method, when the film layer is grown, the pressure of the whole reaction growth is 100-300 torr.
The above detailed description is provided for the method for manufacturing an LED chip with a protective layer, and the principle and the implementation of the present invention are explained in this document by applying specific examples, and the description of the above examples is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
It should be noted that, in the present specification, the embodiments are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include or include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A manufacturing method of an LED chip with a protective layer is characterized by comprising the following steps:
providing a substrate;
growing a quantum barrier layer on one side of the substrate at a first growth temperature;
growing a quantum well layer on the side of the quantum barrier layer away from the substrate at a second growth temperature;
performing air baking treatment on the quantum well layer at a third growth temperature, and growing a GaN protective layer on one side of the quantum well layer, which is far away from the substrate;
growing an AlGaN protective layer on one side of the GaN protective layer, which is far away from the substrate, at a fourth growth temperature;
repeatedly growing the quantum barrier layer, the quantum well layer, the GaN protective layer and the AlGaN protective layer at corresponding growth temperatures for a preset period;
growing a last quantum barrier layer at the first growth temperature;
wherein the first, second, third, and fourth growth temperatures are different from each other.
2. The method according to claim 1, wherein an Al composition in the AlGaN protective layer is constant in the first direction;
the first direction is perpendicular to the substrate and is directed to the quantum barrier layer by the substrate.
3. The method according to claim 1, wherein the Al composition in the AlGaN protective layers is gradually increased in a first direction;
the first direction is perpendicular to the substrate and is directed to the quantum barrier layer by the substrate.
4. The method according to claim 1, wherein in the first direction, the Al composition in the AlGaN protective layers is gradually decreased;
the first direction is perpendicular to the substrate and is directed to the quantum barrier layer by the substrate.
5. The method of manufacturing according to claim 1, wherein, before the step of growing the quantum barrier layer on one side of the substrate at the first growth temperature,
the manufacturing method further comprises the following steps:
and growing an undoped AlN low-temperature nucleating layer, an undoped GaN layer and an N-type current expanding layer on one side of the substrate in sequence.
6. The method according to claim 5, wherein the N-type current spreading layer comprises a plurality of periods of AlGaN layer and GaN layer arranged in a stacked manner.
7. The method according to claim 6, wherein the AlGaN layer is an undoped AlGaN layer;
and the doping element of the GaN layer is Si element.
8. The method of claim 5, wherein a last quantum barrier layer is grown at the first growth temperature, and wherein after the step,
the manufacturing method further comprises the following steps:
sequentially growing a P-type AlGaN superlattice electron blocking layer and a P-type GaN layer on one side of the last quantum barrier layer, which is far away from the substrate;
etching to expose part of the N-type current spreading layer;
and growing a first electrode on the N-type current extension layer, and growing a second electrode on the P-type GaN layer.
9. The method of claim 1, wherein a thickness of the GaN protective layer is less than a thickness of the AlGaN protective layer.
10. The method as claimed in claim 1, wherein the last quantum barrier layer has a thickness of 10nm to 30nm and is an undoped layer.
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| CN202110178379.5A CN112993099B (en) | 2021-02-09 | 2021-02-09 | Manufacturing method of LED chip with protective layer |
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