CN112992794A - Semiconductor packaging device with optical transceiver and using method thereof - Google Patents
Semiconductor packaging device with optical transceiver and using method thereof Download PDFInfo
- Publication number
- CN112992794A CN112992794A CN202110272650.1A CN202110272650A CN112992794A CN 112992794 A CN112992794 A CN 112992794A CN 202110272650 A CN202110272650 A CN 202110272650A CN 112992794 A CN112992794 A CN 112992794A
- Authority
- CN
- China
- Prior art keywords
- semiconductor
- plate
- main body
- packaging plate
- lower packaging
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 145
- 239000004065 semiconductor Substances 0.000 title claims abstract description 116
- 230000003287 optical effect Effects 0.000 title claims abstract description 27
- 238000000034 method Methods 0.000 title claims abstract description 25
- 239000003822 epoxy resin Substances 0.000 claims abstract description 19
- 229920000647 polyepoxide Polymers 0.000 claims abstract description 19
- 238000007711 solidification Methods 0.000 claims abstract description 6
- 230000008023 solidification Effects 0.000 claims abstract description 6
- 238000005538 encapsulation Methods 0.000 claims description 15
- 238000002347 injection Methods 0.000 claims description 5
- 239000007924 injection Substances 0.000 claims description 5
- 239000003292 glue Substances 0.000 claims description 4
- 239000000463 material Substances 0.000 abstract description 5
- 230000001070 adhesive effect Effects 0.000 abstract description 3
- 230000000694 effects Effects 0.000 abstract description 3
- 238000010292 electrical insulation Methods 0.000 abstract description 3
- 238000009413 insulation Methods 0.000 abstract description 3
- 229920000642 polymer Polymers 0.000 abstract description 3
- 239000004033 plastic Substances 0.000 description 4
- 238000009434 installation Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 125000006850 spacer group Chemical group 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000001746 injection moulding Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
Abstract
The invention relates to a semiconductor packaging device with an optical transceiver and a use method thereof, wherein the semiconductor packaging device comprises a lower packaging plate and a clamping groove, clamping holes are formed in the periphery of the inner part of the lower packaging plate, an insulating gasket is arranged on the periphery of the upper end of the lower packaging plate, the clamping groove is formed in the periphery of the inner part of the lower packaging plate, and a placing groove is formed in the middle end of the inner part of the lower packaging plate. The semiconductor board main body is used as a packaged main product, a layer of nano cushion layer is placed at the lower end of the semiconductor board main body, the nano cushion layer has a good protection effect, and also has a good insulation operation, so that the normal operation of the semiconductor board main body is ensured, then molten epoxy resin is injected into a gap between the semiconductor board main body and the placing groove, and the semiconductor board main body is fixed after solidification, wherein the epoxy resin is a high polymer and has excellent physical mechanical and electrical insulation performance, adhesive property with various materials and flexibility of use process.
Description
Technical Field
The invention relates to the technical field of semiconductor packaging, in particular to a semiconductor packaging device with an optical transceiver and a using method thereof.
Background
The semiconductor packaging refers to a process of processing a wafer passing a test according to a product model and a functional requirement to obtain an independent chip whole body. The packaging process comprises the following steps: the wafer from the previous process of the wafer is cut into small chips through a scribing process, then the cut chips are attached to corresponding islands of a substrate frame through glue, bonding pads of the chips are connected to corresponding pins of the substrate through superfine metal wires or conductive resin to form a required circuit, then the independent chips are packaged and protected through plastic shells, a series of operations are carried out after plastic packaging, and finished product testing is carried out after the packaging is finished to ensure the precision of the chip main body.
The conventional semiconductor packaging device packages the semiconductor chip by plastic, but the conventional semiconductor packaging device is not only slightly insufficient in the degree of protecting the semiconductor chip, but also easily damages the semiconductor chip in the process of mounting and injection molding, which may cause excessive cost, reduced reliability or overlarge packaging size, and too low production efficiency, and cannot utilize a modern production line for packaging operation, thereby seriously affecting the packaging efficiency of the semiconductor chip.
Disclosure of Invention
It is an object of the present invention to provide a semiconductor package device having an optical transceiver and a method of using the same, to solve the above-mentioned problems, the conventional semiconductor packaging device proposed in the background art is packaged by plastic, but not only has a slight deficiency in the degree of protecting the chip, but also easily damages the chip during the mounting and injection molding process, and causes an excessive cost, the reliability is reduced or the package size is too large, and the production efficiency is too low, so that the modern assembly line can not be used for packaging operation, the packaging efficiency of the semiconductor is seriously influenced, when the semiconductor is fixed by the common packaging plate, once the clamping force is large, the semiconductor is easy to be clamped and damaged, however, if the clamping force is insufficient, the semiconductor may shake, which may damage the semiconductor and even affect the normal use of the semiconductor.
In order to achieve the purpose, the invention provides the following technical scheme: a semiconductor packaging device with an optical transceiver and a using method thereof comprise a lower packaging plate and a clamping groove, wherein the periphery of the inner part of the lower packaging plate is provided with a clamping hole, the periphery of the upper end of the lower packaging plate is provided with an insulating gasket, the clamping groove is arranged on the periphery of the inner part of the lower packaging plate, the middle end of the inner part of the lower packaging plate is provided with a placing groove, the lower end of the inner wall of the placing groove is provided with a nano cushion layer, the top of the upper end of the nano cushion layer is provided with a semiconductor plate main body, pins are arranged on the periphery of the outer wall of the semiconductor plate main body, the outer wall of the semiconductor plate main body and the inner wall of the placing groove are provided with epoxy resin, the middle part of the upper end of the semiconductor plate main body is provided with a contact plate interface, the periphery of the upper end of the contact plate interface is provided with optical transceiving, an open slot is formed in the middle end of the inner portion of the upper packaging plate, wiring circular grooves are formed in the periphery of the outer wall of the upper packaging plate, fixing screws are arranged on the periphery of the inner wall of the clamping hole, and a movable groove is formed in the middle of the lower end of the lower packaging plate.
Preferably, the lower packaging plate and the upper packaging plate are movably connected, and the lower packaging plate and the upper packaging plate are matched in size.
Preferably, the lower packaging plate is connected with the clamping block in a clamping manner through the clamping groove, and the clamping groove and the clamping block are embedded in a concave-convex manner.
Preferably, the lower package board is formed in a package structure by a placing groove and a semiconductor board body, and the placing groove and the semiconductor board body are associated with each other.
Preferably, the insulating spacers are symmetrically distributed along the central axis of the lower packaging plate, and the number of the insulating spacers is four.
Preferably, the clamping holes and the fixing screws are in threaded connection, and the clamping holes are uniformly distributed along the central axis of the upper packaging plate.
Preferably, the semiconductor board body is fixedly connected with the epoxy resin through the pins, and the semiconductor board body and the nano cushion layer are mutually attached.
Preferably, the open slot and the touch panel interface are distributed coaxially and linearly, and the open slot and the touch panel interface are distributed in different horizontal planes.
Preferably, the method of use thereof: the lower packaging plate is stably placed through the cross-shaped moving groove of the lower packaging plate, then the nanometer cushion layers with mutually matched sizes are placed on the inner wall of the placing groove of the lower packaging plate, the semiconductor plate main body to be packaged is placed at the upper end of the nanometer cushion layers, then molten epoxy resin is injected into the gap between the upper packaging plate and the placing groove through an adhesive injection machine, the semiconductor plate main body is fixed after solidification, the upper packaging plate is pressed on the upper end of the lower packaging plate to be embedded and fixed through the clamping groove and the clamping block, and then the semiconductor plate main body is fastened through the clamping hole by using a fixing screw to ensure the packaging stability of the semiconductor plate main body inside the semiconductor plate main body.
Compared with the prior art, the invention has the following beneficial effects:
1. according to the invention, through the arrangement of the lower packaging plate, the placing groove and the semiconductor plate main body, the rectangular semiconductor plate main body is arranged in the lower packaging plate, so that the lower packaging plate wraps the semiconductor plate main body to ensure the stability of the semiconductor plate main body, and the surface of the semiconductor plate main body and the placing groove are in the same horizontal shape, so that the protrusion of the surface of the semiconductor plate main body can be reduced, and the semiconductor plate main body can be well packaged in the interior for protection operation.
2. According to the invention, through the arrangement of the insulating gasket, the four round insulating gaskets are arranged on the periphery of the outer wall of the lower packaging plate, the material of the insulating gaskets has certain elasticity, when the upper packaging plate is embedded and pressed on the upper end of the lower packaging plate, the lower surface of the upper packaging plate can extrude the insulating gasket to deform the insulating gasket, the installation tightness of the insulating gasket is ensured by utilizing the elasticity of the insulating gasket, and meanwhile, the insulating gasket also has certain elastic support to ensure the packaging stability of the insulating gasket.
3. According to the invention, through the arrangement of the semiconductor board main body, the pins, the epoxy resin and the nano cushion layer, the semiconductor board main body is used as a main product to be packaged, the nano cushion layer is arranged at the lower end of the semiconductor board main body, the nano cushion layer has a good protection effect, and also has good insulation operation, so that the normal operation of the semiconductor board main body is ensured, then molten epoxy resin is injected into a gap between the semiconductor board main body and the placing groove, and the semiconductor board main body is fixed after solidification, wherein the epoxy resin is a high molecular polymer, and has excellent physical mechanical and electrical insulation properties, adhesive properties with various materials and flexibility of the use process.
4. According to the invention, through the arrangement of the semiconductor board main body, the touch panel interface, the upper packaging board and the open slot, the open slot and the touch panel interface are coaxially and linearly distributed, the rectangular open slot is formed in the middle of the upper packaging board, the touch panel interface at the upper end of the semiconductor board main body can be exposed through the open slot, so that the semiconductor board main body can be better connected with the outside, and the semiconductor board main body is positioned on different horizontal planes, so that the touch panel interface can be protected, and the loss probability of the semiconductor board main body can be reduced.
Drawings
FIG. 1 is a schematic diagram of an internal structure of a semiconductor package device with an optical transceiver and a method for using the same according to the present invention;
FIG. 2 is a schematic top view of a semiconductor package with an optical transceiver and method for using the same according to the present invention;
FIG. 3 is a schematic bottom view of a semiconductor package device with an optical transceiver and a method for using the same according to the present invention;
FIG. 4 is an expanded view of a semiconductor package device with an optical transceiver and method for using the same according to the present invention;
fig. 5 is a schematic diagram of an internal structure of a semiconductor package device with an optical transceiver and a method for using the same according to the present invention.
In the figure: 1. a lower package plate; 2. a card slot; 3. an insulating spacer; 4. a clamping hole; 5. a pin; 6. a semiconductor board main body; 7. a touch panel interface; 8. an optical transceiver contact; 9. an upper package board; 10. an open slot; 11. a clamping block; 12. moving the groove; 13. an epoxy resin; 14. a nano cushion layer; 15. a set screw; 16. a wiring circular groove; 17. and (6) placing the groove.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1-5, the present invention provides a technical solution: a semiconductor packaging device with an optical transceiver and a using method thereof comprise a lower packaging plate 1, a clamping groove 2, an insulating gasket 3, a clamping hole 4, a pin 5, a semiconductor plate body 6, a touch panel interface 7, an optical transceiver contact 8, an upper packaging plate 9, an open slot 10, a clamping block 11, a moving groove 12, epoxy resin 13, a nanometer cushion layer 14, a fixing screw 15, a wiring circular groove 16 and a placing groove 17, wherein the clamping hole 4 is formed in the periphery of the inner part of the lower packaging plate 1, the insulating gasket 3 is arranged on the periphery of the upper end of the lower packaging plate 1, the clamping groove 2 is arranged in the periphery of the inner part of the lower packaging plate 1, the placing groove 17 is formed in the middle end of the inner part of the lower packaging plate 1, the nanometer cushion layer 14 is arranged at the lower end of the inner wall of the placing groove 17, the semiconductor plate body 6 is arranged at the top part of the upper end of the nanometer cushion layer 14, the pin 5 is arranged on the periphery of the, a contact plate interface 7 is arranged in the middle of the upper end of a semiconductor plate main body 6, optical transceiving contacts 8 are arranged around the upper end of the contact plate interface 7, an upper packaging plate 9 is arranged at the top of the upper end of a lower packaging plate 1, a clamping block 11 is arranged at the lower end of the upper packaging plate 9 and the inner side of a clamping groove 2, an open groove 10 is formed in the middle of the inner part of the upper packaging plate 9, a wiring circular groove 16 is formed around the outer wall of the upper packaging plate 9, fixing screws 15 are arranged around the inner wall of the clamping hole 4, and a moving groove 12 is formed in the middle of the lower end of the.
In the invention, the lower packaging plate 1 and the upper packaging plate 9 are movably connected, the sizes of the lower packaging plate 1 and the upper packaging plate 9 are mutually matched, the whole semiconductor packaging device is packaged by adopting two composite plates of the lower packaging plate 1 and the upper packaging plate 9, and the sizes of the lower packaging plate 1 and the upper packaging plate 9 are mutually corresponding, so that the tightness of the lower packaging plate 1 and the upper packaging plate 9 in the packaging and connecting process can be ensured, the occurrence of gaps is avoided, the packaging instability can be caused, and the long-term use of the packaging is ensured.
The lower packaging board 1 forms a packaging structure through the placing groove 17 and the semiconductor board body 6, the placing groove 17 is associated with the semiconductor board body 6, the rectangular semiconductor board body 6 is arranged in the lower packaging board 1, the lower packaging board 1 is enabled to package the semiconductor board body 6, the stability of the semiconductor board body 6 is guaranteed, the surface of the semiconductor board body 6 and the placing groove 17 are in the same horizontal shape, the protrusion of the surface can be reduced, and the semiconductor board body 6 can be well packaged in the interior to be protected.
Insulating gasket 3 is the symmetric form along the axis department of lower packaging plate 1 and distributes, and insulating gasket 3 is provided with four, be provided with the circular shape insulating gasket 3 in four places on the outer wall of lower packaging plate 1 all around, certain elasticity has in its material, when embedding and laminating last packaging plate 9 and encapsulating under the upper end of packaging plate 1, the lower surface of its last packaging plate 9 can extrude its insulating gasket 3, make its insulating gasket 3 take place the deformation, utilize its elasticity to guarantee the compactness of its installation, and certain elastic support still has simultaneously, guarantee the stability of its encapsulation.
The clamping holes 4 and the fixing screws 15 are in threaded connection, the clamping holes 4 are uniformly distributed along the central axis of the upper packaging plate 9, the penetrating clamping holes 4 are formed in the periphery of the upper packaging plate 9, the same non-through clamping holes 4 are formed in the periphery of the lower packaging plate 1, threads are formed in the inner wall of the clamping holes 4, the fixing screws 15 can penetrate through the clamping holes 4 to package the lower packaging plate, and the stability of the connection position of the lower packaging plate is guaranteed.
The semiconductor board main body 6 is fixedly connected with the epoxy resin 13 through the pins 5, the semiconductor board main body 6 and the nano cushion layer 14 are mutually attached, the semiconductor board main body 6 is used as a packaged main product, the nano cushion layer 14 is placed at the lower end of the semiconductor board main body, the nano cushion layer 14 has a good protection effect and also has a good insulation operation, the normal operation of the semiconductor board main body 6 is ensured, then the melted epoxy resin 13 is injected into a gap between the semiconductor board main body and the placing groove 17, the semiconductor board main body 6 is fixed after solidification, and the epoxy resin 13 is a high polymer and has good physical mechanical and electrical insulation performance, bonding performance with various materials and flexibility of the use process.
The open slot 10 and the contact plate interface 7 are distributed coaxially and linearly, and the open slot 10 and the contact plate interface 7 are distributed in different horizontal planes, the rectangular open slot 10 is arranged in the middle of the upper packaging plate 9, the contact plate interface 7 at the upper end of the semiconductor plate main body 6 can be exposed through the open slot 10, so that the contact plate interface can be better connected with the outside, and is located on different horizontal planes, the contact plate interface 7 can be protected, and the probability that the contact plate interface 7 is lost is reduced.
Semiconductor packaging devices with optical transceivers and methods of use thereof: the placing stability of the lower packaging plate 1 is ensured through the cross-shaped moving groove 12 of the lower packaging plate 1, then the nanometer cushion layer 14 with mutually matched size is placed on the inner wall of the placing groove 17 of the lower packaging plate 1, the semiconductor plate main body 6 to be packaged is placed at the upper end of the lower packaging plate, then the molten epoxy resin 13 is injected into the gap between the lower packaging plate 1 and the placing groove 17 through a glue injection machine, the semiconductor plate main body 6 is fixed after solidification, the upper packaging plate 9 is pressed on the upper end of the lower packaging plate 1, the upper packaging plate is embedded and fixed through the clamping groove 2 and the clamping block 11, and then the fixing screw 15 penetrates through the clamping hole 4 to be fastened, so that the packaging stability of the semiconductor plate main body 6 inside the lower packaging plate is ensured.
The working principle of the embodiment is as follows: the semiconductor packaging device with the optical transceiver and the using method thereof, when in use, firstly, the lower packaging plate 1 is kept stable through the cross-shaped moving groove 12 of the lower packaging plate 1, then the inner wall of the placing groove 17 at the middle end of the inner side of the lower packaging plate 1 is placed with the nanometer cushion layer 14 with the size matched with each other, the semiconductor plate main body 6 to be packaged is placed at the upper end of the lower packaging plate, then the molten epoxy resin 13 is injected to the gap between the lower packaging plate and the placing groove 17 through the glue injection machine on the packaging device to complete the injection of the periphery, after the epoxy resin 13 is solidified, the semiconductor plate main body 6 is fixed to ensure the stability of the semiconductor plate main body 6, then the upper packaging plate 9 is correspondingly pressed on the upper end of the lower packaging plate 1 to utilize the clamping groove 2 and the clamping block 11 to embed and fix the semiconductor plate, and then the fixing screw 15 passes through the clamping hole 4 to fasten, carry out fixed connection with last packaging board 9 with lower packaging board 1, when locking, the lower surface of going up packaging board 9 can extrude lower packaging board 1 upper end insulating gasket 3 all around, make its insulating gasket 3 take place to deform, utilize its elasticity to guarantee the compactness of its installation, and certain elastic support still has simultaneously, guarantee the stability of its encapsulation, thereby guarantee the stability of its whole semiconductor board main part 6 encapsulation, can also come its and other circuits to be connected through touch panel interface 7, again through last packaging board 9 all around wiring circular slot 16, it is spacing to carry out the connecting wire, guarantee the clean and tidy stability of its wiring.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that various changes in the embodiments and/or modifications of the invention can be made, and equivalents and modifications of some features of the invention can be made without departing from the spirit and scope of the invention.
Claims (9)
1. A semiconductor package device with an optical transceiver, comprising a lower package board (1) and a card slot (2), characterized in that: the semiconductor packaging structure is characterized in that clamping holes (4) are formed in the periphery of the inner part of the lower packaging plate (1), insulating gaskets (3) are arranged on the periphery of the upper end of the lower packaging plate (1), clamping grooves (2) are formed in the periphery of the inner part of the lower packaging plate (1), a placing groove (17) is formed in the middle end of the inner part of the lower packaging plate (1), a nanometer cushion layer (14) is arranged at the lower end of the inner wall of the placing groove (17), a semiconductor plate main body (6) is arranged at the top of the upper end of the nanometer cushion layer (14), pins (5) are arranged on the periphery of the outer wall of the semiconductor plate main body (6), epoxy resin (13) is arranged on the outer wall of the semiconductor plate main body (6) and the inner wall of the placing groove (17), a touch plate interface (7) is arranged in the middle part of the upper end of the semiconductor, the upper end top of lower encapsulation board (1) is provided with encapsulation board (9), and the lower extreme of going up encapsulation board (9) and the inboard of draw-in groove (2) are provided with fixture block (11), open slot (10) have been seted up to the inside middle-end of going up encapsulation board (9), wiring circular slot (16) have been seted up all around to the outer wall of going up encapsulation board (9), the inner wall of card hole (4) is provided with set screw (15) all around, the removal recess (12) have been seted up at the lower extreme middle part of lower encapsulation board (1).
2. A semiconductor package device with an optical transceiver as claimed in claim 1, wherein: the lower packaging plate (1) and the upper packaging plate (9) are movably connected, and the lower packaging plate (1) and the upper packaging plate (9) are matched in size.
3. A semiconductor package device with an optical transceiver as claimed in claim 1, wherein: the lower packaging plate (1) is connected with the clamping block (11) in a clamping manner through the clamping groove (2), and the clamping groove (2) and the clamping block (11) are mutually embedded in a concave-convex manner.
4. A semiconductor package device with an optical transceiver as claimed in claim 1, wherein: the lower packaging board (1) forms a packaging structure through the placing groove (17) and the semiconductor board body (6), and the placing groove (17) is associated with the semiconductor board body (6).
5. A semiconductor package device with an optical transceiver as claimed in claim 1, wherein: the insulating gaskets (3) are symmetrically distributed along the central axis of the lower packaging plate (1), and four insulating gaskets (3) are arranged.
6. A semiconductor package device with an optical transceiver as claimed in claim 1, wherein: the clamping holes (4) are in threaded connection with the fixing screws (15), and the clamping holes (4) are uniformly distributed along the central axis of the upper packaging plate (9).
7. A semiconductor package device with an optical transceiver as claimed in claim 1, wherein: the semiconductor board main body (6) is fixedly connected with the epoxy resin (13) through the pins (5), and the semiconductor board main body (6) and the nano cushion layer (14) are mutually attached.
8. A semiconductor package device with an optical transceiver as claimed in claim 1, wherein: the open slot (10) and the touch plate interface (7) are distributed coaxially and linearly, and the open slot (10) and the touch plate interface (7) are distributed in different horizontal planes.
9. A semiconductor package device with an optical transceiver and method of using the same as claimed in claims 1-8, wherein: the using method comprises the following steps: through the cross-shaped movable groove (12) of the lower packaging plate (1), the placement stability of the lower packaging plate (1) is guaranteed, then the nanometer cushion layer (14) with mutually matched sizes is placed on the inner wall of the placing groove (17) of the lower packaging plate (1), the semiconductor plate main body (6) to be packaged is placed at the upper end of the lower packaging plate, then molten epoxy resin (13) is injected into the gap between the upper packaging plate and the placing groove (17) through a glue injection machine, the semiconductor plate main body (6) is fixed after solidification, the upper packaging plate (9) is pressed on the upper end of the lower packaging plate (1) in a covering mode, the clamping groove (2) and the clamping block (11) are used for embedding and fixing the semiconductor plate main body, and then the fixing screw (15) penetrates through the clamping hole (4) for fastening, and the packaging stability of the semiconductor plate main body (6) inside the lower packaging plate is guaranteed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110272650.1A CN112992794A (en) | 2021-03-13 | 2021-03-13 | Semiconductor packaging device with optical transceiver and using method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110272650.1A CN112992794A (en) | 2021-03-13 | 2021-03-13 | Semiconductor packaging device with optical transceiver and using method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112992794A true CN112992794A (en) | 2021-06-18 |
Family
ID=76335191
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110272650.1A Withdrawn CN112992794A (en) | 2021-03-13 | 2021-03-13 | Semiconductor packaging device with optical transceiver and using method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112992794A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116113191A (en) * | 2023-03-17 | 2023-05-12 | 惠州市天睿电子有限公司 | Circuit board component packaging structure |
-
2021
- 2021-03-13 CN CN202110272650.1A patent/CN112992794A/en not_active Withdrawn
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116113191A (en) * | 2023-03-17 | 2023-05-12 | 惠州市天睿电子有限公司 | Circuit board component packaging structure |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100343432B1 (en) | Semiconductor package and package method | |
| US7102217B2 (en) | Interposer substrates with reinforced interconnect slots, and semiconductor die packages including same | |
| US8395254B2 (en) | Integrated circuit package system with heatspreader | |
| US6198162B1 (en) | Method and apparatus for a chip-on-board semiconductor module | |
| US9147600B2 (en) | Packages for multiple semiconductor chips | |
| US8203214B2 (en) | Integrated circuit package in package system with adhesiveless package attach | |
| KR100674907B1 (en) | Stack type semiconductor package having high reliability | |
| US20080315406A1 (en) | Integrated circuit package system with cavity substrate | |
| CN112992794A (en) | Semiconductor packaging device with optical transceiver and using method thereof | |
| US20040036153A1 (en) | Stress balanced semiconductor packages, method of fabrication and modified mold segment | |
| WO2019051710A1 (en) | Chip packaging structure and method, and electronic device | |
| CN201490179U (en) | Circuit board structure | |
| US20110157858A1 (en) | System-in-package having embedded circuit boards | |
| JP2010157672A (en) | Semiconductor package structure with protection bar | |
| US20150348879A1 (en) | Semiconductor device with encapsulated lead frame contact area and related methods | |
| US20070235869A1 (en) | Integrated circuit package system with wire bond pattern | |
| US8026582B2 (en) | Integrated circuit package system with internal stacking module adhesive | |
| US10504806B2 (en) | Semiconductor package with electrical test pads | |
| KR20100109042A (en) | Semiconductor package and method for fabricating thereof | |
| CN203225247U (en) | An integrated circuit packaging body | |
| CN211828760U (en) | BGA packaging structure based on silicon substrate and injection molding process | |
| TW399276B (en) | Semiconductor device and process of producing the same | |
| CN216354192U (en) | Semiconductor chip routing structure | |
| JP2004063680A (en) | Method of manufacturing chip array type ball grid array package for substrate on chip | |
| US20220293498A1 (en) | Method of manufacturing semiconductor devices and corresponding semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| WW01 | Invention patent application withdrawn after publication | ||
| WW01 | Invention patent application withdrawn after publication |
Application publication date: 20210618 |