CN112965356A - Product power-on timing module and timing method - Google Patents
Product power-on timing module and timing method Download PDFInfo
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- CN112965356A CN112965356A CN202110359716.0A CN202110359716A CN112965356A CN 112965356 A CN112965356 A CN 112965356A CN 202110359716 A CN202110359716 A CN 202110359716A CN 112965356 A CN112965356 A CN 112965356A
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- G—PHYSICS
- G04—HOROLOGY
- G04F—TIME-INTERVAL MEASURING
- G04F10/00—Apparatus for measuring unknown time intervals by electric means
- G04F10/04—Apparatus for measuring unknown time intervals by electric means by counting pulses or half-cycles of an ac
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/24—Resetting means
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1446—Point-in-time backing up or restoration of persistent data
- G06F11/1448—Management of the data involved in backup or backup restore
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06M—COUNTING MECHANISMS; COUNTING OF OBJECTS NOT OTHERWISE PROVIDED FOR
- G06M3/00—Counters with additional facilities
- G06M3/08—Counters with additional facilities for counting the input from several sources; for counting inputs of different amounts
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Power Engineering (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
A product power-on timing module and timing method relating to the technical field of aircraft integrated circuit design comprises a hardware circuit and two timing modes; the hardware circuit comprises a CPU, a FLASH, an EEPROM, a RAM, an SPI bus, a timer and a GPIO; the two timing modes are a host machine operation mode and a local machine operation mode respectively; the invention is used for storing matching information after products leave factory, recording the information such as power-on time, hanging-off times and the like, realizing that the products automatically record power-on information such as power-on time, power-on times and the like, supporting abnormal power failure, needing no manual intervention, achieving the intelligent level, facilitating the maintenance of the product service life information, bringing great convenience to the use and maintenance of users, simplifying the use program and improving the product maintenance and guarantee level.
Description
Technical Field
The invention relates to the technical field of aircraft integrated circuit design, in particular to a product power-on timing module and a timing method.
Background
Through the investigation on the use and maintenance conditions of the domestic aircraft, no precedent for designing the electrifying information recording function on the aircraft exists; with the increasing importance of the use and maintenance of the aircraft, the recording requirements of the aircraft matching information and the service life information are very important.
Disclosure of Invention
In order to overcome the defects in the background art, the invention discloses a product power-on timing module and a timing method.
In order to achieve the purpose, the invention adopts the following technical scheme:
a product power-on timing module and timing method comprises a hardware circuit and two timing modes; the hardware circuit comprises a CPU, a FLASH, an EEPROM, a RAM, an SPI bus, a timer and a GPIO; the two timing modes are a host machine operation mode and a local machine operation mode respectively;
the operation flow of the host operation mode comprises the following steps:
firstly, a module is electrified and reset;
step two, whether the module is powered on is inquired;
writing product state information into the user through the SPI bus interface;
fourthly, executing the SPI command;
the operation flow of the native operation mode comprises the following steps:
firstly, a module is electrified and reset;
step two, initializing table data preparation;
entering a ready state and waiting for a power-on command;
and fourthly, the power-on trigger counter works to generate interval power-on time refreshing.
Preferably, after the hardware circuit is powered on, the timer reload value is read first, whether the value is zero or not is judged, if yes, the register reset value is directly used for counting, and otherwise, the timer reload value is used for configuring the relevant register.
Preferably, the data structure for determining the cumulative number of times of power-on is: using a continuous 8-byte memory space, the time0 and time1 fields indicate the number of power-on times, and time1 is a backup of time0, where the value of the region is read and incremented by 1 each time a power-on command is received by the SPI interface and stored again.
Preferably, the writing order of the time0 and the time1 fields is: time0-time0_ check-power on status field-time 1-time1_ check.
Preferably, the data of the accumulated power-on times are verified through a verification process.
Preferably, the SPI command types include: product status information write, circuit status read, EEPROM byte write, and EEPROM byte erase.
Preferably, the timer uses a 32-bit down counter, and when the count reaches 0, a timing pulse is generated to trigger the control circuit to generate an EEPROM write operation, record the current power-on time, and let the timer reload the initial count value to continue counting the next interval time.
Preferably, the counter counts by using a crystal oscillator clock frequency division clock, and a frequency division coefficient user can modify the system information area through an SPI command.
Due to the adoption of the technical scheme, the invention has the following beneficial effects:
the product power-on timing module and the timing method disclosed by the invention are used for storing matching information after the product leaves the factory, recording power-on time length, hanging-off times and other information, realizing that the product automatically records power-on information such as power-on time, power-on times and the like, supporting abnormal power failure, not needing any manual intervention, achieving an intelligent level, facilitating the maintenance of product life information, bringing great convenience to the use and maintenance of users, simplifying use procedures and further improving the product maintenance and guarantee level; in addition, the invention also has the following advantages:
1) the functional module has small volume, strong transportability and universality, is convenient to install in an aircraft system, is communicated with the main processor through a high-speed bus, and occupies few resources of the original functions; the data recording is automatically completed, can receive the command of a main processor to carry out state machine recording, data rewriting or reading, and is an intelligent independent function module;
2) the 1553B bus of the external interface or other test interfaces are used for storing or reading the recorded information, and other interface circuits are not required to be additionally arranged;
3) the product power-on timing information is stored in the special memory, the data is stored by adopting redundant double backup, and the ECC check function is realized, so that the reliability and the safety of data recording are ensured.
Drawings
FIG. 1 is a schematic block diagram of the hardware circuitry of the present invention;
FIG. 2 is a flow chart of a native mode of operation;
FIG. 3 is a flow chart of a host operating mode;
FIG. 4 is a schematic diagram of a system control information storage according to the present invention;
FIG. 5 is a diagram illustrating a power-on number data structure;
FIG. 6 is a flowchart of a verification process for accumulated power-on times data;
FIG. 7 is a diagram illustrating a data structure of power-on time information according to the present invention.
Detailed Description
The present invention will be explained in detail by the following examples, which are disclosed for the purpose of protecting all technical improvements within the scope of the present invention.
With reference to fig. 1-3, a product power-on timing module and a timing method thereof comprise a hardware circuit and two timing modes; the hardware circuit comprises a CPU, a FLASH, an EEPROM, a RAM, an SPI bus, a timer and a GPIO, a control algorithm can be updated through GPIO pins, a host can also communicate with the control algorithm of the hardware circuit module through the SPI bus, timing and other information storage of different working states of a product are realized, and simultaneously, internally stored information can also be read through the SPI; the two timing modes are a host machine operation mode and a local machine operation mode respectively;
the operation flow of the host operation mode comprises the following steps:
firstly, a module is electrified and reset;
step two, whether the module is powered on is inquired;
writing product state information into the user through the SPI bus interface;
fourthly, executing the SPI command;
the operation flow of the native operation mode comprises the following steps:
firstly, a module is electrified and reset;
step two, initializing table data preparation;
entering a ready state and waiting for a power-on command;
and fourthly, the power-on trigger counter works to generate interval power-on time refreshing.
When in use, after power-on reset, initialization operation is firstly carried out, and an information storage system control information area shown in figure 4 is adopted; after power-on, firstly reading a timer load value, judging whether the value is zero, if so, directly using a register reset value to count, otherwise, using the timer load value to configure a relevant register;
with reference to fig. 5, the data structure for determining the cumulative number of power-on times is: using a continuous 8-byte storage space, the time0 and time1 fields indicate the number of power-on times, the time1 is a backup of the time0, and the value of the area is read and incremented by 1 each time the SPI interface receives a power-on command and then stored again in the location; the write order of the time0 and time1 fields is: time0-time0_ check-power on status field-time 1-time1_ check; the writing sequence and the check value can ensure that the energizing times can be accurately obtained so as to find the current writing address;
with reference to fig. 6, the data of the accumulated power-on times are verified through the verification process, so that the power-on times can be accurately determined;
after the power-on times are determined, the hardware circuit enters a ready state, the hardware circuit carries out a formal working state at the moment, waits for a working command of the SPI interface and starts corresponding command response, and the types of the SPI command comprise: the method comprises the following steps of writing product state information, reading circuit state, reading EEPROM, writing EEPROM byte and erasing EEPROM byte, namely, a user can use SPI to read and update system information or input a product state timing starting command;
with reference to fig. 7, after the SPI receives the power-on timing start command, the hardware circuit starts the timer to start timing, and the timer writes a product power-on time value to the flying single data recording position every 30s (default value, user can modify timing precision through the SPI command) until the circuit is powered off, thereby realizing single data recording;
the timer uses a 32-bit down counter, and when the count reaches 0, a timing pulse is generated to trigger the control circuit to generate an EEPROM write operation, record the current electrifying time, and enable the timer to reload the initial count value and continue to count the next interval time; the counter uses a crystal oscillator clock frequency division clock to count, and a frequency division coefficient user can modify a system information area through an SPI command;
in a default state, the hardware circuit works under an external crystal oscillator frequency division clock, the counter generates trigger pulses every 30s, a time register in the hardware circuit increases by 1 when receiving the trigger pulses, and the increased value is written into a time recording structure corresponding to the current power-on;
when a power-on signal is received, the timer starts working, the write operation of the relevant field of the power-on time information data structure can be initiated once every fixed time period (default is 30s), the time value can be updated to refresh _ time0 when odd-number-time interval pulses are generated, and the check value check _ num0 is also written into the corresponding position; when even-numbered interval pulses are generated, the time value is updated to refresh _ time1, and the check value check _ num1 is calculated and written into the corresponding position; this mode of operation ensures that when the refresh _ time0 or refresh _ time1 values are written without being unable to retrieve the count value due to a power failure, the single power-on time error obtained by this method is within 30 s.
The present invention is not described in detail in the prior art.
Claims (8)
1. A product power-on timing module and a timing method are characterized in that: comprises a hardware circuit and two timing modes; the hardware circuit comprises a CPU, a FLASH, an EEPROM, a RAM, an SPI bus, a timer and a GPIO; the two timing modes are a host machine operation mode and a local machine operation mode respectively;
the operation flow of the host operation mode comprises the following steps:
firstly, a module is electrified and reset;
step two, whether the module is powered on is inquired;
writing product state information into the user through the SPI bus interface;
fourthly, executing the SPI command;
the operation flow of the native operation mode comprises the following steps:
firstly, a module is electrified and reset;
step two, initializing table data preparation;
entering a ready state and waiting for a power-on command;
and fourthly, the power-on trigger counter works to generate interval power-on time refreshing.
2. The product power-on timing module and timing method of claim 1, wherein: after the hardware circuit is powered on, firstly reading a timer load value, judging whether the value is zero, if so, directly using a register reset value to count, otherwise, using the timer load value to configure a relevant register.
3. The product power-on timing module and timing method of claim 1, wherein: the data structure for determining the accumulated power-on times is as follows: using a continuous 8-byte memory space, the time0 and time1 fields indicate the number of power-on times, and time1 is a backup of time0, where the value of the region is read and incremented by 1 each time a power-on command is received by the SPI interface and stored again.
4. The product power-on timing module and timing method of claim 4, wherein: the writing order of the time0 and time1 fields is: time0-time0_ check-power on status field-time 1-time1_ check.
5. The product power-on timing module and timing method of claim 4, wherein: and verifying the data of the accumulated power-on times through a verification process.
6. The product power-on timing module and timing method of claim 1, wherein: the SPI command types include: product status information write, circuit status read, EEPROM byte write, and EEPROM byte erase.
7. The product power-on timing module and timing method of claim 1, wherein: the timer uses a 32-bit down counter, and when the count reaches 0, a timing pulse is generated to trigger the control circuit to generate an EEPROM write operation, record the current power-on time, and enable the timer to reload the initial count value and continue to count the next interval time.
8. The product power-on timing module and timing method of claim 1, wherein: the counter uses a crystal oscillator clock frequency division clock to count, and a frequency division coefficient user can modify a system information area through an SPI command.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110359716.0A CN112965356B (en) | 2021-04-01 | 2021-04-01 | Timing method of aircraft power-on timing module |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110359716.0A CN112965356B (en) | 2021-04-01 | 2021-04-01 | Timing method of aircraft power-on timing module |
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| CN112965356A true CN112965356A (en) | 2021-06-15 |
| CN112965356B CN112965356B (en) | 2022-05-17 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11811403B2 (en) | 2022-03-25 | 2023-11-07 | Changxin Memory Technologies, Inc. | Clock counter, method for clock counting, and storage apparatus |
| TWI832418B (en) * | 2022-03-25 | 2024-02-11 | 大陸商長鑫存儲技術有限公司 | Clock counter, clock counting method and storage device |
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| CN107884635A (en) * | 2017-09-21 | 2018-04-06 | 北京机械设备研究所 | A kind of Current Mutual Inductance wireless timer and clocking method |
| CN110716416A (en) * | 2019-10-30 | 2020-01-21 | 中国空空导弹研究院 | Connector type power-on timing device and power-on timing method |
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2021
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4534045A (en) * | 1983-11-28 | 1985-08-06 | Tektronix, Inc. | Device for recording host electronic instrument operating on-time |
| US20040136273A1 (en) * | 2003-01-09 | 2004-07-15 | Peter Chambers | Robust power-on meter and method using a limited-write memory |
| CN101320490A (en) * | 2007-06-07 | 2008-12-10 | 鸿富锦精密工业（深圳）有限公司 | Monitoring device for user mode of connector |
| CN102135756A (en) * | 2009-11-26 | 2011-07-27 | 精工电子有限公司 | Voltage application time period measuring circuit and power supply apparatus including the same |
| CN201654861U (en) * | 2010-02-03 | 2010-11-24 | 江苏宏康节能服务有限公司 | Lighting time metering device and illuminating lamp containing same |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11811403B2 (en) | 2022-03-25 | 2023-11-07 | Changxin Memory Technologies, Inc. | Clock counter, method for clock counting, and storage apparatus |
| TWI832418B (en) * | 2022-03-25 | 2024-02-11 | 大陸商長鑫存儲技術有限公司 | Clock counter, clock counting method and storage device |
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| CN112965356B (en) | 2022-05-17 |
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