CN112953405A

CN112953405A - Gain-adjustable low-noise amplifier

Info

Publication number: CN112953405A
Application number: CN202110157626.3A
Authority: CN
Inventors: 汪伟江; 周正; 朱斌超
Original assignee: Jiangsu Maxscend Microelectronics Co ltd
Current assignee: Jiangsu Maxscend Microelectronics Co ltd
Priority date: 2021-02-04
Filing date: 2021-02-04
Publication date: 2021-06-11

Abstract

The invention discloses a gain-adjustable low-noise amplifier, and relates to the technical field of radio frequency. The invention comprises the following steps: radio frequency signal input end, radio frequency signal output end, common source unit, common grid unit, output match capacitor unit, a plurality of gain control unit, radio frequency signal input end includes: different input matching networks can be designed for different signal input ports to meet the requirements of different frequency bands, port selection is carried out through a switch, and the input matching networks can be realized on chip or off chip. The invention can cover wider signal frequency band by arranging a plurality of radio frequency signal input ports and using a plurality of gain-adjustable low-noise amplifiers in a matching way, realizes the gain adjustment of the switch type multi-input radio frequency combination, each gain-adjustable radio frequency comprises the gain change range from positive gain to negative gain, the gain phase is continuous, and the invention has good input and output matching performance and current use efficiency, compact structure, practicality and reliability.

Description

Gain-adjustable low-noise amplifier

Technical Field

The invention belongs to the technical field of radio frequency, and particularly relates to a gain-adjustable low-noise amplifier.

Background

The rf is a first-stage active circuit at the front end of the rf receiver, and needs to have a certain gain to amplify a weak wireless signal, and meanwhile, in order to amplify a large signal without distortion, the receiver needs to have a certain dynamic range, and therefore, the LNA needs to be designed to have a structure with adjustable gain. In addition, in order to widen the operating band of the LNA, a single LNA can be designed into a multi-input structure, and then a plurality of LNAs can be combined for use to form an LNA combination with multi-band input.

The conventional LNA has the defects of small adjustable gain range, poor gain phase continuity, poor matching of radio frequency input and output ends or low current use efficiency, and therefore needs to be optimally designed.

As shown in fig. 1, the conventional radio frequency includes: the input amplifying circuit 101, the output amplifying circuit 202 and the bias circuit 303, the input amplifying circuit 101 mainly comprises a radio frequency signal input terminal RFIN, a main amplifying tube M1 and a source degeneration inductor Ls, and is used for primarily amplifying an input radio frequency signal, the output amplifying circuit 202 mainly comprises a secondary amplifying tube M2, a load resistor R, a load inductor Ld and a radio frequency signal output terminal RFOUT, and is used for further amplifying and outputting an output signal of the input amplifying circuit 101 to a later stage circuit, and the bias circuit 303 is used for providing a bias voltage for the main amplifying tube M1 and providing a working current for the LNA. Neglecting the effects of channel modulation and parasitic effects, the gain of the conventional LNA is approximately,

wherein A is_VIs the gain of the LNA, g_mIs transconductance, L, of the main amplifier tube M1_sThe inductance of the inductor Ls at the source end of the main amplifier tube, R, is the resistance of the load resistor R, and in general, the size of the load resistor R is much smaller than that of the load inductor Ld.

(1) The equation shows that the larger the source load inductance Ls in the input amplification circuit 10, the lower the LNA gain; the larger the load resistance R, the higher the LNA gain.

The traditional gain-adjustable amplifier changes the load impedance of the output end of the LNA by changing the load resistor R of the output amplifying circuit 30, so that the gain of the LNA is changed, but the change of the resistor is limited by factors such as the power supply voltage and the output matching performance of the LNA, therefore, the gain-adjustable range is narrow, and when the gain is in different gears, the working current of the LNA is the same, and the current utilization efficiency is low.

Disclosure of Invention

The invention aims to provide a gain-adjustable low-noise amplifier, which can cover a wider signal frequency band by arranging a plurality of radio frequency signal input ports and matching a plurality of gain-adjustable low-noise amplifiers for use, realizes gain adjustment of a switch type multi-input radio frequency combination, has continuous gain phases, good input and output matching performance and current use efficiency and a compact structure, is practical and reliable, and solves the problems in the prior art.

In order to achieve the purpose, the invention is realized by the following technical scheme:

a gain tunable low noise amplifier comprising: the radio frequency signal input end, the radio frequency signal output end, the common source unit, the common grid unit, the output matching capacitor unit and the plurality of gain adjusting units are arranged in the common source unit;

the radio frequency signal input includes: different input matching networks can be designed at different signal input ports to meet the requirements of different frequency bands, port selection is carried out through a switch, and the input matching networks can be realized on chip or off chip;

the radio frequency signal output end is a radio frequency signal output port;

the common source unit is used as a radio frequency main amplifying tube and used for amplifying a radio frequency input signal, and a plurality of transistors are connected in parallel to form a structure to be matched with a radio frequency signal input end for use;

the common grid unit is used as a secondary amplifying tube of radio frequency and is used for outputting radio frequency signals and improving the isolation of radio frequency output and input signals;

the output matching capacitor unit is used for adjusting the matching performance of radio frequency output and can also be used for adjusting the gain phase to ensure the continuity of the gain phase;

a plurality of gain adjustment units comprising: the gain adjusting units at different positions of the low noise amplifier are controlled by a switch, and all the gain adjusting units work in a cooperative manner, so that the gain is improved or reduced.

Optionally, the common-source unit includes: the amplifier comprises a first main amplifier tube Mm1, a second main amplifier tube Mm2, a first main amplifier tube drain terminal switch Smd1 and a second main amplifier tube drain terminal switch Smd2, wherein the gate terminal of the first main amplifier tube Mm1 is connected with a first bias voltage input V1, the gate terminal of the second main amplifier tube Mm2 is connected with a second bias voltage input V2, the source terminal of the first main amplifier tube Mm1 is connected with the source terminal of the second main amplifier tube Mm2, the drain terminal of the first main amplifier tube Mm1 is connected with one end of a first main amplifier tube drain terminal switch Smd1, the other end of the first main amplifier tube drain terminal switch Smd1 is connected with the source terminal of a common gate unit, the drain terminal of the second main amplifier tube Mm2 is connected with one end of a second main amplifier tube drain terminal switch Smd2, and the other end of the second main amplifier tube drain terminal switch Smd2 is connected with the source terminal of the common gate unit.

Optionally, the radio frequency signal input terminal includes: the first radio-frequency signal input end RFIN1, the second radio-frequency signal input end RFIN2, the first input switch Sin1, the second input switch Sin2 and resistance negative feedback, the first radio-frequency signal input end RFIN1 is connected with the gate end of the first main amplifying tube Mm1, the second radio-frequency signal input end RFIN2 is connected with the gate end of the second main amplifying tube Mm2, and the first radio-frequency signal input end RFIN1 and the second radio-frequency signal input end RFIN2 are respectively connected with the resistance negative feedback network through the first input switch Sin1 and the second input switch Sin 2;

the number of the radio frequency signal input ends can be one or more, when the number of the radio frequency signal input ends is increased to n, the number of the main amplifying tubes in the common source unit needs to be correspondingly increased to n, the nth radio frequency signal input end RFInn is connected to the gate end of the nth main amplifying tube Mmn, the nth radio frequency signal input 1 end RFInn is connected to one end of an nth input switch Sinn, and the other end of the nth input switch Sinn is connected with a resistance negative feedback network;

the number of the main amplifying tubes in the common-source unit can be one or more, the number is consistent with the number of the radio-frequency input ends, when only one main amplifying tube is arranged in the common-source unit, the switches connected in series with the drain ends of the main amplifying tubes can be removed, at the moment, the drain ends of the common-source unit are directly connected with the source ends of the common-gate unit, when the number of the main amplifying tubes in the common-source unit is increased to n, the number of the switches connected in series with the drain ends of the main amplifying tubes also needs to be correspondingly increased to n, the source ends of the nth main amplifying tubes Mmn are connected to the source ends of the first main amplifying tubes Mm1, the gate ends of the nth main amplifying tubes Mmn are respectively connected with the nth radio-frequency signal input end RFInn and the nth bias voltage input Vn, the drain ends of the nth main amplifying tubes Mmn are connected to one end of the drain end switches Smdn of the nth main amplifying tubes, and the other ends of the drain end switches Smdn are connected to.

Optionally, the common gate unit includes: a first amplification tube Mc1, a second amplification tube Mc2, an inductive load Ld, a power supply VDD, the voltage input VC and the second amplification tube grid end switch Scg2 are respectively connected with one end of an inductive load Ld and one end of a resistive load branch circuit at the drain end of a first amplification tube Mc1, the other end of the inductive load Ld and the other end of the resistive load branch circuit are respectively connected with a power supply VDD, the grid end of a first amplification tube Mc1 is connected with a bias voltage input VC, the grid end of the first amplification tube Mc1 is connected with one end of a second amplification tube grid end switch Scg2, the other end of the second amplification tube grid end switch Scg2 is connected with the grid end of a second amplification tube Mc2, the source end of the second amplification tube Mc2 is respectively connected with the source end of the first amplification tube Mc1 and the drain end of a first main amplification tube Mm1, the drain end of the second amplification tube Mc2 is connected with one end of a second amplification tube drain end switch Scd2, and the other end of the second amplification tube drain end switch Scd2 is connected with the power supply VDD;

the common grid unit can be connected with a plurality of secondary amplifying tubes which have the same grid length and are in proportion to the grid width in parallel, a branch consisting of a kth amplifying tube Mck, a kth amplifying tube grid end switch Scgk and a kth amplifying tube drain end switch Scdk is regarded as a kth amplifying tube branch, the grid end of the kth amplifying tube Mck is connected with the kth amplifying tube grid end switch Scgk, the other end of the kth amplifying tube grid end switch Scgk is connected with a bias voltage input VC, the source end of the kth amplifying tube Mck is connected with the source end of a first amplifying tube Mc1, the drain end of the kth amplifying tube Mck is connected with one end of the kth amplifying tube drain end switch Scdk, the other end of the kth amplifying tube drain end switch Scdk is connected with a power supply VDD, a first bias voltage input V1 and a second bias voltage input V2 of the grid of the common source unit are obtained by converting multi-path zero temperature coefficient bias currents generated by reference, and different bias voltages are obtained by selecting the number of the branch, the lower the gain is, the less the working current required by the radio frequency is, and the smaller the bias voltage of the corresponding main amplifier tube is;

the radio frequency signal output end is connected with one end of the attenuator network, the other end of the attenuator network is connected with one end of the output matching capacitor unit, the other end of the output matching capacitor unit is connected with the drain end of the first amplification tube Mc1, the radio frequency signal output end is connected with one end of the attenuator network, the other end of the attenuator network is connected with one end of the output matching capacitor unit, and the other end of the output matching capacitor unit is connected with the drain end of the first amplification tube Mc 1.

Optionally, the output matching capacitor unit includes: a series capacitor Cs, a first series capacitor Cs1, a first series switch Ss1, a second series capacitor Cs2 and a second series switch Ss2, wherein one end of the series capacitor Cs is connected with the drain terminal of the first primary amplifying tube Mc1, the other end of the series capacitor Cs is connected with one end of an attenuator network, the other end of the attenuator network is connected with a radio-frequency signal output terminal, one end of the first series capacitor Cs1 is connected with one end of the attenuator network, the other end of the attenuator network is connected with the radio-frequency signal output terminal, the other end of the first series capacitor Cs1 is connected with one end of the first series switch Ss1, the other end of the first series switch Ss1 is connected with the drain terminal of the first primary amplifying tube Mc1, one end of the second series capacitor Cs2 is connected with one end of the attenuator network, the other end of the attenuator network is connected with the radio-frequency signal output terminal, the other end of the second series capacitor Cs2 is connected with the second series switch Ss2, the other end of the second series switch Ss2 is connected with the drain terminal of the first amplifying tube Mc 1;

the number of the switches and the capacitance branches connected in series in the output matching capacitance unit can be one or more, one end of a q-th series capacitor Csq in the q-th series branch is connected with one end of an attenuator network, the other end of the attenuator network is connected with a radio-frequency signal output end, the other end of a q-th series capacitor Csq is connected with a q-th series switch Ssq, and the other end of a q-th series switch Ssq is connected with the drain end of a first amplification tube Mc 1;

the radio frequency signal input end can comprise a plurality of signal input ports to form a multi-input gain adjustable radio frequency, a plurality of amplifiers can be used in combination to widen the working frequency band of the radio frequency, and r gain adjustable radio frequency combinations with r signal input ends can at least cover r different frequency bands.

Optionally, the source-end degeneration impedance network includes: a main amplifying tube source end resistor Rs, a first main amplifying tube source end switch Sms1, a second main amplifying tube source end switch Sms2, a first source end inductor Ls1 and a second source end inductor Ls2, one end of the source end resistor Rs is connected with the source end of a first main amplifying tube Mm1, the other end of the source end resistor Rs is connected with one end of a first source end inductor Ls1, the other end of the first source end inductor Ls1 is connected to the ground, the first source end inductor Ls1 can be realized by using an on-chip inductor or an off-chip inductor, one end of a first main amplifying tube switch Sms1 is connected with the source end of a first main amplifying tube Mm1, the other end of the first main amplifying tube source end switch Sms1 and one end of the source end resistor Rs, one end of the first source end inductor Ls1 is connected to the same node, one end of a second main amplifying tube switch Sms2 is connected with one end of the first main amplifying tube Mm1, the other end of the second main amplifying tube switch Sms2 and one end of the second source end of the second main amplifying tube inductor Ls 89, the other end of the second source end inductor Ls2 is connected to the ground, and the second source end inductor Ls2 can be implemented by using an on-chip inductor or an off-chip inductor;

the resistive degeneration network includes: a feedback capacitor Cf, a first feedback resistor Rf1, a first feedback switch Sf1, a second feedback resistor Rf2 and a second feedback switch Sf2, wherein one end of the feedback capacitor Cf is connected with the drain terminal of the first secondary amplifying tube Mc1, the other end of the feedback capacitor Cf is connected with one end of the first feedback switch Sf1 and one end of the first feedback resistor Rf1 at the same node, and is connected to one end of the second feedback switch Sf2 and one end of the second feedback resistor Rf2 from the node, respectively, the other end of the second feedback switch Sf2 and the other end of the second feedback resistor Rf2 are connected to the same node, and are connected to one end of the first input switch Sin1 and one end of the second input switch Sin2 from the node, the other end of the first input switch Sin1 is connected with the first radio frequency signal input terminal n1, and the other end of the second input switch Sin2 is connected with the second radio frequency signal input terminal RFIN 2;

the number of the switches and the resistor units connected in parallel in the resistor negative feedback network can be one or more, the p-th feedback resistor Rfp and the p-th feedback switch Sfp form a parallel unit, all the parallel units are connected in series, one end of the first parallel unit is connected with one end of the feedback capacitor Cf, the other end of the first parallel unit is connected with one end of the next parallel unit, one end of the p-th parallel unit is connected with the previous parallel unit, the other end of the p-th parallel unit is connected with one end of the first input end switch Sin1, and the other end of the first input end switch Sin1 is connected with the first radio frequency input end RFIN 1.

Optionally, the attenuator network includes: the first radio frequency output end resistor Ro1, the first radio frequency output end switch So1, the second radio frequency output end resistor Ro2 and the second radio frequency output end switch So2, one end of the first radio frequency output end resistor Ro1, one end of the output matching capacitor unit and one end of the first radio frequency output end switch So1 are connected to the same node, the other end of the output matching capacitor unit is connected with the drain of the first amplification tube Mc1, the other end of the first radio frequency output end resistor Ro1, the other end of the first radio frequency output end switch So1, one end of the second radio frequency output end resistor Ro2 and one end of the second radio frequency output end switch So2 are connected to the same node, and the other end of the second radio frequency output end resistor Ro2 and the other end of the second radio frequency output end switch So2 are connected to the radio frequency signal output end from the same node.

Optionally, the number of the switches and the resistor units connected in parallel in the attenuator network may be one or more, the jth radio frequency output terminal resistor Roj and the jth radio frequency output terminal switch Soj form a parallel unit, all the parallel units are connected in series, one end of the first parallel unit is connected with one end of the output matching capacitor unit, the other end of the output matching capacitor unit is connected with the drain terminal of the first amplifying tube Mc1, the other end of the first parallel unit is connected with one end of the next parallel unit, one end of the jth parallel unit is connected with the previous parallel unit, and the other end of the jth parallel unit is connected with the radio frequency signal output terminal.

Optionally, the low noise amplifier resistive load branch includes: the power supply circuit comprises a first load resistor Rd1, a first load switch Sd1, a second load resistor Rd2 and a second load switch Sd2, wherein one end of the first load resistor Rd1 is connected to a power supply VDD, the other end of the first load resistor Rd1 is connected with one end of a first load switch Sd1, the other end of the first load switch Sd1 is connected with a drain terminal of a first secondary amplifying tube Mc1, one end of the second load resistor Rd2 is connected to the power supply VDD, the other end of the second load resistor Rd2 is connected with one end of a second load switch Sd2, and the other end of the second load switch Sd2 is connected with the drain terminal of the first secondary amplifying tube Mc 1.

Optionally, the number of the switches and the resistive branches connected in series in the resistive load branch of the low noise amplifier may be one or more, an ith series branch, one end of an ith load resistor Rdi and one end of an ith load switch Sdi are connected to the power supply VDD, the other end of the ith load resistor Rdi is connected to one end of the ith load switch Sdi, and the other end of the ith load switch Sdi is connected to the drain of the first-time amplifying tube Mc 1.

The embodiment of the invention has the following beneficial effects:

according to the embodiment of the invention, by arranging the plurality of radio frequency signal input ports and using the plurality of gain-adjustable radio frequencies in a matched manner, a wider signal frequency band can be covered, the gain adjustment of the switch type multi-input low-noise amplifier combination is realized, each gain-adjustable radio frequency comprises a gain change range from positive gain to negative gain, the gain phase is continuous, the input and output matching performance and the current use efficiency are good, and the structure is compact, practical and reliable.

Of course, it is not necessary for any product in which the invention is practiced to achieve all of the above-described advantages at the same time.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the invention and, together with the description, serve to explain the invention and not to limit the invention. In the drawings:

FIG. 1 is a diagram of a conventional gain tunable RF circuit;

FIG. 2 is a circuit diagram of a gain tunable RF circuit of the present invention;

FIG. 3 is a diagram of a single-ended input gain tunable RF circuit formed in accordance with the present invention;

fig. 4 is a schematic structural diagram of an expanded structure LNABank formed by the present invention.

Wherein the figures include the following reference numerals:

the low noise amplifier comprises a low noise amplifier resistor load branch circuit 10, a secondary amplifier tube branch circuit 20, an output matching capacitor unit 30, an attenuator network 40, a radio frequency signal output end 50, a common gate unit 60, a resistor negative feedback network 80, a source end degraded impedance network 90, a radio frequency signal input end 100, an input amplification circuit 101, an output amplification circuit 202 and a bias circuit 303.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

To maintain the following description of the embodiments of the present invention clear and concise, a detailed description of known functions and known components of the invention have been omitted.

Referring to fig. 1-4, in the present embodiment, a gain-adjustable low noise amplifier is provided, which includes: the radio frequency signal input end 100, the radio frequency signal output end 50, the common source unit 70, the common gate unit 60, the output matching capacitor unit 30 and the plurality of gain adjusting units;

the rf signal input terminal 100 includes: different input matching networks can be designed at different signal input ports to meet the requirements of different frequency bands, port selection is carried out through a switch, and the input matching networks can be realized on chip or off chip;

the radio frequency signal output end 50 is a radio frequency signal output port;

the common source unit 70 is used as a main amplifier tube of radio frequency for amplifying a radio frequency input signal, and a plurality of transistors are connected in parallel to form a transistor which is used in cooperation with the radio frequency signal input end 100 if drain terminals, gate terminals and source terminals of two transistors are connected together respectively;

the common gate unit 60 is used as a secondary amplification tube of radio frequency, and is used for outputting radio frequency signals and improving the isolation of radio frequency output and input signals;

the output matching capacitor unit 30 is used for adjusting the matching performance of the radio frequency output, and can also be used for adjusting the gain phase to ensure the continuity of the gain phase;

a plurality of gain adjustment units comprising: the low noise amplifier comprises a low noise amplifier resistance load branch 10, a secondary amplifying tube branch 20, an attenuator network 40, a resistance negative feedback network 80 and a source end degraded impedance network 90, wherein gain adjusting units at different positions of the low noise amplifier are controlled by switches, and the gain adjusting units work cooperatively to improve or reduce the gain.

One aspect of the present embodiment applies to: the radio frequency signal output end 50 is used as a signal output port of the low noise amplifier; the common source unit 70 serves as a main amplifier tube of the low noise amplifier, is used for amplifying a radio frequency input signal, may include a plurality of transistors connected in parallel, and is used in cooperation with a same number of signal input ports, and the common gate unit 60 serves as a secondary amplifier tube of the low noise amplifier, and is used for outputting a radio frequency signal, so as to improve the isolation of radio frequency output and input signals; the output matching capacitor unit 30 is composed of a switch and a capacitor, and is used for adjusting the output matching performance and also used for adjusting the gain phase to ensure the continuity of the gain phase; the gain adjusting units at different positions of the low noise amplifier are controlled by switches, and all the gain adjusting units work in a cooperative mode to improve or reduce the gain. It should be noted that all the electric devices referred to in this application may be powered by a storage battery or an external power source.

Through setting up a plurality of radio frequency signal input ports, a plurality of gain adjustable low noise amplifier cooperate and use, can cover wider signal frequency band, realize that the gain of switch type multiple input radio frequency combination is adjustable, and every gain adjustable radio frequency contains the gain variation range from positive gain to negative gain, and the gain phase place is continuous moreover, has good input/output matching performance and current availability factor, compact structure, and is practical reliable.

The common-source unit 70 of the present embodiment includes: the amplifier comprises a first main amplifier tube Mm1, a second main amplifier tube Mm2, a first main amplifier tube drain terminal switch Smd1 and a second main amplifier tube drain terminal switch Smd2, wherein the gate terminal of the first main amplifier tube Mm1 is connected with a first bias voltage input V1, the gate terminal of the second main amplifier tube Mm2 is connected with a second bias voltage input V2, the source terminal of the first main amplifier tube Mm1 is connected with the source terminal of the second main amplifier tube Mm2, the drain terminal of the first main amplifier tube Mm1 is connected with one end of a first main amplifier tube drain terminal switch Smd1, the other end of the first main amplifier tube drain terminal switch Smd1 is connected with the source terminal of the common gate unit 60, the drain terminal of the second main amplifier tube Mm2 is connected with one end of the second main amplifier tube drain terminal switch Smd2, and the other end of the second main amplifier tube drain terminal switch Smd2 is connected with the common gate unit 60.

Specifically, the method comprises the following steps: when there is only one main amplifier tube in the common source unit, as shown in fig. 3, the switch connected in series with the drain terminal of the main amplifier tube may be removed, and at this time, the drain terminal of the main amplifier tube is directly connected to the source terminal of the sub-amplifier tube.

The source degeneration impedance network 90 of the present embodiment includes: the inductor comprises a main amplifying tube source end resistor Rs, a first main amplifying tube source end switch Sms1, a second main amplifying tube source end switch Sms2, a first source end inductor Ls1 and a second source end inductor Ls2, wherein one end of the source end resistor Rs is connected with the source end of a first main amplifying tube Mm1, the other end of the source end resistor Rs is connected with one end of a first source end inductor Ls1, the other end of the first source end inductor Ls1 is connected to the ground, and the first source end inductor Ls1 can be realized by using an on-chip inductor or an off-chip inductor including a bonding wire. Specifically, the method comprises the following steps: the gain amplitude can be changed and the phase thereof can be adjusted by adjusting the impedance of the source end;

one end of a first main amplifying tube source end switch Sms1 is connected with a source end of a first main amplifying tube Mm1, the other end of the first main amplifying tube source end switch Sms1 is connected with one end of a source end resistor Rs and one end of a first source end inductor Ls1 are connected with the same node, one end of a second main amplifying tube source end switch Sms2 is connected with a source end of the first main amplifying tube Mm1, the other end of the second main amplifying tube source end switch Sms2 is connected with one end of a second source end inductor Ls2, the other end of the second source end inductor Ls2 is connected with the ground, the second source end inductor Ls2 can be realized by using an on-chip inductor and can also be realized by using an off-chip inductor including a bonding wire inductor, and the resistance negative feedback network 80 comprises: feedback capacitor Cf, first feedback resistor Rf1, first feedback switch Sf1, second feedback resistor Rf2 and second feedback switch Sf2, one end of feedback capacitor Cf is connected to the drain of first secondary amplifying tube Mc1, the other end of feedback capacitor Cf and one end of first feedback switch Sf1, one end of first feedback resistor Rf1 are connected to the same node and from this node to one end of second feedback switch Sf2 and one end of second feedback resistor Rf2, respectively, the other end of second feedback switch Sf2 and the other end of second feedback resistor Rf2 are connected to the same node and from this node to one end of first input switch Sin1 and one end of second input switch Sin2, respectively, the other end of first input switch Sin1 is connected to first radio frequency signal input terminal n1, the other end of second input switch Sin2 and second radio frequency signal input terminal n2, the number of resistors RFIN 80 in parallel may be one or more negative feedback resistors RFIN2, the p-th feedback resistor Rfpp is a positive integer and the p-th feedback switch Sfp form a parallel unit, all parallel units are connected in series, one end of the first parallel unit is connected with one end of the feedback capacitor Cf, the other end of the first parallel unit is connected with one end of the next parallel unit, one end of the p-th parallel unit is connected with the previous parallel unit, the other end of the p-th parallel unit is connected with one end of the first input end switch Sin1, and the other end of the first input end switch Sin1 is connected with the first radio frequency input end RFIN 1.

The common gate unit 60 of the present embodiment includes: a first amplification tube Mc1, a second amplification tube Mc2, an inductive load Ld, a power supply VDD, a voltage input VC and a second amplification tube gate switch Scg2, wherein the drain terminal of the first amplification tube Mc1 is respectively connected with one end of the inductive load Ld and one end of the resistive load branch 10, the other end of the inductive load Ld and the other end of the resistive load branch 10 are respectively connected with the power supply VDD, the gate terminal of the first amplification tube Mc1 is connected with the bias voltage input VC, the gate terminal of the first amplification tube Mc1 is connected with one end of the second amplification tube gate switch Scg2, the other end of the second amplification tube gate switch Scg2 is connected with the gate terminal of the second amplification tube Mc2, the source terminal of the second amplification tube Mc2 is respectively connected with the drain terminal of the first amplification tube Mc1, the drain terminal of the first main amplification tube Mm1, the drain terminal of the second amplification tube Mc 3 is connected with one end of the second amplification tube Sc 73742, and the drain terminal of the second amplification tube Scd2 is connected with the second power supply switch VDD 84, the common gate unit 60 may be connected in parallel to a plurality of sub-amplifier tubes having the same gate length and proportional gate width, a kth sub-amplifier tube Mckk >1, where k is a positive integer, a branch formed by a kth sub-amplifier tube gate terminal switch Scgk and a kth sub-amplifier tube drain terminal switch Scdk is regarded as a kth sub-amplifier tube branch 20, a gate terminal of the kth sub-amplifier tube Mck is connected to the kth sub-amplifier tube gate terminal switch Scgk, the other end of the kth sub-amplifier tube gate terminal switch Scgk is connected to the bias voltage input VC, a source terminal of the kth sub-amplifier tube Mck is connected to a source terminal of the first sub-amplifier tube Mc1, and a drain terminal of the kth sub-amplifier tube Mck is connected to one end of the kth sub-amplifier tube drain terminal switch Scdk. Specifically, the method comprises the following steps: and a branch consisting of the kth amplifying tube Mck, the kth amplifying tube grid end switch Scgk and the kth amplifying tube drain end switch Scdk is used as a kth amplifying tube branch.

The other end of the kth amplifying tube drain terminal switch Scdk is connected to a power supply VDD, a first bias voltage input V1 and a second bias voltage input V2 of the grid electrode of the common source unit 70 are obtained by converting a plurality of paths of zero temperature coefficient bias currents generated by a reference, the number of reference bias current branches is selected by switches to obtain different bias voltages, the lower the gain, the less operating current is required for the radio frequency, the smaller the bias voltage of the corresponding main amplifier tube is, the radio frequency signal output end 50 is connected with one end of the attenuator network 40, the other end of the attenuator network 40 is connected with one end of the output matching capacitor unit 30, the other end of the output matching capacitor unit 30 is connected with the drain end of the first amplification tube Mc1, the radio frequency signal output end 50 is connected with one end of the attenuator network 40, the other end of the attenuator network 40 is connected with one end of the output matching capacitor unit 30, and the other end of the output matching capacitor unit 30 is connected with the drain end of the first amplification tube Mc 1.

The low noise amplifier resistive load branch 10 of the present embodiment includes: the power supply circuit comprises a first load resistor Rd1, a first load switch Sd1, a second load resistor Rd2 and a second load switch Sd2, wherein one end of the first load resistor Rd1 is connected to a power supply VDD, the other end of the first load resistor Rd1 is connected with one end of a first load switch Sd1, the other end of the first load switch Sd1 is connected with a drain terminal of a first secondary amplifying tube Mc1, one end of the second load resistor Rd2 is connected to the power supply VDD, the other end of the second load resistor Rd2 is connected with one end of a second load switch Sd2, and the other end of the second load switch Sd2 is connected with the drain terminal of the first secondary amplifying tube Mc 1.

The number of the switches and the resistive branches connected in series in the low noise amplifier resistive load branch 10 of this embodiment may be one or more, an ith series branch, one end of an ith load resistor Rdii which is a positive integer and is connected to the power supply VDD, the other end of the ith load resistor Rdi is connected to one end of an ith load switch Sdi, and the other end of the ith load switch Sdi is connected to the drain of the first-time amplifying tube Mc 1.

The number of the switches and the resistor units connected in parallel in the attenuator network 40 of this embodiment may be one or more, the jth rf output terminal resistor Rojj is a positive integer, and the jth rf output terminal switch Soj forms a parallel unit, all the parallel units are connected in series, one end of the first parallel unit is connected to one end of the output matching capacitor unit 30, the other end of the output matching capacitor unit 30 is connected to the drain of the first amplifying tube Mc1, the other end of the first parallel unit is connected to one end of the next parallel unit, one end of the jth parallel unit is connected to the previous parallel unit, and the other end of the jth parallel unit is connected to the rf signal output terminal 50.

The attenuator network 40 of the present embodiment includes: the first radio frequency output end resistor Ro1, the first radio frequency output end switch So1, the second radio frequency output end resistor Ro2 and the second radio frequency output end switch So2, one end of the first radio frequency output end resistor Ro1 and one end of the output matching capacitor unit 30, one end of the first radio frequency output end switch So1 are connected to the same node, the other end of the output matching capacitor unit 30 is connected to the drain of the first primary amplifying tube Mc1, the other end of the first radio frequency output end resistor Ro1 and the other end of the first radio frequency output end switch So1, one end of the second radio frequency output end resistor Ro2 and one end of the second radio frequency output end switch So2 are connected to the same node, and the other end of the second radio frequency output end resistor Ro2 and the other end of the second radio frequency output end switch So2 are connected to the radio frequency signal output end 50 from the same node.

The output matching capacitor unit 30 of the present embodiment includes: a series capacitor Cs, a first series capacitor Cs1, a first series switch Ss1, a second series capacitor Cs2 and a second series switch Ss2, wherein one end of the series capacitor Cs is connected to the drain of the first secondary amplifying tube Mc1, the other end of the series capacitor Cs is connected to one end of the attenuator network 40, the other end of the attenuator network 40 is connected to the rf signal output terminal 50, one end of the first series capacitor Cs1 is connected to one end of the attenuator network 40, the other end of the attenuator network 40 is connected to the rf signal output terminal 50, the other end of the first series capacitor Cs1 is connected to one end of the first series switch Ss1, the other end of the first series switch Ss1 is connected to the drain of the first secondary amplifying tube Mc1, one end of the second series capacitor Cs2 is connected to one end of the attenuator network 40, the other end of the attenuator network 40 is connected to the rf signal output terminal 50, the other end of the second series capacitor Cs2 is connected to the second series switch Ss2, the other end of the second series switch Ss2 is connected to the drain of the first amplification tube Mc1, the number of switches and capacitance branches connected in series in the output matching capacitance unit 30 may be one or more, one end of the q-th series capacitor Csqq, which is a positive integer, in the q-th series branch is connected to one end of the attenuator network 40, the other end of the attenuator network 40 is connected to the rf signal output terminal 50, the other end of the q-th series capacitor Csq is connected to the q-th series switch Ssq, the other end of the q-th series switch Ssq is connected to the drain of the first amplification tube Mc1, the rf signal input terminal 100 may include a plurality of signal input ports to form a multi-input gain-adjustable rf, a plurality of amplifiers may be used in combination to widen an operating frequency band of the rf, and r gain-adjustable rf combinations having r signal input terminals may cover at least r different frequency bands r as positive integers.

The rf signal input terminal 100 of the present embodiment includes: the first radio-frequency signal input end RFIN1, the second radio-frequency signal input end RFIN2, the first input switch Sin1, the second input switch Sin2 and resistance negative feedback, the first radio-frequency signal input end RFIN1 is connected with the gate end of the first main amplifying tube Mm1, the second radio-frequency signal input end RFIN2 is connected with the gate end of the second main amplifying tube Mm2, and the first radio-frequency signal input end RFIN1 and the second radio-frequency signal input end RFIN2 are respectively connected with the resistance negative feedback network 80 through the first input switch Sin1 and the second input switch Sin 2;

one or more of the number of the radio frequency signal input terminals 100 may be equal to or greater than two, and when the number of the radio frequency signal input terminals 100 is increased to n, n is a positive integer, the main amplifier 1 input terminal RFINn in the common-source unit 70 is connected to one end of an nth input switch Sinn, and the other end of the nth input switch Sinn is connected to the resistive negative feedback network 80;

the number of main amplifier tubes in the common-source unit 70 may be one or more, consistent with the number of rf input terminals, when there is only one main amplifier in the common-source unit 70, the switch connected in series with the drain of the main amplifier can be removed, and at this time, the drain of the common-source unit 70 is directly connected to the source of the common-gate unit 60, when the number of the main amplifier transistors in the common-source unit 70 is increased to n, the number of the switches connected in series with the drain terminals of the main amplifier transistors is also increased to n, and the source end of the nth main amplifier tube Mmn is connected to the source end of the first main amplifier tube Mm1, the gate end of the nth main amplifier tube Mmn is respectively connected with the nth radio frequency signal input end RFInn and the nth bias voltage input Vn, the drain end of the nth main amplifier tube Mmn is connected to one end of the drain end switch Smdn of the nth main amplifier tube, and the other end of the drain end switch Smdn of the nth main amplifier tube is connected to the common gate unit 60 source end.

Specifically, the method comprises the following steps: it should be noted that, when the switch involved in the present invention is not described, the default is in the off state and the switch off impedance is large enough; when the switch is on, the switch on-resistance is sufficiently small. The default working state of the switch in the practical application scene is freely set by designers. The working mode of the invention is specifically explained as follows:

the first mode is as follows: the switches in the attenuator network 40 are all turned on, the switches in the source end degeneration impedance network 90 are all turned on, the drain switch Smd1 of the first main amplifier tube is turned on, the external radio frequency signal enters the LNA from the first radio frequency signal input end RFIN1, and is sequentially amplified and transmitted to the radio frequency signal output end RFOUT through the main amplifier tube and the sub-amplifier tube, when the first load switch Sd1 in the resistive load branch 10 is turned on, the load impedance of the LNA output end is reduced, and the LNA gain is reduced, at this time, if the second load switch Sd2 is also turned on, the load impedance of the LNA output end is further reduced, and the LNA gain is reduced again, by setting the resistance value of the first load resistor Rd1 to half of the load inductor parallel equivalent resistance, setting the resistance value of the second load resistor Rd2 to half of the first load resistor Rd1, the gain can be reduced in 3dB steps, and setting the resistance values of the first load resistor Rd1 and the second load resistor Rd2 in other manners, the gain is reduced by a specified step size.

And a second mode: the switches in the attenuator network 40 are all turned on, the switches in the source end degraded impedance network 90 are all turned on, the drain switch Smd1 of the first main amplifier tube is turned on, an external radio frequency signal enters the LNA from the first radio frequency signal input end RFIN1, and is sequentially amplified and transmitted to the radio frequency signal output end RFOUT through the main amplifier tube and the sub-amplifier tube, when the gate switch Scg2 of the second amplifier tube in the sub-amplifier tube branch 20 is turned on, the drain switch Scd2 of the second amplifier tube is turned on, and the output current of the LNA is reduced, so that the gain of the LNA is reduced, the gain can be reduced according to 3dB step length by setting the same gate length and the same gate width of the second amplifier tube Mc2 and the first amplifier tube Mc1, and the gain can be reduced according to a designated step length by setting the size of the second amplifier tube Mc2 in other modes.

And a third mode: all switches in the attenuator network 40 are turned on, all switches in the source end degraded impedance network 90 are turned on, the drain end switch Smd1 of the first main amplifier tube is turned on, external radio frequency signals enter the LNA from the first radio frequency signal input end RFIN1, and are sequentially amplified and transmitted to the radio frequency signal output end RFOUT through the main amplifier tube and the secondary amplifier tube, when the first radio frequency output end switch So1 in the attenuator network 40 is turned off, the first radio frequency output end resistor Ro1 functions, the insertion loss of the LNA output end is increased, and the LNA gain is reduced, at this time, if the second radio frequency output switch So2 is also turned off, the second radio frequency output end resistor Ro2 functions, the loss of the LNA output end is further increased, the LNA gain is reduced again, and the gain can be reduced according to a designated step length by setting the resistance values of the first radio frequency output end resistor Ro1 and the second radio frequency output end resistor Ro 2.

And a fourth mode: switches in the attenuator network 40 are all turned on, switches in the source terminal degraded impedance network 90 are all turned on, a drain terminal switch Smd1 of the first main amplifier tube is turned on, an external radio frequency signal enters the LNA from a first radio frequency signal input terminal RFIN1, and is sequentially amplified and transmitted to a radio frequency signal output terminal RFOUT through the main amplifier tube and the sub-amplifier tube, when a source terminal switch Sms2 of the second main amplifier tube in the source terminal degraded impedance network 90 is turned off, the degraded impedance of the LNA source terminal becomes large, and the gain of the LNA decreases, at this time, if the source terminal switch Sms1 of the first main amplifier tube is also turned off, the source terminal resistor Rs functions, the degraded impedance of the source terminal further increases, the gain of the LNA decreases again, by setting a resistance value of the source terminal resistor Rs, a resistance value of the first inductor source terminal Ls1 and a resistance value of the second inductor terminal Ls2, the gain can be decreased according to.

And a fifth mode: the switches in the attenuator network 40 are all turned on, the switches in the source end degraded impedance network 90 are all turned on, the drain switch Smd1 of the first main amplifier tube is turned on, an external radio frequency signal enters the LNA from the first radio frequency signal input end RFIN1, and is sequentially amplified and transmitted to the radio frequency signal output end RFOUT through the main amplifier tube and the sub-amplifier tube, when the first input switch Sin1 in the radio frequency signal input end 100 is turned on, the first feedback switch Sf1 in the resistance negative feedback network 80 is turned on, the feedback resistance between the input end and the output end of the LNA is reduced, and the gain of the LNA is reduced.

Mode six: external radio-frequency signals enter the LNA from a first radio-frequency signal input end RFIN1, are sequentially amplified and transmitted to a radio-frequency signal output end RFOUT through a main amplifier tube and a secondary amplifier tube, a drain end switch Smd1 of the first main amplifier tube is conducted, switches in the attenuator network 40 are all conducted, switches in the source end degraded impedance network 90 are all conducted, and the gain-adjustable radio frequency obtains the maximum positive gain when the first radio-frequency signal input end RFIN1 is used as the LNA for input;

mode seven: external radio frequency signals enter the LNA from a first radio frequency signal input end RFIN1, are sequentially amplified and transmitted to a radio frequency signal output end RFOUT through the main amplifying tube and the secondary amplifying tube, the first input switch Sin1 is turned on, the drain switch Smd1 of the first main amplifying tube is turned on, all switches in the resistive load branch circuit 10 are turned on, all switches in the secondary amplifying tube branch circuit 20 are turned on, all switches in the resistive negative feedback network 80 are turned on, all switches in the source end degraded impedance network 90 are turned on, and the gain-adjustable radio frequency obtains the minimum gain of the first radio frequency signal input end RFIN1 as LNA input, wherein the minimum gain can be negative gain when the gain is in enough gears.

In addition to the above seven modes, the combination of the gain adjustment modes in the first five modes can produce more gain adjustment modes, thereby producing a gain variation range covering high positive gain to low negative gain. It should be noted that when the gain shift changes greatly, a gain phase discontinuity may occur, and the gain phase error may be reduced by adjusting the capacitance of the output matching capacitor unit 30 and the impedance of the source end degraded impedance network 90, so as to achieve gain phase continuity. When the gain gear is adjusted to be low, the bias voltage of the main amplifying tube needs to be correspondingly adjusted to reduce the working current of the LNA, so that power consumption optimization is realized. In addition, an external radio frequency signal may enter the LNA from another radio frequency signal input terminal to be transmitted to the radio frequency signal output terminal, and a plurality of radio frequencies with adjustable gains in this embodiment are used in combination to form the LNABank, so that the gain of the switch type multiple input radio frequency combination is adjustable, the gain of the LNA combination is changed in a wide range, and the gain phase is continuous, as shown in fig. 4, the gain adjustable amplifier has n inputs (n is a positive integer), an antenna signal of a specified frequency band selected by the radio frequency filter enters the corresponding input matching network, and is output after being amplified by the gain adjustable radio frequency, so that the working frequency band is widened.

Therefore, the innovation of the invention is mainly embodied in the design that a wide gain variation range is realized by the cooperative work of a plurality of gain adjustment modes under the switch control, and meanwhile, the invention can be expanded into an LNA Bank with multiband input to realize the gain adjustment of the switch type multi-input low noise amplifier combination.

The gain-adjustable radio frequency described in the embodiments of the present invention mainly includes: the rf signal input terminal 100, the common source unit 70, the common gate unit 60, the output matching capacitor unit 30, the rf signal output terminal 50, and a plurality of gain adjusting units, which are described in the embodiments of the present invention, a plurality of possible circuit structures and gain adjusting methods may be derived.

The gain-adjustable radio frequency described in the embodiment of the invention can be realized in various ways such as IC, RFIC, digital-analog hybrid IC, ASIC, etc., and the manufacturing process can also be various processes such as CMOS, CMOS SOI, SiGe, GaAs, pHEMT, HBT, BJT, BiCMOS, etc

The above embodiments may be combined with each other.

It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in sequences other than those illustrated or described herein.

In the description of the present invention, it is to be understood that the orientation or positional relationship indicated by the orientation words such as "front, rear, upper, lower, left, right", "lateral, vertical, horizontal" and "top, bottom", etc. are usually based on the orientation or positional relationship shown in the drawings, and are only for convenience of description and simplicity of description, and in the case of not making a reverse description, these orientation words do not indicate and imply that the device or element being referred to must have a specific orientation or be constructed and operated in a specific orientation, and therefore, should not be considered as limiting the scope of the present invention; the terms "inner and outer" refer to the inner and outer relative to the profile of the respective component itself.

Claims

1. A gain tunable low noise amplifier, comprising: the radio frequency signal input end (100), the radio frequency signal output end (50), a common source unit (70), a common gate unit (60), an output matching capacitor unit (30) and a plurality of gain adjusting units;

the radio frequency signal input (100) comprises: different input matching networks can be designed at different signal input ports to meet the requirements of different frequency bands, port selection is carried out through a switch, and the input matching networks can be realized on chip or off chip;

the radio frequency signal output end (50) is a radio frequency signal output port;

the common source unit (70) is used as a radio frequency main amplifier tube for amplifying a radio frequency input signal, and is formed by connecting a plurality of transistors side by side (if drain terminals, grid terminals and source terminals of two transistors are respectively connected together, the drain terminals, the grid terminals and the source terminals are regarded as one transistor) and used together with a radio frequency signal input terminal (100);

the common grid unit (60) is used as a secondary amplification tube of radio frequency and is used for outputting radio frequency signals and improving the isolation of radio frequency output and input signals;

the output matching capacitor unit (30) is used for adjusting the matching performance of radio frequency output and can also be used for adjusting the gain phase to ensure the continuity of the gain phase;

a plurality of gain adjustment units comprising: the low-noise amplifier comprises a low-noise amplifier resistance load branch (10), a secondary amplification tube branch (20), an attenuator network (40), a resistance negative feedback network (80) and a source end degraded impedance network (90), wherein gain adjusting units at different positions of the low-noise amplifier are controlled by switches, and the gain adjusting units work cooperatively to improve or reduce the gain.

2. A gain adjustable low noise amplifier according to claim 1, characterized in that the common source unit (70) comprises: the amplifier comprises a first main amplifier tube Mm1, a second main amplifier tube Mm2, a first main amplifier tube drain terminal switch Smd1 and a second main amplifier tube drain terminal switch Smd2, wherein the gate terminal of the first main amplifier tube Mm1 is connected with a first bias voltage input V1, the gate terminal of the second main amplifier tube Mm2 is connected with a second bias voltage input V2, the source terminal of the first main amplifier tube Mm1 is connected with the source terminal of the second main amplifier tube Mm2, the drain terminal of the first main amplifier tube Mm1 is connected with one end of a first main amplifier tube drain terminal switch Smd1, the other end of the first main amplifier tube drain terminal switch Smd1 is connected with the source terminal of a common gate unit (60), the drain terminal of the second main amplifier tube Mm2 is connected with one end of a second main amplifier tube drain terminal switch Smd2, and the other end of the second main amplifier tube drain terminal switch Smd2 is connected with the source terminal of the common gate unit (60).

3. A gain adjustable low noise amplifier according to any of claims 1-2, wherein the radio frequency signal input (100) comprises: the first radio-frequency signal input end RFIN1, the second radio-frequency signal input end RFIN2, the first input switch Sin1, the second input switch Sin2 and resistance negative feedback, the first radio-frequency signal input end RFIN1 is connected with the gate end of the first main amplifying tube Mm1, the second radio-frequency signal input end RFIN2 is connected with the gate end of the second main amplifying tube Mm2, and the first radio-frequency signal input end RFIN1 and the second radio-frequency signal input end RFIN2 are respectively connected with the resistance negative feedback network (80) through the first input switch Sin1 and the second input switch Sin 2;

the number of the radio frequency signal input ends (100) can be one or more (equal to or more than two), when the number of the radio frequency signal input ends (100) is increased to n (n is a positive integer), the number of the main amplifying tubes in the common source unit (70) needs to be correspondingly increased to n, the nth radio frequency signal input end RFInn is connected to the gate end of the nth main amplifying tube Mmn, the nth radio frequency signal input 1 end RFInn is connected to one end of the nth input switch Sinn, and the other end of the nth input switch Sinn is connected with the resistance negative feedback network (80);

the number of the main amplifying tubes in the common source unit (70) can be one or more, which is consistent with the number of the radio frequency input ends, when only one main amplifier tube is arranged in the common source unit (70), the switch connected in series with the drain end of the main amplifier tube can be removed, at the moment, the drain end of the common source unit (70) is directly connected with the source end of the common gate unit (60), when the number of the main amplifier tubes in the common source unit (70) is increased to n, the number of the switches connected in series with the drain ends of the main amplifier tubes also needs to be correspondingly increased to n, and the source end of the nth main amplifying tube Mmn is connected to the source end of the first main amplifying tube Mm1, the gate end of the nth main amplifying tube Mmn is respectively connected with the nth radio frequency signal input end RFInn and the nth bias voltage input Vn, the drain end of the nth main amplifying tube Mmn is connected to one end of the drain end switch Smdn of the nth main amplifying tube, and the other end of the drain end switch Smdn of the nth main amplifying tube is connected to the source end of the common gate unit (60).

4. A gain adjustable low noise amplifier as claimed in claim 3, characterized in that the common gate unit (60) comprises: a first amplification tube Mc1, a second amplification tube Mc2, an inductive load Ld, a power supply VDD, a voltage input VC and a second amplification tube grid end switch Scg2, wherein the drain end of a first amplification tube Mc1 is respectively connected with one end of an inductive load Ld and one end of a resistive load branch (10), the other end of the inductive load Ld is respectively connected with the other end of the resistive load branch (10) and a power supply VDD, the grid end of a first amplification tube Mc1 is connected with a bias voltage input VC, the grid end of the first amplification tube Mc1 is connected with one end of a second amplification tube grid end switch Scg2, the other end of the second amplification tube grid end switch Scg2 is connected with the grid end of a second amplification tube Mc2, the source end of the second amplification tube Mc2 is respectively connected with the source end of the first amplification tube Mc1 and the drain end of a first main amplification tube Mm1, the drain end of the second amplification tube Mc2 is connected with one end of a second amplification tube drain end switch Scd2, and the other end of the second amplification tube drain end switch Scd2 is connected with the power supply VDD;

the common grid unit (60) can be connected with a plurality of secondary amplifying tubes with the same grid length and proportional grid width side by side, a branch consisting of a kth secondary amplifying tube Mck (k >1, k is a positive integer), a kth secondary amplifying tube grid end switch Scgk and a kth secondary amplifying tube drain end switch Scdk is regarded as a kth secondary amplifying tube branch (20), the grid end of the kth secondary amplifying tube Mck is connected with the kth secondary amplifying tube grid end switch Scgk, the other end of the kth secondary amplifying tube grid end switch Scgk is connected with a bias voltage input VC, the source end of the kth secondary amplifying tube Mck is connected with the source end of a first secondary amplifying tube Mc1, the drain end of the kth secondary amplifying tube Mck is connected with one end of a kth secondary amplifying tube drain end switch Scdk, the other end of the kth secondary amplifying tube drain end switch Scdk is connected with a power supply VDD, a first bias voltage input V1 and a second bias voltage input V2 of a grid of the common electrode unit (70) are converted by multi-path zero temperature bias current generated by a reference, the number of the reference bias current branches is selected through the switch to obtain different bias voltages, the lower the gain is, the less the working current required by radio frequency is, and the smaller the bias voltage of the corresponding main amplifier tube is;

the radio frequency signal output end (50) is connected with one end of an attenuator network (40), the other end of the attenuator network (40) is connected with one end of an output matching capacitor unit (30), the other end of the output matching capacitor unit (30) is connected with the drain end of a first amplification tube Mc1, the radio frequency signal output end (50) is connected with one end of the attenuator network (40), the other end of the attenuator network (40) is connected with one end of the output matching capacitor unit (30), and the other end of the output matching capacitor unit (30) is connected with the drain end of a first amplification tube Mc 1.

5. A gain adjustable low noise amplifier as defined in claim 4, characterized in that the output matching capacitor unit (30) comprises: a series capacitor Cs, a first series capacitor Cs1, a first series switch Ss1, a second series capacitor Cs2 and a second series switch Ss2, wherein one end of the series capacitor Cs is connected with the drain end of the first amplifying tube Mc1, the other end of the series capacitor Cs is connected with one end of an attenuator network (40), the other end of the attenuator network (40) is connected with a radio-frequency signal output end (50), one end of the first series capacitor Cs1 is connected with one end of the attenuator network (40), the other end of the attenuator network (40) is connected with the radio-frequency signal output end (50), the other end of the first series capacitor Cs1 is connected with one end of the first series switch Ss1, the other end of the first series switch Ss1 is connected with the drain end of the first amplifying tube Mc1, one end of the second series capacitor Cs2 is connected with one end of the attenuator network (40), and the other end of the attenuator network (40) is connected with the radio-frequency signal output end (50), the other end of the second series capacitor Cs2 is connected with the second series switch Ss2, and the other end of the second series switch Ss2 is connected with the drain terminal of the first secondary amplifying tube Mc 1;

the number of the switches and the capacitance branches connected in series in the output matching capacitance unit (30) can be one or more, one end of a q-th series capacitor Csq (q is a positive integer) in the q-th series branch is connected with one end of an attenuator network (40), the other end of the attenuator network (40) is connected with a radio frequency signal output end (50), the other end of a q-th series capacitor Csq is connected with a q-th series switch Ssq, and the other end of a q-th series switch Ssq is connected with the drain end of a first-time amplifying tube Mc 1;

the radio frequency signal input end (100) can comprise a plurality of signal input ports to form a multi-input gain-adjustable radio frequency, a plurality of amplifiers can be used in combination to widen the working frequency band of the radio frequency, and r gain-adjustable radio frequency combinations with r signal input ends can at least cover r different frequency bands (r is a positive integer).

6. A gain adjustable low noise amplifier as claimed in claim 5, characterized in that the source degeneration impedance network (90) comprises: a source end resistor Rs of the main amplifying tube, a first main amplifying tube source end switch Sms1, a second main amplifying tube source end switch Sms2, a first source end inductor Ls1 and a second source end inductor Ls2, one end of the source end resistor Rs is connected with a source end of a first main amplifying tube Mm1, the other end of the source end resistor Rs is connected with one end of a first source end inductor Ls1, the other end of the first source end inductor Ls1 is connected to the ground, the first source end inductor Ls1 can be realized by using an on-chip inductor or an off-chip inductor (including a bonding wire inductor), one end of the first main amplifying tube source end switch Sms1 is connected with a source end of the first main amplifying tube Mm1, the other end of the first main amplifying tube source end switch Sms1 is connected with one end of the source end resistor Rs, one end of the first source end inductor Ls1 is connected with the same node, one end of the second main amplifying tube source end switch Sms2 is connected with one end of the first main amplifying tube Mm1, the other end of the second main amplifying tube source end switch Sms 8536 is connected with one end of the, the other end of the second source end inductor Ls2 is connected to ground, and the second source end inductor Ls2 can be implemented by using an on-chip inductor or an off-chip inductor (including a bonding wire inductor);

the resistive degeneration network (80) includes: a feedback capacitor Cf, a first feedback resistor Rf1, a first feedback switch Sf1, a second feedback resistor Rf2 and a second feedback switch Sf2, wherein one end of the feedback capacitor Cf is connected with the drain terminal of the first secondary amplifying tube Mc1, the other end of the feedback capacitor Cf is connected with one end of the first feedback switch Sf1 and one end of the first feedback resistor Rf1 at the same node, and is connected to one end of the second feedback switch Sf2 and one end of the second feedback resistor Rf2 from the node, respectively, the other end of the second feedback switch Sf2 and the other end of the second feedback resistor Rf2 are connected to the same node, and are connected to one end of the first input switch Sin1 and one end of the second input switch Sin2 from the node, the other end of the first input switch Sin1 is connected with the first radio frequency signal input terminal n1, and the other end of the second input switch Sin2 is connected with the second radio frequency signal input terminal RFIN 2;

the number of the switches and the resistor units connected in parallel in the resistor negative feedback network (80) can be one or more, the p-th feedback resistor Rfp (p is a positive integer) and the p-th feedback switch Sfp form a parallel unit, all the parallel units are connected in series, one end of the first parallel unit is connected with one end of the feedback capacitor Cf, the other end of the first parallel unit is connected with one end of the next parallel unit, one end of the p-th parallel unit is connected with the previous parallel unit, the other end of the p-th parallel unit is connected with one end of the first input end switch Sin1, and the other end of the first input end switch Sin1 is connected with the first radio frequency input end RFIN 1.

7. A gain adjustable low noise amplifier according to claim 6, characterized in that the attenuator network (40) comprises: the radio frequency signal amplifying circuit comprises a first radio frequency output end resistor Ro1, a first radio frequency output end switch So1, a second radio frequency output end resistor Ro2 and a second radio frequency output end switch So2, wherein one end of the first radio frequency output end resistor Ro1, one end of an output matching capacitor unit (30) and one end of a first radio frequency output end switch So1 are connected to the same node, the other end of the output matching capacitor unit (30) is connected with a drain end of a first primary amplifying tube Mc1, the other end of the first radio frequency output end resistor Ro1, the other end of the first radio frequency output end switch So1, one end of a second radio frequency output end resistor Ro2 and one end of the second radio frequency output end switch So2 are connected to the same node, and the other end of the second radio frequency output end resistor Ro2 and the other end of the second radio frequency output end switch So2 are connected to the same node and connected to a radio frequency signal.

8. A gain adjustable low noise amplifier as claimed in claim 7, wherein the number of the parallel switches and resistor units in the attenuator network (40) may be one or more, the jth RF output terminal resistor Roj (j is a positive integer) and the jth RF output terminal switch Soj form a parallel unit, all the parallel units are connected in series, one end of the first parallel unit is connected to one end of the output matching capacitor unit (30), the other end of the output matching capacitor unit (30) is connected to the drain terminal of the first amplifying tube Mc1, the other end of the first parallel unit is connected to one end of the next parallel unit, one end of the jth parallel unit is connected to the previous parallel unit, and the other end of the jth parallel unit is connected to the RF signal output terminal (50).

9. A gain adjustable low noise amplifier according to claim 8, characterized in that the low noise amplifier resistive load branch (10) comprises: the power supply circuit comprises a first load resistor Rd1, a first load switch Sd1, a second load resistor Rd2 and a second load switch Sd2, wherein one end of the first load resistor Rd1 is connected to a power supply VDD, the other end of the first load resistor Rd1 is connected with one end of a first load switch Sd1, the other end of the first load switch Sd1 is connected with a drain terminal of a first secondary amplifying tube Mc1, one end of the second load resistor Rd2 is connected to the power supply VDD, the other end of the second load resistor Rd2 is connected with one end of a second load switch Sd2, and the other end of the second load switch Sd2 is connected with the drain terminal of the first secondary amplifying tube Mc 1.

10. A gain adjustable lna as claimed in claim 9, characterized in that the number of switches and resistive branches connected in series in the resistive load branch (10) of the lna is one or more, the ith series branch, one end of the ith load resistor Rdi (i is a positive integer) is connected to the power supply VDD, the other end of the ith load resistor Rdi is connected to one end of the ith load switch Sdi, and the other end of the ith load switch Sdi is connected to the drain of the first amplifying tube Mc 1.