CN112953215A - Combined power supply circuit - Google Patents

Combined power supply circuit Download PDF

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Publication number
CN112953215A
CN112953215A CN201911259889.4A CN201911259889A CN112953215A CN 112953215 A CN112953215 A CN 112953215A CN 201911259889 A CN201911259889 A CN 201911259889A CN 112953215 A CN112953215 A CN 112953215A
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CN
China
Prior art keywords
circuit
isolated converter
capacitor
voltage
voltage source
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Pending
Application number
CN201911259889.4A
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Chinese (zh)
Inventor
刘志宏
刘伟伟
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ZTE Corp
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ZTE Corp
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Publication date
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Priority to CN201911259889.4A priority Critical patent/CN112953215A/en
Publication of CN112953215A publication Critical patent/CN112953215A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Abstract

The application provides a combined power supply circuit. The method comprises the following steps: a voltage source, a non-isolated converter and an isolated converter; the positive electrode of the voltage source is respectively connected with the input interface of the non-isolated converter and the first input interface of the isolated converter; the negative electrode of the voltage source is respectively connected with the first output interface of the non-isolated converter, the second input interface of the isolated converter and the first output interface of the isolated converter; the second output interface of the non-isolated converter and the second output interface of the isolated converter are both connected with the output end; the non-isolated converter supplies power to an output end after performing direct-connection slow start on the input voltage of the voltage source; and the isolation converter is used for performing voltage conversion on the input voltage of the voltage and then supplying power to an output end.

Description

Combined power supply circuit
Technical Field
The application relates to the technical field of communication power supply circuits, in particular to a combined power supply circuit.
Background
In a 5G communication system, as the device power is multiplied, the device input current is also multiplied. In practical application scenarios, a long-distance transmission is required from a power supply end to an equipment end, and due to the existence of transmission line impedance, when a large current passes through, the voltage drop of a line is large, so that the power supply voltage of the equipment is insufficient. The power supply voltage is boosted at the power supply end through the boosting circuit, so that the terminal voltage of the equipment can be increased under the condition of passing the same current, and further more power is transmitted. In the related art, the boost power supply circuit has low power conversion efficiency, which causes waste of power.
Disclosure of Invention
The application provides a be used for a modular power supply circuit, can improve the electric energy conversion efficiency of power supply end among the communication system.
The embodiment of the application provides a combined power supply circuit, includes: a voltage source, a non-isolated converter and an isolated converter;
the positive electrode of the voltage source is respectively connected with the input interface of the non-isolated converter and the first input interface of the isolated converter; the negative electrode of the voltage source is respectively connected with the first output interface of the non-isolated converter, the second input interface of the isolated converter and the first output interface of the isolated converter; the second output interface of the non-isolated converter and the second output interface of the isolated converter are both connected with the output end;
the non-isolated converter supplies power to an output end after performing direct-connection slow start on the input voltage of the voltage source; and the isolation converter is used for performing voltage conversion on the input voltage of the voltage and then supplying power to an output end.
Drawings
Fig. 1 is a schematic structural diagram of a combined power supply circuit in an embodiment of the present application;
FIG. 2 is a schematic diagram of a combined power circuit according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a combined power circuit according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of another combined power supply circuit in the embodiment of the present application.
Detailed Description
To make the objects, technical solutions and advantages of the present application more apparent, embodiments of the present application will be described in detail below with reference to the accompanying drawings. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict.
Fig. 1 is a schematic structural diagram of a combined power supply circuit in an embodiment of the present application. As shown in fig. 1, the circuit includes: a voltage source 10, a non-isolated converter 20 and an isolated converter 30.
The positive pole of the voltage source 10 is connected with the input interface of the non-isolated converter 20 and the first input interface of the isolated converter 30 respectively; the negative pole of the voltage source 10 is connected to the first output interface of the non-isolated converter 20, the second input interface of the isolated converter 30 and the first output interface of the isolated converter 30 respectively; the second output interface of the non-isolated converter 20 and the second output interface of the isolated converter 30 are both connected with the output end;
the non-isolated converter 20 supplies power to the output end after performing direct-through slow start on the input voltage of the voltage source 10; the isolation converter 30 converts the input voltage of the voltage and supplies the output terminal with the converted voltage.
The input voltage of the isolated converter 30 to the voltage may be boosted or reduced, that is, the input voltage is subjected to isolated power conversion. The isolated converter 30 may include a flyback isolated circuit, a forward isolated circuit, or a half-bridge isolated circuit, among others.
The non-isolated converter 20 includes a shoot-through slow start circuit. When the voltage source is electrified, the direct-connection slow starting circuit charges the direct-connection capacitor through the internal switching device, and after the charging is finished, the switching device in the direct-connection slow starting circuit does not work in a switching state any more, so that the direct-connection slow starting circuit is in a direct-connection state.
In one embodiment, fig. 2 is a schematic structural diagram of another combined power circuit in the embodiment of the present application. As shown in fig. 2, the non-isolated converter includes: the circuit comprises a first MOS transistor 201, a pulse width modulation circuit 202, an inductor 203, a follow current tube 204, a first capacitor 205 and a sampling circuit 206.
In one embodiment, the drain of the first MOS transistor 201 is connected to the positive electrode of the voltage source 10, the gate of the first MOS transistor 201 is connected to the output terminal of the pulse width modulation circuit 202, and the source of the first MOS transistor 201 is connected to one end of the inductor 203 and one end of the freewheeling tube 204, respectively; the other end of the inductor 203 is connected with the output end and one end of the first capacitor 205 respectively; the other end of the afterflow tube 204 is connected with the negative electrode of the voltage source 10; the other end of the first capacitor 205 is connected to the second output interface of the isolated converter 30; the sampling end of the sampling circuit 206 is connected to two ends of the first capacitor 205, and the output end is connected to the input end of the pulse width modulation circuit 202;
the sampling circuit 206 is configured to collect voltages at two ends of the first capacitor 205, and send the collected voltages to the pulse width modulation circuit 202; the pulse width modulation circuit 202 determines the duty ratio of the output pulse according to the voltage across the first capacitor 205 to control the on/off of the first MOS transistor 201.
The first MOS transistor 201 is an NMOS transistor, and functions as a switching transistor. The follow current tube 204 may be a diode or a second MOS tube. If the freewheeling tube 204 is a diode, the anode of the diode is connected to the source of the first MOS transistor 201, and the cathode of the diode is connected to the cathode of the voltage source 10. If the follow current tube 204 is a second MOS tube, a gate of the second MOS tube is connected to the output end of the pulse width modulation circuit 202, a drain of the second MOS tube is connected to the source 201 of the first MOS tube, and a source of the second MOS tube is connected to a cathode of the voltage source. The follow current tube 204 is used for freewheeling the current in the inductor when the first MOS transistor 201 is in the off state, so as to prevent the current in the inductor from breaking down the first MOS transistor 201.
In one embodiment, after the voltage source is powered on, the pulse width modulation circuit 202 outputs a pulse with a certain duty ratio, so that the first MOS transistor 201 is in a conducting state in a high voltage period and in an off state in a low voltage period of one pulse cycle. When the first MOS transistor 201 is in a conducting state, the first capacitor 205 is charged, and the sampling circuit 206 collects the voltage across the first capacitor 205 and sends the voltage to the pulse width modulation circuit 202, so that the pulse width modulation circuit 202 adjusts the duty ratio of the output pulse. With the rise of the voltage of the first capacitor 205, the duty ratio of the pulse is gradually increased until the first capacitor 205 is charged, and the duty ratio of the output pulse becomes 100%, at this time, the first MOS transistor 201 is always in a conducting state, thereby realizing the slow start of the non-isolated converter. The circuit can prevent the generation of large impact current when a voltage source is just electrified, so that the power supply fuse is not opened and tripped or burnt. The non-isolated converter and the isolated converter are connected in series to output high voltage, most power is provided by the direct path, and the isolated converter provides a small part of power, so that the overall efficiency of the power circuit is improved.
In one embodiment, fig. 3 is a schematic structural diagram of another combined power circuit in the embodiment of the present application. As shown in fig. 3, the non-isolated converter further includes: a second capacitor 207; one end of the second capacitor 207 is connected to the positive electrode of the voltage source 10, and the other end is connected to the negative electrode of the voltage source 10, for stabilizing the input voltage of the voltage source.
In one embodiment, as shown in fig. 3, the non-isolated converter further comprises: a third capacitor 208; one end of the third capacitor 208 is connected to the other end of the inductor 203, and the other end of the third capacitor 208 is connected to the negative electrode of the voltage source 10, so as to stabilize the output voltage of the non-isolated converter.
In one embodiment, as shown in fig. 3, the non-isolated converter further comprises: a fourth capacitor 209; one end of the fourth capacitor 209 is connected to the negative electrode of the voltage source 10, and the other end is connected to the second output interface of the isolated converter 30, so as to stabilize the output voltage of the isolated converter.
In one embodiment, fig. 4 is a schematic structural diagram of another combined power circuit in the embodiment of the present application. As shown in fig. 4, the non-isolated converter further includes: a third MOS transistor 210 and a fourth MOS transistor 211;
the gate of the third MOS transistor 210 is connected to the output terminal of the pulse width modulation circuit 202, the drain is connected to the other end of the inductor 203, and the source is connected to the negative electrode of the voltage source 10;
the gate of the fourth MOS transistor 211 is connected to the output terminal of the pwm circuit 202, the drain is connected to the other end of the inductor 203, and the source is connected to the output terminal.
In one embodiment, the pulse width modulation circuit 202 outputs pulses with different time delays to control the first MOS transistor 201, the second MOS transistor 204, the third MOS transistor 210, and the fourth MOS transistor 211 to be turned on and off, respectively. The first MOS transistor 201, the second MOS transistor 204, the third MOS transistor 210 and the fourth MOS transistor 211 are alternately turned on.
In one embodiment, during the soft start process, the first MOS transistor 201 and the third MOS transistor 210 operate simultaneously, the second MOS transistor 204 and the fourth MOS transistor 211 operate simultaneously, and the two MOS transistors are turned on alternately. After the slow start, the first MOS transistor 201 and the third MOS transistor 210 are always in a conducting state. If the circuit is abnormal, the pulse input of the first MOS transistor 201 and the third MOS transistor 210 can be turned off, thereby improving the reliability of the circuit. The non-isolated converter and the isolated converter are connected in series to output high voltage, most power is provided by the direct path, and the isolated converter provides a small part of power, so that the overall efficiency of the power circuit is improved.
The foregoing has provided by way of exemplary and non-limiting examples a detailed description of exemplary embodiments of the present application. Various modifications and adaptations to the foregoing embodiments may become apparent to those skilled in the relevant arts in view of the following drawings and the appended claims without departing from the scope of the invention. Therefore, the proper scope of the invention is to be determined according to the claims.

Claims (10)

1. A modular power circuit, comprising: a voltage source, a non-isolated converter and an isolated converter;
the positive electrode of the voltage source is respectively connected with the input interface of the non-isolated converter and the first input interface of the isolated converter; the negative electrode of the voltage source is respectively connected with the first output interface of the non-isolated converter, the second input interface of the isolated converter and the first output interface of the isolated converter; the second output interface of the non-isolated converter and the second output interface of the isolated converter are both connected with the output end;
the non-isolated converter supplies power to an output end after performing direct-connection slow start on the input voltage of the voltage source; and the isolation converter is used for performing voltage conversion on the input voltage of the voltage and then supplying power to an output end.
2. The circuit of claim 1, wherein the non-isolated converter comprises: the device comprises a first MOS tube, a pulse width modulation circuit, an inductor, a follow current tube, a first capacitor and a sampling circuit;
the drain electrode of the first MOS tube is connected with the positive electrode of the voltage source, the grid electrode of the first MOS tube is connected with the output end of the pulse width modulation circuit, and the source electrode of the first MOS tube is respectively connected with one end of the inductor and one end of the follow current tube; the other end of the inductor is connected with the output end and one end of the first capacitor respectively; the other end of the follow current tube is connected with the negative electrode of the voltage source; the other end of the first capacitor is connected with a second output interface of the isolation converter; the sampling end of the sampling circuit is connected to two ends of the first capacitor, and the output end of the sampling circuit is connected with the input end of the pulse width modulation circuit;
the sampling circuit is used for collecting voltages at two ends of the first capacitor and sending the collected voltages to the pulse width modulation circuit; the pulse width modulation circuit determines the duty ratio of output pulses according to the voltage at two ends of the first capacitor so as to control the connection or disconnection of the first MOS transistor.
3. The circuit of claim 2, wherein the follow current tube is a diode or a second MOS tube.
4. The circuit of claim 3, wherein if the follow current tube is a diode, the anode of the diode is connected to the source of the first MOS tube, and the cathode of the diode is connected to the cathode of the voltage source.
5. The circuit of claim 3, wherein if the follow current transistor is a second MOS transistor, the gate of the second MOS transistor is connected to the output terminal of the pulse width modulation circuit, the drain of the second MOS transistor is connected to the source of the first MOS transistor, and the source of the second MOS transistor is connected to the negative electrode of the voltage source.
6. The circuit of claim 2, wherein the non-isolated converter further comprises: a second capacitor; one end of the second capacitor is connected with the anode of the voltage source, and the other end of the second capacitor is connected with the cathode of the voltage source and used for stabilizing the input voltage of the voltage source.
7. The circuit of claim 2, wherein the non-isolated converter further comprises: a third capacitor;
one end of the third capacitor is connected with the other end of the inductor, and the other end of the third capacitor is connected with the negative electrode of the voltage source and used for stabilizing the output voltage of the non-isolated converter.
8. The circuit of claim 2 or 7, wherein the non-isolated converter further comprises: a fourth capacitor; and one end of the fourth capacitor is connected with the negative electrode of the voltage source, and the other end of the fourth capacitor is connected with the second output interface of the isolation converter and is used for stabilizing the output voltage of the isolation converter.
9. The circuit of claim 2, wherein the non-isolated converter further comprises: a third MOS transistor and a fourth MOS transistor;
the grid electrode of the third MOS tube is connected with the output end of the pulse width modulation circuit, the drain electrode of the third MOS tube is connected with the other end of the inductor, and the source electrode of the third MOS tube is connected with the negative electrode of the voltage source;
and the grid electrode of the fourth MOS tube is connected with the output end of the pulse width modulation circuit, the drain electrode of the fourth MOS tube is connected with the other end of the inductor, and the source electrode of the fourth MOS tube is connected with the output end.
10. The circuit of claim 1, wherein the isolated converter comprises a flyback isolated circuit, a forward isolated circuit, or a half-bridge isolated circuit.
CN201911259889.4A 2019-12-10 2019-12-10 Combined power supply circuit Pending CN112953215A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201911259889.4A CN112953215A (en) 2019-12-10 2019-12-10 Combined power supply circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201911259889.4A CN112953215A (en) 2019-12-10 2019-12-10 Combined power supply circuit

Publications (1)

Publication Number Publication Date
CN112953215A true CN112953215A (en) 2021-06-11

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ID=76225663

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201911259889.4A Pending CN112953215A (en) 2019-12-10 2019-12-10 Combined power supply circuit

Country Status (1)

Country Link
CN (1) CN112953215A (en)

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