CN112889209A - Half bridge with variable dead band control and zero voltage switching - Google Patents

Abstract

An improved method of Zero Voltage Switching (ZVS) of a voltage-fed half-bridge using a variable dead band is provided. The duration of the dead zone is dynamically determined and precisely long enough to ensure that there are no shoot-through events, while also minimizing or eliminating switching losses and reverse conduction losses. The method generally includes: (a) calculating an equivalent capacitance seen by a current source charging the midpoint of the half bridge; (b) calculating a ZVS charge requirement based on the link voltage and the equivalent capacitance; (c) calculating the charge delivered by the current source over time during the dead zone vector to make the result equal to the ZVS charge requirement and solving for the ZVS time requirement at each commutation point on the switching cycle; and (d) updating the dead zone for each commutation of each half bridge in the switched mode power converter.

Description

Half bridge with variable dead band control and zero voltage switching

Cross Reference to Related Applications

This application claims the benefit of U.S. provisional application 62/750,896 filed on 26/10/2018, the disclosure of which is incorporated by reference in its entirety.

Technical Field

The present invention relates to zero voltage switching (switching) of half-bridge converters for on-board chargers and other applications.

Background

Half-bridges are components of many Switched Mode Power Converter (SMPC) topologies. Isolated Dual Active Bridge (DAB) is for example an SMPC that uses four half bridges and a transformer to transfer power from the primary to the secondary of the transformer. DAB has one full bridge driving the primary winding (two half bridges in parallel) and one full bridge driving the secondary winding. The current-fed (current-fed) half-bridge shown in fig. 1 comprises two semiconductor switches connected in series with a current source or storage element, such as an inductor, with a connection to the midpoint node. The nodes at the end of the series combination are called links. In the case of the voltage-fed half-bridge shown in fig. 2, this coupling is referred to as DC coupling, since its value is not allowed to become negative. The voltage-fed half-bridges may occur in any combination of controlled or uncontrolled switching. Examples include fully controlled half-bridges (e.g., bidirectional buck-boost DC/DC converters), semi-controlled half-bridges (e.g., simple buck DC/DC converters), and uncontrolled half-bridges (e.g., front-end rectifiers for a Totem-Pole PFC topology).

Considering the half-bridge as a type of switching block, a current-fed half-bridge (CFHB) and a voltage-fed half-bridge (VFHB) can be used to construct the SMPC. The switching block is an active power component and is placed in a configuration with passive power components to create an SMPC power path. The voltage-fed half-bridge may additionally be controlled, semi-controlled or uncontrolled. Many or most controlled semiconductor switches used in SPMC are controlled only when current flows through their primary conduction path in one direction and will self-activate (become reverse biased) when current flows in the opposite direction. Two such switches in a half-bridge configuration are considered controlled switching blocks, although having an uncontrolled state.

Given cross-linked positiveemfEach of the four block states may be commanded by the controller. More particularly, each switch has two states: conductive and non-conductive (blocking). Possible control vectors (vectors) (drive signals) include the following:

S1	S2	control vector
			Opening device	Closing device	High side vector
Closing device	Opening device	Low side vector
			Closing device	Closing device	Dead zone vector
Opening device	Opening device	straight-Through (Shoot-Through) vector

Front rail (rail) to which high side control vector is to be linkedV _link Applied to the midpoint, limiting the voltage across S1

And limiting the voltage across S2

To (3). The low side control vector applies the coupled negative rail to the midpoint, limiting the voltage across S1

And limiting the voltage across S2

To (3). The dead band control vector releases control of the half bridge midpoint to control of a larger topology, which moves v according to the controlled current source_hbSo that

. The shoot-through control vector shorts both the coupled positive and negative rails to v_hbSo that

。

In CFHB, a current source is connected in series with both switches S1 and S2, and thereby regulates their current even when both switches are conducting. Thus, during normal operation of the CFHB, all four control vectors may be used. However, in VFHB, the voltage source is in series with switches S1 and S2, and thus the shoot-through control vector will short the voltage source, resulting in unregulated current. This condition is potentially catastrophic. To guard against this condition, the start of the on signal of one switch is delayed relative to the end of the off signal of the other switch by the dead band (or dead band time). This technique ensures that one switch is completely off (non-conducting) before the complementary switch is driven on, thereby avoiding an unintended shoot-through event. However, the duration of the dead zone is typically predetermined and fixed in length. As a result, existing half-bridge converters experience heat losses due to longer dead zones than are strictly required to ensure that there are no shoot-through events.

Disclosure of Invention

An improved method of Zero Voltage Switching (ZVS) of a voltage-fed half-bridge (VFHB) using a variable dead band is provided. The duration of the dead zone is dynamically determined by the processor based on a real-time open loop circuit model and is precisely long enough to ensure that there are no shoot-through events while also minimizing or eliminating switching losses and reverse conduction losses. Eliminating reverse conduction losses according to the present method improves the efficiency of the SMPC, reduces thermal stress on the semiconductor device, and allows for an easier to design cooling scheme. Any SMPC using VFHB can be modeled as a controlled current source feeding the half-bridge midpoint and a controlled voltage source feeding the half-bridge rails.

According to one embodiment, the method generally comprises: (a) calculating an equivalent capacitance seen by a current source charging the midpoint of the half bridge; (b) calculating a ZVS charge requirement based on a link voltage (link voltage) and an equivalent capacitance; (c) calculating the charge delivered by the current source over time during the dead zone vector, equating the result to the ZVS charge requirement, and solving for the ZVS time requirement at each commutation point (commutation point) over the switching period; and (d) updating the dead zone for each commutation of each half bridge in the SMPC. The above method is primarily implemented in software in conjunction with microprocessor and control circuit hardware adapted to accommodate real-time updates of the SMPC's dead zone.

These and other features of the present invention will be more fully understood and appreciated by reference to the description of the embodiments and the drawings.

Before the embodiments of the invention are explained in detail, it is to be understood that the invention is not limited in its application to the details of operation or the construction and the arrangement of components set forth in the following description or illustrated in the following drawings. The invention is capable of other embodiments and of being practiced or of being carried out in various ways not specifically disclosed herein. Also, it is to be understood that the phraseology and terminology used herein is for the purpose of description and should not be regarded as limiting. The use of "including" and "comprising" and variations thereof is meant to encompass the items listed thereafter and equivalents thereof as well as additional items and equivalents thereof. Furthermore, enumeration may be used in the description of various embodiments. The use of lists should not be construed as limiting the invention to any particular order or number of parts unless explicitly stated otherwise. Nor should the use of the recitation be interpreted as excluding from the scope of the invention any additional steps or components that may be combined with or into the recited steps or components.

Drawings

Fig. 1 is a circuit diagram of a current-fed half-bridge converter.

Fig. 2 is a circuit diagram of a voltage-fed half-bridge converter.

Fig. 3 (a) to 3 (f) show the low-to-high commutation state of VFHB under standard ZVS conditions with fixed dead zones.

Fig. 4 shows a long dead band for the control of VFHB, where the dead band is longer than the time required to charge the half-bridge capacitor.

Fig. 5 shows a short dead band for the control of VFHB, where the dead band is shorter than the time required to charge the half-bridge capacitor.

Fig. 6 shows a long dead band for control of VFHB, where the dead band is precisely long enough to charge the half-bridge capacitance of the half-bridge for ZVS.

Fig. 7 is a flow diagram of a method for ZVS of a voltage-fed half-bridge according to one embodiment.

Fig. 8 (a) to 8 (e) show changes in Charge Equivalent Capacitance (Charge Equivalent Capacitance) with corresponding accumulated charges and Equivalent static Capacitance.

Fig. 9 is a circuit diagram of a single-phase voltage-fed inverter (inverter) having an ideal dead zone determined by a controller according to the current embodiment.

Detailed Description

An improved method of zero voltage switching of a voltage-fed half-bridge using a variable dead band is provided. As discussed herein, the duration of the dead zone is dynamically determined to ensure that there are no shoot-through events while also minimizing or eliminating switching losses and reverse conduction losses. By way of background, section I below includes known techniques for zero voltage switching of a voltage-fed half-bridge. Section II below includes a discussion of the method of the present invention, namely zero voltage switching of the voltage-fed half-bridge using a dynamically calculated variable dead band control vector.

I.Zero voltage switching of a voltage-fed half-bridge

Zero Voltage Switching (ZVS) is the commutation of a semiconductor switch from an off-state to an on-state when there is zero voltage across its primary conduction path. The process by which ZVS commutation occurs can be illustrated with any VFHB low to high commutation as shown in fig. 3 (a) -3 (f). With respect to ZVS, the semiconductor switch can be considered as an ideal MOSFET in parallel with the output capacitance and having a forward voltageV _rth An anti-parallel (anti-parallel) diode. Using two such switches in a half-bridge configuration, such that S1 is a high-side switch and S2 is a low-side switch, across any DC linkV _link Referred to as low side rail, herein referred to asGNDHaving a midpoint voltage supplied by some controlled current source, e.g. a resonant inductorV _HB So that the current flowing into the midpointi _hb Always positive, under ZVS conditions, the entire commutation process can fail (broken down), as shown for the low-to-high half-bridge commutations shown in fig. 3 (a) -3 (f). Here, the output capacitance of each switch is abbreviated

And

. An anti-parallel diode is considered ideal and the voltage source

Is a function of the state of the diode-conducting =1 and non-conducting = 0-such that

And is

. In this way the behavior of any arbitrary self-activating semiconductor switch can be modeled as an anti-parallel device.

Prior to the commutation in figure 3 (a),i _hb flows freely through S2, anV _HB Is clamped toGND. When the switch-off of the S2 is performed,i _hb initiating migration from the conductive channel to both S2 and S1C _oss Charging, as shown in fig. 3 (b). This marks the beginning of the dead band because the controller is applying the dead band control vector, while driving both S1 and S2 off. When a channel is collapsing (collapse)V _HB The rate of rise is controlled byi _hb Channel resistance of S1 and of both S1 and S2C _oss Control-because the channel collapses, the resistance increases, and morei _hb Migrating to charge C1 and C2. Once the switch is completely off, the channel resistance is high enough that the current through it becomes negligible, and thenV _HB Is dominated by the following relationship (equation 1):

（1）

if the switch has a fast turn-off edge rate, as in a MOSFET, thenC _oss The channel stops conducting before charging to the opposite coupling rail, so that the dead zone must be sufficiently longTo drive the midpoint fromGNDIs charged toV _link And thus C1 fromV _link Discharge to 0V. Ideally, S1 would be at exactly that time

Is turned on, but actuallyV _HB Charging will continue until D1 of S1 becomes reverse biased, and willV _HB Is clamped to

. Once the midpoint voltage is clamped, S1 burns (burn) energy in the remainder of the dead band. Therefore, it is desirable to make this region as short as possible. When S1 is turned on (communtate on), the charging is completed because C1 is chargedV _rth And by forming a channel discharge will experience some switching loss, but the loss will be small. After the commutation at S1, the signal is,i _hb should still be positive in the bridge, although ideally,i _hb immediately after the commutation at S1, 0A will be reached to minimize the resonant current.

Typically, the dead band is set to a fixed value in a control circuit that generates Pulse Width Modulation (PWM) of the half bridge. ZVS time requirementT _ZVS Is the minimum time required to control the current source (assuming a known current) to deliver the charge required for ZVS. ZVS time requirementT _ZVS Inversely proportional to the current during the dead zone and proportional to the link voltage. Therefore, a typical control circuit for ZVS applications will be based on the lowest expectationsI（T _ZVS ) And the highest link voltage to fix the dead zone so that ZVS can be guaranteed for all operating points. However, this means that the ZVS charge requirement will be met sooner as the current flowing into the half bridge is larger, and the midpoint voltage of the half bridge defined by S1 and S2v _hb The target coupled rail will be reached and charging will continue beyond the rail before the dead zone ends.

If this charging is allowed to continue, not only will ZVS be lost, but at high switching currents, the semiconductor may be exceededThe voltage rating of the switch, resulting in degraded life and device failure. For this reason, the ZVS topology (and most SPMC topologies in general) provides a current to the midpointi _hb Free-wheeling path. This is achieved by the reverse conduction properties of, for example, the anti-parallel body of MOSFETs and IGBTs or the external diode or 2DEG in a HEMT. Since this reverse conduction is uncontrolled, there must be an associated voltage drop equal to the threshold of the anti-parallel device, and the midpoint will therefore be clamped to the rail tie plus the reverse threshold voltageV _rth . In the clamped conducting state of the current flow,i _hb is forced through the device in the direction of the reverse voltage drop, generating a thermal loss known as reverse conduction loss. This condition is depicted in fig. 3 (d), where the low-to-high commutation of the half-bridge is significantly longer than the time required to transfer enough charge to the equivalent capacitance to change the midpoint voltage by the required amount. As a result, once the midpoint voltage is reachedV _link (60V in this example) the current keeps charging the equivalent capacitance until the mid-point voltage exceeds the high side rail voltage the reverse threshold of the device. Fig. 4 (depicting a short dead band) results in hard switching at about 20V in this example, while the ideal dead band of fig. 5 avoids switching losses and reverse conduction losses. Fig. 4, 5 and 6 provide examples based on the general situation presented in fig. 3 (a) - (f), where a current source is provided with an 8 muh inductor with a constant initial current of 2A and a link voltage of 60V. The only parameter that varies between the three graphs is dead timet _db 。

Ⅱ.Variable dead band control for voltage switching of a voltage fed half bridge

To eliminate the reverse conduction losses discussed in section I above, the dead band is calculated dynamically for each commutation point, rather than using a predetermined value corresponding to worst case requirements. Eliminating reverse conduction losses improves the efficiency of the SMPC, reduces thermal stress on the semiconductor device, and allows for easier to design cooling schemes.

Referring to the flow chart of FIG. 7, a method for using a user interface is shownA method of zero voltage switching of a voltage fed half bridge of a variable dead band control vector. The method typically includes dynamically calculating the dead band for each commutation point rather than using a predetermined value corresponding to worst case requirements. More particularly, the method generally comprises the following method steps: (a) calculating an equivalent capacitance seen by a current source charging a midpoint of a half-bridge based on a link voltage, an SMPC topology, and an SMPC circuit stateC _eq (step 10); (b) calculating a ZVS charge requirement based on the link voltage and the equivalent capacitance (step 12); (c) calculating vectors in dead zoneQ _hb The charge delivered by the current source over time is measured, the result is made equal to the ZVS charge requirement, and the resolution at each commutation point over the switching cycle is takenT _ZVS (step 14); and (d) updating the dead zone for each commutation of each half bridge in the SMPC (step 16).

The equivalent capacitance is calculated at step 10C _eq Including determining any capacitance along the return path of the current source. This may include parasitic PCB capacitance, magnetic winding capacitance, and expected capacitance, such as resonant tank (resonant tank). The examples used in fig. 4, 5 and 6 only assume switched capacitorsC _oeq PCB capacitorC _PCB And winding capacitance C _L In parallel along the return path of the inductor. Therefore, the temperature of the molten metal is controlled,

. This is the case in single half-bridge commutation in DAB. This step is also visualized with the following example. Using a gallium nitride high electron mobility transistor (GaN HEMT) from GaN systems inc, part number GS66516T, fig. 8 shows how the capacitance, charge, equivalent capacitance and energy can vary with the output voltage of a single GaN HEMT. Since the change in output voltage must be equal to the coupling over the dead band of half-bridge commutation, fig. 8vds(drain to source voltage) andV _link fig. 3 (a) is interchangeable. Fig. 8 (a) shows the output capacitance change with voltage. FIG. 8 (b) shows the accumulation across one device with voltageOf the charge of (c). FIG. 8 (c) depicts the voltage at which the voltage will remain withC _oss The equivalent static capacitance value of the same amount of charge is called "charge equivalent capacitance". Fig. 8 (d) shows the accumulated energy with voltage. FIG. 8 (e) shows that at this voltage it will remain withC _oss The equivalent static capacitance value of the same amount of energy is called "energy equivalent capacitance".

Based on equivalent capacitanceC _eq ZVS charging requirementQ _ZVS And then calculated according to the following (equation 2), wherein,C _eq is a function of voltage, since of the semiconductorC _oss Usually with output voltagev _oss Is not constant:

（2）

as has been described above, in the above-mentioned,Q _ZVS is the midpoint voltage of S1 and S2

from-0V toV _link Required charge which in turn will beV _oss1 FromV _link Discharge to 0V. The calculation is then performed according to the following (equations 3-4)ZVSTiming requirementsT _ZVS ：

（3）

（4）

In the above-described equation 3, the,Q _ZVS is calculated as the average current (inverse ZVS period times the integral of the current) during the dead band vector. In the above-described equation 4, the,T _ZVS the charge required to solve for ZVS is divided by the average current over time orI（T _ZVS ). Therefore, to properly set for determinationT _ZVS The initial current at the beginning of each dead zone during the switching period must be calculated.

As an example, the controlled current source in FIG. 3 (a) is to include a resonant inductorL=8μHIs achieved by the load of (1). Assumed at time

At the position of the air compressor, the air compressor is started,Lis charged to

And no initial drive voltage is present across its terminals,

this means that current initially freewheels through the inductor. The winding capacitance of the inductor is

And the parasitic capacitance of the PCB is

Of both S1 and S2C _oss In parallel as seen by the inductor. The link voltage is set to

And is prepared byT _db0 The dead band is given a change to show its effect. FIG. 6 shows the low-to-high commutation of the half bridge, with dead zones

From

To

Is the precise time required for 2A to transfer enough charge to the equivalent capacitance to change the midpoint voltage by 60V. This is the ideal commutation for the half bridge. The dead zone can be 6.8 times more than the optimum large chargeVThe time required to provide a buffer for real world sensor errors without incurring back conduction losses.

The method alsoIncludedThe dead band is updated at step 16 for each commutation of each half bridge in the SMPC. Each step of the foregoing method may be implemented in digital logic incorporating a Dual Active Bridge (DAB) converter having four half-bridges, but the method may be implemented in other SMPCs as desired. The method does not require any additional hardware and instead relies on a mathematical model of the system topology to calculate the dead zone in real time. As described above, eliminating reverse conduction losses according to the present method improves the efficiency of SMPCs, reduces thermal stress on semiconductor devices, and allows for easier to design cooling schemes.

According to a further embodiment, a single phase voltage fed inverter for producing a square wave output is shown in fig. 9. The inverter comprises a half bridge with two series connected switches S1, S2 and two freewheeling anti-parallel diodes D1, D2. The switches may not be activated at the same time, which would otherwise short the voltage source. According to one embodiment, the ideal dead band is calculated in digital logic, the dead band being the interval between the turn-off and turn-on of the series connected switches. In particular, a controller 20, such as an integrated circuit or digital signal processor, determines the equivalent capacitance at the midpoint 22 of the half bridge. The equivalent capacitance may be determined empirically for a given input current at the midpoint or a given rail voltage across the half-bridge, and typically includes any of the switched capacitance, PCB capacitance, and winding capacitance. Based on the equivalent capacitance, controller 20 determines the ZVS charging requirement according to equation (2) above (Q _ZVS ) Which represents moving the midpoint voltage from 0V to the rail voltage (V _link ) The required charge. The controller 20 then determines the ideal dead zone according to equation (4) aboveT _ZVS Wherein ZVS charging requirement: (Q _ZVS ) Divided by the average current over time, which accounts for ZVS: (I（T _ZVS ）) Which is derived by the controller from the initial current at the beginning of each dead zone. The controller 20 will then place the desired dead bandT _ZVS Storing to computer readable memory, potentially updating existing values of half-bridge dead band, and creating a dead band at least equal to idealT _ZVS With or without a buffer period, between the turn-off and turn-on of the series-connected switches. This process may be repeated periodically or in response to an event, such as a change in input current to the midpoint 22 of the half bridge or a change in the DC rail voltage.

The above description is that of the current embodiment of the invention. Various changes and modifications can be made without departing from the spirit and broader aspects of the invention. The present disclosure is presented for illustrative purposes and should not be construed as an exhaustive description of all embodiments of the invention or to limit the scope of the claims to the specific elements shown or described in connection with these embodiments. Any reference to a singular element, for example, using the articles "a," "an," "the," or "said" should not be construed as limiting the element to the singular.

Claims (15)

1. A method, comprising:

providing a switch-mode power converter comprising a voltage source outputting a DC rail voltage, a half bridge having first and second switches and a midpoint node, and a controller;

determining, by the controller, a zero-voltage switching dead band in which the first and second switches are closed, wherein determining the zero-voltage switching dead band comprises:

calculating a zero-voltage switching charge requirement for moving the voltage at the midpoint node from 0V to the DC rail voltage: (Q _ZVS ），

Calculating an average current at the midpoint node during deactivation of the first switch and deactivation of the second switch ((I （T _ZVS ）) And an

Based on zero voltage switching charge requirement (Q _ZVS ) And average current (I（T _ZVS ）) To determine the time interval for zero voltage switching: (T _ZVS ）；

Providing, by the controller, a switching control signal to the first and second switches for generating the AC output, wherein a time interval between deactivation of the first switch and activation of the second switch is at least equal to the zero voltage switching dead band.

2. The method of claim 1, wherein determining a zero voltage switching dead band is in response to a detected change in input current to a midpoint node of the half bridge.

3. The method of claim 1, wherein determining a zero voltage switching dead band is in response to a detected change in DC rail voltage.

4. The method of claim 1, wherein a zero voltage switching charge requirement is calculated (bQ _ZVS ) Is based on an equivalent capacitance at the midpoint node, where the input current is held constant or the voltage across the half bridge is held constant.

5. The method of claim 4, wherein the equivalent capacitances include parasitic capacitances, winding capacitances, and switch capacitances.

6. The method of claim 1, further comprising storing a zero voltage switching dead zone to a non-transitory computer readable memory.

7. The method of claim 1, wherein the half-bridge is one of a plurality of half-bridges of a switch mode power converter, the method further comprising determining, by the controller, a zero-voltage switching dead band for each of the plurality of half-bridges.

8. The method of claim 1, wherein the time interval is equal to a zero voltage switching dead zone.

9. The method of claim 1, wherein the time interval is equal to a zero voltage switching dead zone and a buffer period, the buffer period being between 1% and 10% of the dead zone.

10. A switched mode power converter comprising:

a DC voltage source for providing a DC rail voltage;

a half-bridge connected in parallel with a direct current voltage source, the half-bridge comprising first and second switches and a midpoint node; and

a controller operable to provide switching control signals to the first and second switches and operable to adjust a time interval between deactivation of the first switch and activation of the second switch, wherein the controller determines the time interval by:

calculating a zero-voltage switching charge requirement for moving the voltage at the midpoint node from 0V to the DC rail voltage: (Q _ZVS ），

Calculating an average current at the midpoint node during deactivation of the first switch and deactivation of the second switch ((I （T _ZVS ）) And an

Based on zero voltage switching charge requirement (Q _ZVS ) And average current (I（T _ZVS ）) To determine the time interval for zero voltage switching: (T _ZVS ）。

11. The switch mode power converter of claim 10, wherein the controller determines the time interval in response to a detected change in input current to a midpoint node of the half bridge.

12. The switch mode power converter of claim 10, wherein the controller determines the time interval in response to a detected change in the DC rail voltage.

13. The switch mode power converter of claim 10, wherein a zero voltage switching charge requirement is calculated (b:)Q _ZVS ) Based on the equivalent capacitance at the midpoint node, where the input current remains constant or the voltage across the half bridge remains constant.

14. The switch-mode power converter of claim 10, further comprising a second half-bridge including a third switch and a fourth switch, the controller operable to adjust a time interval between deactivation of the third switch and activation of the fourth switch.

15. The switch mode power converter of claim 10, wherein the half bridge forms part of a full bridge DC to AC inverter.

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