CN112882424A - Data acquisition system and method for power system - Google Patents
Data acquisition system and method for power system Download PDFInfo
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- CN112882424A CN112882424A CN202110108086.XA CN202110108086A CN112882424A CN 112882424 A CN112882424 A CN 112882424A CN 202110108086 A CN202110108086 A CN 202110108086A CN 112882424 A CN112882424 A CN 112882424A
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- 238000007405 data analysis Methods 0.000 description 2
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/24—Pc safety
- G05B2219/24215—Scada supervisory control and data acquisition
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Abstract
The invention discloses a data acquisition system and a data acquisition method for an electric power system, wherein the acquisition system comprises a mainboard, daughter boards and a back board, wherein the back board is provided with a mainboard slot position and a plurality of daughter board slot positions, and the mainboard and the daughter boards are arranged on the back board through the slot positions; the mainboard is used for unifying the collected signals of all the daughter boards into a clock, chip selection and conversion signals and data, and transmitting the signals and the data to each daughter board through the backboard in an M-LVDS level mode; the daughter board includes analog quantity acquisition integrated circuit board and switching value acquisition integrated circuit board for switching value signal and analog quantity signal are gathered according to the collection signal acquisition of mainboard, and send for the mainboard analysis. The invention improves the resource utilization rate and greatly increases the flexibility of the system.
Description
Technical Field
The invention relates to the field of data acquisition, in particular to a data acquisition system and method for an electric power system.
Background
The electric power system is a complex and huge system, in order to guarantee safe and efficient operation of the electric power system, and the data acquisition of the electric power system is of vital importance, at present, a plurality of data acquisition methods take measures according to local conditions according to the acquisition requirements of the specific electric power system, the acquisition methods are not flexible and changeable, the inter-insertion performance between board cards is not high, new data acquisition systems need to be developed aiming at different electric power systems, development tasks are increased, the investment of manpower, material resources and financial resources is increased, and resource waste is easily caused.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a power system data acquisition system and method capable of improving system flexibility, aiming at the defects of low flexibility and low resource utilization rate of the current power system acquisition method.
The technical scheme adopted by the invention for solving the technical problems is as follows:
the utility model provides a data acquisition system of an electric power system, which comprises a mainboard, a daughter board and a backboard, wherein the backboard is provided with a mainboard slot position and a plurality of daughter board slot positions, and the mainboard and the daughter board are arranged on the backboard through the slot positions;
the daughter board comprises an analog quantity acquisition board card and a switching quantity acquisition board card and is used for acquiring switching quantity signals and analog quantity signals;
the main board integrates the collected signals of all the sub-boards into a clock, selects chips, converts signals and data, and transmits the signals and the data to each sub-board through the backboard in an M-LVDS level mode; the address of each daughter board is determined by the daughter board slot position.
According to the technical scheme, the mainboard comprises a power supply, a central controller and an mLVDS master transceiver, and the central controller is connected with the mainboard slot position through an I2C bus; the clock signal, the chip selection signal and the conversion signal sent by the central controller are converted into differential signals through the mLVDS transceiver and are sent to the daughter boards through the backplane.
According to the technical scheme, each analog quantity acquisition board card comprises a power supply, an acquisition chip, an mLVDS sub transceiver and a memory, and the memory is connected with a daughter board slot on the backboard through an I2C bus; the mLVDS sub transceiver acquires a clock, a chip selection and a conversion signal of the mainboard through the backboard and sends the clock, the chip selection and the conversion signal to the acquisition chip, and the acquisition chip sends acquired analog quantity data to the mainboard through the mLVDS sub transceiver.
According to the technical scheme, each switching value acquisition board card comprises a power supply, an acquisition chip, an mLVDS sub transceiver and a memory, and the memory is connected with a daughter board slot on the backboard through an I2C bus; the mLVDS transceiver acquires a clock and a chip selection of the mainboard through the backboard and sends the clock and the chip selection to the acquisition chip, and the acquisition chip sends acquired switching value data to the mainboard through the mLVDS transceiver.
In the technical scheme, the memory is an EEPROM, and the address bit is 3 bits.
According to the technical scheme, the address bit of the EEPROM is connected with a pull-up resistor to a power supply on the daughter board, the address bit of the slot position on the backboard is configured in a suspension mode through connecting a pull-down resistor, and when the daughter board is inserted into the slot position of the daughter board, the corresponding address is determined by the pull-up resistor on the daughter board and the pull-down resistor on the backboard.
According to the technical scheme, each daughter board slot comprises 8 daughter board sockets.
According to the technical scheme, the daughter board slot is an expandable bit and comprises multiple I2C interfaces.
According to the technical scheme, the switching value acquisition board card adopts a parallel-to-serial shift register to convert a plurality of paths of parallel switching value signals into serial signals to be output, and the analog value acquisition board card outputs data in a serial output mode.
The invention also provides a data acquisition method of the power system, which adopts the framework of the main board, the sub-board and the back board and mainly comprises the following steps:
the mainboard unifies the acquired signals of all the daughter boards into a clock, a chip selection and a conversion signal and data, and is connected to each daughter board through the backboard in an M-LVDS level mode, the clock, the chip selection and the conversion signal of all the daughter boards are shared, and only the data signals are separated;
the daughter board collects a switching value signal and an analog signal according to the signal of the mainboard and sends the signals to the mainboard;
the mainboard distinguishes the daughter board type corresponding to the slot socket through the board card type stored in the memory on the daughter board, and analyzes the acquired data according to the daughter board type.
The invention has the following beneficial effects: the invention adopts the structure of a main board, sub-boards and a back board, the main board signal is connected to each sub-board through the back board in the form of M-LVDS level, the clock, chip selection and conversion signals of all the sub-boards are shared, and only the data signals are separated. Signals of each slot position of the backboard are unified, the switching value acquisition board card can be inserted into each backboard slot position, the analog value acquisition board card can be inserted into each backboard slot position, users can select board cards with different quantities and types according to requirements, the whole design is flexible and changeable, the resource utilization rate is improved, and the flexibility of the system is greatly increased.
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
fig. 1 is a schematic structural diagram of a data acquisition system of an electric power system according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Fig. 1 is a block diagram showing the overall structure of the present invention. The whole design adopts a framework of a mainboard, a backboard and daughter boards, the backboard is provided with a mainboard groove position and a plurality of daughter board groove positions, and the mainboard and the daughter boards are installed on the backboard through the groove positions; the daughter board includes analog quantity acquisition integrated circuit board and switching value acquisition integrated circuit board for gather switching value signal and analog signal.
The main board and the daughter board are connected with the outside through a panel connector, and the panel connector is an external signal input interface connector or an interface connector for external communication and display, which is a general name of an interface connected with an external signal. For example, the external panel interface of the motherboard may be a communication interface (network port, RS485, debug serial port, etc.) and a device operation status light indicator, and the corresponding panel connector may be an RJ45 connector or a terminal of DB9, and an LED socket. The panel connector in the daughter board is a connector for receiving input signals, and is an analog quantity signal input interface or a switching quantity input interface.
The collected signals from the main board to the daughter board are divided into clock, chip selection, conversion signals and data, and the collected signals are transmitted to the backplane in the form of M-LVDS (multi-point low voltage differential signaling) level.
The mainboard comprises a power supply, a central controller and an mLVDS master transceiver, wherein the central controller is connected with the mainboard slot position through an I2C bus; the clock signal, the chip selection signal and the conversion signal sent by the central controller are converted into differential signals through the mLVDS transceiver and are sent to the daughter boards through the backplane.
Each analog quantity acquisition board card comprises a power supply, an acquisition chip, an mLVDS sub transceiver and a memory, and the memory is connected with a daughter board slot on the backboard through an I2C bus; the mLVDS sub transceiver acquires a clock, a chip selection and a conversion signal of the mainboard through the backboard and sends the clock, the chip selection and the conversion signal to the acquisition chip, and the acquisition chip sends acquired analog quantity data to the mainboard through the mLVDS sub transceiver.
Each switching value acquisition board card comprises a power supply, an acquisition chip, an mLVDS sub transceiver and a memory, and the memory is connected with a daughter board slot on the backboard through an I2C bus; the mLVDS transceiver acquires a clock and a chip selection of the mainboard through the backboard and sends the clock and the chip selection to the acquisition chip, and the acquisition chip sends acquired switching value data to the mainboard through the mLVDS transceiver.
The memory can be selected from EEPROM, and the communication between the mainboard and the EEPROM on the daughter board adopts I2C interface form. The EEPROM address is consistent with the slot position address of the backboard, and the mainboard can execute different data analysis programs on the acquired data according to the board card type information stored by the daughter board EEPROM. The analog quantity board card uniformly adopts an ADC chip AD7606 to collect data, and the switch quantity board card uniformly uses a shift register to convert multi-path switch quantity signals into serial data to be output.
The acquisition signals from the main board to the daughter boards are divided into clock, chip selection, conversion signals and data, the slot position signals of each daughter board are completely consistent, and the daughter boards can be freely and mutually plugged.
The acquisition signal is converted into an M-LVDS level through the M-LVDS transceiver and then is transmitted to the daughter board through the backboard, and the M-LVDS transceiver is also adopted on the daughter board to convert the M-LVDS level into a single-ended level and then is transmitted to the acquisition chip. The M-LVDS is in a differential level form, has strong anti-interference capability, and has high reliability when signals are transmitted through the backboard in the differential level form.
Furthermore, the M-LVDS supports more points and 32 nodes, so that the sharing of a plurality of slot position clocks, chip selection and conversion signals can be ensured, and the maximum number of the nodes on the M-LVDS bus can not exceed 32. When the number of nodes exceeds the standard, one path of clock, chip selection and conversion signal can be expanded again, and so on.
The I2C interface is selected to be used on the daughter board to support an EEPROM with address bits, the I2C interface supports a master and a plurality of slaves, 128 nodes can be hung on the bus, and one I2C bus can hang a plurality of EEPROMs. The EEPROM of the common I2C interface generally has 3bit address, A2, A1 and A0, and can only be expanded to 8 slot positions, if more slot positions need to be expanded, one path of I2C interface can be increased, and the rest can be expanded to a plurality of slot positions, the 16 slot positions of the daughter board of the general acquisition system are enough, and the mainboard only adopts two paths of I2C interfaces.
Furthermore, the EEPROM address on each daughter board corresponds to the slot position address of the backplane one by one, the EEPROM addresses A2, A1 and A0 are connected with a pull-up resistor to a power supply on the daughter board, the slot position address on the backplane is configured by a pull-down resistor and a suspension, and when the daughter board is inserted into the slot position of the backplane, the corresponding address is determined by the pull-up resistor on the daughter board and the pull-down resistor on the backplane.
Furthermore, the EEPROM on the daughter board is written into the board card type before leaving the factory, the motherboard reads the board card type to which the corresponding slot address belongs through the I2C interface, and different data analysis programs are executed according to different board card types. For the analog quantity board card, correction coefficients of all channels can be stored in the EEPROM, and the correction coefficients do not need to be corrected on site after delivery.
The analog board card can be divided into various types and ranges of board cards, alternating voltage and current acquisition board cards and direct voltage and current acquisition board cards, and can also be divided into different ranges of board cards, 0-150V alternating voltage acquisition, 0-100A alternating current acquisition, 4-20 mA direct current signal acquisition, 0-10V direct current voltage acquisition and the like. Analog quantity board cards of different types and different measuring ranges adopt ADC chips AD7606 to collect signals, and AD7606 adopts serial data output in design, and only a clock, chip selection and signal and data conversion are needed. A plurality of AD7606 chips can be adopted on each analog quantity board card, the clock, the chip selection and the conversion signal are shared, and the data are separated. K slices of AD7606 require K lanes of data. The signal clock, chip selection and conversion signals of the slot position of the backboard are respectively provided with only one path of differential signals, and under the condition that K AD7606 chips are arranged on the daughter board, each path of differential data signals (clock, chip selection and conversion signals) needs K paths of M-LVDS transceivers, and one path of differential signals is converted into a plurality of paths of single-ended signals to drive the AD 7606.
The switching value board card adopts a shift register to convert switching value signals input in parallel into serial data to be output, control signals of the shift register only need clock, chip selection and data, a single shift register generally has only 8 channels to realize the input of a plurality of switching value channels, a plurality of shift registers can be cascaded, the output of a first shift register is connected with the serial input end of a second shift register, and the serial input end of the first shift register is grounded. All the shift registers share one path of clock and chip selection, and the data output of the last shift register is transmitted to the main control board through the back board. The switching value board can be designed into 24V, 110V and 220V switching value boards according to actual needs, and the acquisition method is the same. And configuring board cards with different measuring ranges according to actual requirements.
Based on the data acquisition system adopting the framework of the main board, the daughter board and the back board, the data acquisition method mainly comprises the following steps:
the mainboard unifies the acquired signals of all the daughter boards into a clock, a chip selection and a conversion signal and data, and is connected to each daughter board through the backboard in an M-LVDS level mode, the clock, the chip selection and the conversion signal of all the daughter boards are shared, and only the data signals are separated;
the daughter board collects a switching value signal and an analog signal according to the signal of the mainboard and sends the signals to the mainboard;
the mainboard distinguishes the daughter board type corresponding to the slot socket through the board card type stored in the memory on the daughter board, and analyzes the acquired data according to the daughter board type.
In summary, the invention overcomes the defects of low flexibility and low resource utilization rate of the current power system acquisition method, provides a design framework which can be expanded by users by selecting different numbers and types of board cards according to requirements, is flexible and changeable, improves the resource utilization rate, and greatly increases the flexibility of the system.
It will be understood that modifications and variations can be made by persons skilled in the art in light of the above teachings and all such modifications and variations are intended to be included within the scope of the invention as defined in the appended claims.
Claims (10)
1. A data acquisition system of an electric power system is characterized by comprising a main board, a daughter board and a back board, wherein the back board is provided with a main board slot position and a plurality of daughter board slot positions;
the mainboard is used for unifying the collected signals of all the daughter boards into a clock, chip selection and conversion signals and data, and transmitting the signals and the data to each daughter board through the backboard in an M-LVDS level mode;
the daughter board includes analog quantity acquisition integrated circuit board and switching value acquisition integrated circuit board for switching value signal and analog quantity signal are gathered according to the collection signal acquisition of mainboard, and send for the mainboard analysis.
2. The data acquisition system of the power system as claimed in claim 1, wherein the main board comprises a power supply, a central controller and a main transceiver, and the central controller is connected with the main board slot through an I2C bus; the clock signal, the chip selection signal and the conversion signal sent by the central controller are converted into differential signals through the transceiver and are sent to the daughter boards through the backplane.
3. The power system data acquisition system of claim 1, wherein each analog acquisition board card comprises a power supply, an acquisition chip, a sub transceiver and a memory, and the memory is connected with the daughter board slot on the backplane through an I2C bus; the sub-transceiver acquires the clock, chip selection and conversion signals of the main board through the backboard and sends the signals to the acquisition chip, and the acquisition chip sends acquired analog quantity data to the main board through the sub-transceiver.
4. The power system data acquisition system of claim 1, wherein each switching value acquisition board card comprises a power supply, an acquisition chip, a sub transceiver and a memory, and the memory is connected with the daughter board slot on the backplane through an I2C bus; the sub-transceiver acquires the clock and chip selection of the mainboard through the backboard and sends the clock and chip selection to the acquisition chip, and the acquisition chip sends acquired switching value data to the mainboard through the sub-transceiver.
5. The power system data acquisition system of claim 3 or 4, wherein the memory is an EEPROM and the address bits are 3 bits.
6. The data acquisition system of the power system as claimed in claim 5, wherein the address bit of the EEPROM is connected to a pull-up resistor on the daughter board to a power supply, the address bit of the slot on the backplane is configured by connecting a pull-down resistor and suspending, and when the daughter board is inserted into the slot of the daughter board, the corresponding address is determined by the pull-up resistor on the daughter board and the pull-down resistor on the backplane.
7. The power system data acquisition system of claim 1 wherein each daughterboard slot comprises 8 daughterboard sockets.
8. The power system data acquisition system of claim 1 wherein the daughter board slot is an expandable bit comprising a multi-way I2C interface.
9. The power system data acquisition system of claim 1, wherein the switching value acquisition board uses a parallel-to-serial shift register to convert multiple parallel switching value signals into serial signals for output, and the analog value acquisition board uses a serial output mode to output data.
10. A data acquisition method of an electric power system is characterized in that the method adopts a structure of a main board, a sub-board and a back board, and mainly comprises the following steps:
the mainboard unifies the acquired signals of all the daughter boards into a clock, a chip selection and a conversion signal and data, and is connected to each daughter board through the backboard in an M-LVDS level mode, the clock, the chip selection and the conversion signal of all the daughter boards are shared, and only the data signals are separated;
the daughter board collects a switching value signal and an analog signal according to the signal of the mainboard and sends the signals to the mainboard;
the mainboard distinguishes the daughter board type corresponding to the slot socket through the board card type stored in the memory on the daughter board, and analyzes the acquired data according to the daughter board type.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110108086.XA CN112882424A (en) | 2021-01-27 | 2021-01-27 | Data acquisition system and method for power system |
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| CN202110108086.XA CN112882424A (en) | 2021-01-27 | 2021-01-27 | Data acquisition system and method for power system |
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| CN1888994A (en) * | 2005-06-29 | 2007-01-03 | 沈阳中科博微自动化技术有限公司 | Multi-serial bus passive backplane |
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