CN112858873B - Pin resource allocation method and system based on two-end test - Google Patents
Pin resource allocation method and system based on two-end test Download PDFInfo
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Abstract
The invention discloses a pin resource allocation method and a pin resource allocation system based on two-end testing, which solve the problem of pin resource allocation when a device to be tested with multiple pins performs two-end testing by utilizing the related theory of graph theory. The waste of test pin resources on testbench can be reduced in the automatic test, on the other hand, the space complexity can be reduced, the consumption of the memory of the computer can be reduced, and the time complexity can be reduced, so that the test time can be further reduced.
Description
Technical Field
The invention relates to the field of semiconductor design and production, in particular to a pin resource allocation method and system based on two-end test.
Background
In chip testing, two-end testing is often adopted, that is, only two pins in a DUT (device under test) are conducted, and a method of testing to obtain a relevant result is adopted. In actual test operation, it is necessary to connect a pair of pins on the DUT for both-end test connections to a pair of test pins adjacent to a logical address of the outside testbench (test stand). Fig. 1 shows an example of circuit test pin assignment for a multi-pin device under test, where Z1, Z2, and Z3 are specific components that need to be tested at two ends, and the ports at two ends are a and B, A and C, C and D, respectively, and Z1, Z2, and Z3 form a DUT, that is, A, B, C, D is the pin that needs to be assigned when the DUT performs two-end test. Thus, the DUT may define three sets of pin connection sets PinConnection to be allocated in total, respectively: { A; b, { a }; c, { C; d }. Because the number of pins to be allocated to the DUT is small, the optimal pin allocation mode of the DUT in two-end test can be obtained through exhaustion, namely the pin allocation mode { A shown in FIG. 1; b, { a }; c, { C; d, the pin allocation is such that the DUT only needs to occupy 4 test pins on testbench.
However, with the increase of the complexity of the pin allocation scenario, the time requirement of the application scenario on pin resource allocation and the precision requirement of the pin allocation algorithm, providing an efficient and accurate feasible pin resource allocation algorithm for the device to be tested based on the two-end test is a critical problem for efficiently utilizing the test pins on testbench.
Therefore, it is necessary to provide an efficient and accurate pin resource allocation feasible algorithm for the device under test based on the two-end test.
Disclosure of Invention
In view of the above-described deficiencies of the prior art, the present invention aims to: a method and system for distributing pin resources when two-end test is performed on a multi-pin device to be tested by using a related theory of graph theory are provided.
In order to achieve the above object, the present invention provides the following technical solutions:
The invention relates to a pin resource allocation method based on two-end test, which comprises the following steps:
acquiring all pin connection groups to be allocated on a device to be tested, wherein each pin connection group to be allocated comprises two pin sets, and determining one pin from the two pin sets for connecting to a test pin during allocation, and obtaining a pin allocation mode of the device to be tested after the allocation of all pin connection groups is completed; obtaining a plurality of pin allocation modes according to different pin allocations in the pin connection group;
establishing an adjacency graph according to the pin allocation mode, wherein nodes in the adjacency graph correspond to pins of a device to be tested, and edges in the adjacency graph represent pin relations, namely two nodes of a certain edge correspond to two pins in a pin connection group; calculating the resource number of each pin allocation mode by utilizing the adjacency graph, wherein the resource number refers to the number of test pins required to occupy by the pin allocation mode;
the pin allocation mode with the minimum resource number is the optimal pin allocation mode when the device to be tested performs two-end test.
In the present invention, the calculation of the number of resources of each pin allocation mode using the adjacency graph means: calculating the minimum stroke number required by the adjacent graph to be completely drawn, and adding the minimum stroke number and the number of the pin connection groups to obtain a value which is the resource number of the pin allocation mode; wherein, the minimum stroke number S required by the adjacency graph to be completely drawn is as follows: And the K is the number of connected graphs contained in the adjacent graph, and the S k is the minimum stroke number required by the kth connected graph to be completely drawn.
In the invention, the pin connection group is a non-directional pin connection group (2 pinconnection), and two pins distributed in the non-directional pin connection group have no front-back sequence requirement on the logic address of a test pin to be connected; an adjacency graph constructed by a pin allocation mode formed by allocating undirected pin connection groups is an undirected adjacency graph; when the adjacency graph is an undirected adjacency graph, the calculation method of S k is as follows: traversing all nodes in the kth connected graph to obtain the number N of the odd degree nodes in the connected graph, and then: 1) N is 0 or 2, then S k =1; 2) N >2 (N is necessarily even), then S k =n/2.
In the invention, the pin connection group is a directional pin connection group (2 pinwithdirection), and two pins in the directional pin connection group have front-back sequence requirements on the logic addresses of the test pins to be connected; the adjacency graph constructed by the pin allocation mode formed by the directional pin connection groups is a directional adjacency graph; when the adjacency graph is a directed adjacency graph, the calculation method of S k is as follows: traversing all nodes in the kth connected graph, and then: 1) The outgoing degree and the incoming degree of each node are equal, and then S k =1; 2) If the difference between the access degrees is positive, the sum of the differences between the access degrees is X, and the sum of the differences between the access degrees of all other nodes is-X, X >1, then S k =X.
In the invention, when the minimum stroke number required by calculating that a certain adjacency graph is completely drawn is 1, the pin allocation mode corresponding to the adjacency graph is directly used as the optimal pin allocation mode when the device to be tested is tested at two ends, namely the pin allocation mode which occupies the least test pins.
In the present invention, each test pin can only connect to one pin on the device under test.
The invention also relates to a pin resource distribution system based on the two-end test, which comprises an integral control module, an adjacency graph establishing module, a calculation resource number module and an update resource number module,
The method comprises the steps that the overall control module obtains all pin connection groups to be distributed on a device to be tested, each pin connection group to be distributed comprises two pin sets, and when the device to be tested is distributed, the overall control module determines that one pin is used for being connected to a test pin from each of the two pin sets, and after the distribution of all pin connection groups is completed, a pin distribution mode of the device to be tested is obtained; obtaining a plurality of pin allocation modes according to different pin allocations in the pin connection group;
The adjacency graph establishing module establishes an adjacency graph according to the pin allocation mode; wherein, the nodes in the adjacent graph correspond to pins of the device to be tested, and the edges in the adjacent graph represent pin relations;
The resource number calculating module calculates the resource number of the pin allocation mode according to the adjacency graph corresponding to the pin allocation mode; the resource number refers to the number of test pins required to be occupied by the pin allocation mode;
the updated resource number module compares the resource number of the pin allocation mode calculated by the calculated resource number module, and determines the pin allocation mode with the minimum resource number as the optimal pin allocation mode when the device to be tested performs two-end test.
In the present invention, the calculating the resource number of each pin allocation mode by the resource number calculating module using the adjacency graph means that: calculating the minimum stroke number required by the adjacent graph to be completely drawn, and adding the minimum stroke number and the number of the pin connection groups to obtain a value which is the resource number of the pin allocation mode; wherein, the minimum stroke number S required by the adjacency graph to be completely drawn is as follows: And the K is the number of connected graphs contained in the adjacent graph, and the S k is the minimum stroke number required by the kth connected graph to be completely drawn.
In the invention, the pin connection group is a non-directional pin connection group, and two pins distributed in the non-directional pin connection group have no front-back sequence requirement on the logic address of a test pin to be connected; an adjacency graph constructed by a pin allocation mode formed by allocating undirected pin connection groups is an undirected adjacency graph; when the adjacency graph is an undirected adjacency graph, the calculation method of S k is as follows: traversing all nodes in the kth connected graph to obtain the number N of the odd degree nodes in the connected graph, and then: 1) N is 0 or 2, then S k =1; 2) N >2 (N is necessarily even), then S k =n/2.
In the invention, the pin connection group is a directional pin connection group, and two pins in the directional pin connection group have front-back sequence requirements on the logic addresses of the test pins to be connected; the adjacency graph constructed by the pin allocation mode formed by the directional pin connection groups is a directional adjacency graph; when the adjacency graph is a directed adjacency graph, the calculation method of S k is as follows: traversing all nodes in the kth connected graph, and then: 1) The outgoing degree and the incoming degree of each node are equal, and then S k =1; 2) If the difference between the access degrees is positive, the sum of the differences between the access degrees is X, and the sum of the differences between the access degrees of all other nodes is-X, X >1, then S k =X.
In the invention, when the calculation resource number module calculates that the minimum stroke number required by a certain adjacency graph is completely drawn to be 1, the pin allocation mode corresponding to the adjacency graph is directly used as the optimal pin allocation mode when the device to be tested is subjected to two-end test, namely the pin allocation mode which occupies the least test pins.
Compared with the prior art, the invention has the beneficial effects that:
1. The pin resource allocation method based on the two-end test adopts the related theory of graph theory, can reduce the complexity of the problem, almost only needs to traverse nodes in the adjacency graph after the adjacency graph is established, does not need complex deep search and breadth search, and generally circulates and traverses, thus reducing the space complexity, reducing the consumption of the memory of a computer, simultaneously, the recorded and utilized variables are very few, not needing excessive processing, reducing the time complexity and accelerating the running of a program.
2. The pin resource distribution system based on the two-end test can accurately calculate the optimal pin distribution mode when the two-end test is carried out on the device to be tested with multiple pins by combining the related theory of the graph theory, so that the waste of the pin resource tested on testbench is reduced in the automatic test, on the other hand, the space complexity is reduced, the consumption of the memory of a computer is reduced, the time complexity is reduced, and the test time is further reduced.
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In order to more clearly illustrate the technical solutions of specific embodiments of the present invention, the drawings that are needed in the description of the embodiments will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort to a person of ordinary skill in the art.
Fig. 1 is a diagram illustrating circuit test pins of a multi-pin device under test.
FIG. 2 is a schematic diagram of the Gernisburgh seven-bridge problem.
Fig. 3 is a schematic diagram of a pin resource allocation system based on two-terminal testing according to the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully, and it is apparent that the embodiments described are only some, but not all, of the embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The embodiment of the invention relates to a pin resource allocation method and a pin resource allocation system. And more particularly, to a method and system for allocating pin resources based on two-terminal testing. For example, the pin connection set to be allocated includes two pin sets on the device to be tested, and one pin is taken from each of the two pin sets to be connected to two test pins adjacent to the logic address for two-terminal test.
In one embodiment, the theory of relatedness of graph theory is applied to the calculation of pin resource allocation. For example, an adjacency graph is established according to a pin allocation mode, and the stroke number required by the adjacency graph to be completely drawn is calculated, wherein nodes of the adjacency graph correspond to pins of a device to be tested, edges of the adjacency graph represent pin relationships, and two nodes of the edges of the adjacency graph correspond to two pins in a pin connection group. And adding the minimum stroke number of the adjacent graph which is completely drawn with the number of the pin connection groups to obtain a value which is the resource number of the pin allocation mode. The resource number refers to the number of test pins required to occupy by the pin allocation mode.
In some cases, the pin connection set in the pin allocation mode is an undirected pin connection set, and at this time, the adjacency graph correspondingly established is an undirected adjacency graph. The two pins in the undirected pin connection set have no sequential requirements for the logical addresses of the test pins to be connected. For example, define the undirected pin connection set { A; b, when pin a and pin B are connected to the test pins testbench, pin B may be assigned to the test pin numbered (x+1) or (x-1) on testbench, assuming that pin a is assigned test pin number x on testbench. { A; b and { B; the behavior of a is consistent.
In other cases, the pin connection set in the pin assignment method is a directional pin connection set, and at this time, the adjacency graph correspondingly established is a directional adjacency graph. Two pins in the directed pin connection set have a sequential requirement for the logical address of the test pin to be connected. For example, define the directional pin connection set { A; b, when pins a and B are connected to the test pins testbench, pin B can only be assigned to the test pin numbered (x+1) on testbench, assuming that pin a is assigned test pin number x on testbench. { A; b and { B; the behavior of a is inconsistent. Wherein a is assigned to x and B is assigned only to (x+1), which is based on a preset number increasing direction, and the default is set as the number increasing direction in the present invention. If the preset number decreases in direction, A is assigned to x and B is assigned to (x-1) only.
Fig. 2 shows a schematic diagram of the genisburg seven-bridge problem. The theory of drawings originated in the 18 th century and the first paper "the genisburgh seven-bridge problem" on the theory of drawings was published by the Swiss math Euler (Euler) in 1736. In the city of the genisburg at the time, there is a prasugrel river across the whole city, two islands in the river are connected with two banks by seven bridges. The resident there is then enthusiastic about a difficult problem, how the tourist will not repeatedly walk through the seven bridges and finally return to the departure point. To solve this problem, euler replaces land with A, B, C, D letters, and as 4 vertices, the bridge joining two lands is represented by corresponding line segments, so the Goniosburgh seven-bridge problem becomes that in FIG. 2, whether there is a loop through each edge once and only once, through all vertices. Euler indicates in the paper that such loops are not present.
Referring to fig. 3, a schematic diagram of an overall principle framework of a two-terminal test-based pin resource allocation system for dynamically programming pin resource allocation of a multi-pin device under test based on two-terminal tests is shown.
The pin resource distribution system based on the two-end test comprises: the system comprises an overall control module, an adjacency graph building module, a calculation resource number module and an update resource number module.
The overall control module can acquire all pin connection groups to be distributed on the device to be tested. The pin connection group to be allocated comprises two pin sets on the device to be tested, one pin is taken from each of the two pin sets for two-end test, for example, the two selected pins are connected with two adjacent test pins of the logic address.
The overall control module allocates all acquired pin connection groups, for example, the pin connection groups to be allocated comprise a set A { A 1,……,Ai+1,Ai } and a set B { B 1,……,Bj-1,Bj }, wherein A 1,……,Ai+1,Ai and B 1,……,Bj-1,Bj are pins on a device to be tested, i and j are natural numbers, and one pin is taken from the set A and the set B for two-end testing, so that the pin connection groups are allocated; after the distribution of all the pin connection groups is completed, the pin distribution mode of the device to be tested is obtained. And obtaining a plurality of pin allocation modes according to different pin allocations in the pin connection group.
In one embodiment, the definition of a DUT is as follows: { (A1, A2); (B1, B2) }, { C; and D, the pin connection group is an undirected pin connection group. The 4 pin assignment manners in table 1, namely, combination 1, combination 2, combination 3 and combination 4, can be obtained through the arrangement control module.
TABLE 1 there may be multiple Pin combinations in PinConnection
As can be seen from table 1, { (A1, A2); when (B1, B2) } defines the pin allocation rule, the allocation of PinConnection is completed by selecting one of (A1, A2) and any one of (B1, B2) to perform adjacent allocation, so that a plurality of allocation combinations are generated.
The adjacency graph establishing module can establish an adjacency graph according to a pin allocation mode. The nodes in the adjacent graph correspond to pins of the device to be tested, and the edges in the adjacent graph represent pin relationships, i.e. two nodes on a certain edge correspond to two pins in a pin connection group. By the method, an adjacency graph can be established for each pin allocation mode.
Since there are two types of pin connection sets, different adjacencies need to be established for different types of pin assignments. If the pin connection group is a non-directional pin connection group, a non-directional edge is established, and then a non-directional diagram is established in the pin allocation mode. If the pin connection group is a directed pin connection group, a directed edge is established, and then a directed graph is established by the pin allocation mode.
The calculation resource module can calculate the resource number of the pin allocation mode. In one embodiment, the minimum stroke number required by the adjacency graph corresponding to the pin allocation mode is calculated and completely drawn, and then the minimum stroke number is added with the number of the pin connection groups, so that the obtained value is the resource number of the pin allocation mode, namely the number of the test pins required by the pin allocation mode.
In one embodiment, when the computing resource number module computes the minimum number of strokes S required for the adjacency graph to be completely drawn, the computing formula is: Where k refers to the number of connected graphs included in the adjacent graph, and S k is the minimum number of strokes required for the kth connected graph to be completely drawn. In one embodiment, the calculation mode of S k is specifically: when the adjacency graph is an undirected adjacency graph, traversing all nodes in the kth connected graph to obtain the number N of the odd degree nodes in the connected graph, and then: (1) N is 0 or 2, then S k =1; (2) N >2 (N is necessarily an even number), then S k =n/2; when the adjacency graph is a directed adjacency graph, traversing all nodes in the kth connected graph, and then: (1) The outgoing degree and the incoming degree of each node are equal, and then S k =1; (2) If the difference between the access degrees is positive, the sum of the differences between the access degrees is X, and the sum of the differences between the access degrees of all other nodes is-X, X >1, then S k =X.
In one embodiment, the calculate resource number module uses a stroke problem of graph theory to calculate the principle of pin allocation mode resource number. And regarding each two adjacent test pins testbench as a whole, wherein the middle of each test pin is provided with a slot, and if only the slot is occupied, considering that two adjacent pins corresponding to the slot are also occupied at the moment. While each PinConnection is actually required to occupy two adjacent test pins, it can be found that in practice the entire algorithm is doing PinConnection allocation on slots. Pins to be allocated in PinConnection can then be regarded as nodes in graph theory, and adjacent relationships are edges, according to the abstraction. As long as a corresponding directed graph or undirected graph is established according to the pins and the adjacent relation between the pins, because the address numbers are one-dimensional, namely the relation between the address x of a certain pin and the address y of an adjacent pin is either y=x+1 or x=y+1, in one continuous allocation, at most two valid edges of a certain node allocated to the continuous address at the time are allocated, so that the problem of one stroke can be just converted, and then the required test pin number, namely the resource number, can be obtained according to the related knowledge of graph theory.
For example, if two PinConnection have a common Pin in Pin assignment, the common Pin may be assigned as the middle testbench Pin, as shown in the following table, with the result { A; b, { B }; allocation scheme of C.
TABLE 2 combination case when two PinConnection share one pin
| Testbench pin address | Combination of two or more kinds of materials |
| Pin x | A |
| Pin x+1 | B |
| Pin x+2 | C |
From Table 2, an undirected graph of A-B-C can be generated. The undirected graph can be drawn by one stroke, the number of slots occupied by the undirected graph is 2, and the number of pins required is (slot number+1).
For example, if two PinConnection of a pin assignment do not share a pin, the assignment results are shown in table 3 below, and PinConnection of the combination is { a; b, { C; d }.
TABLE 3 Combined case when two PinConnection shared-nothing pins
| Testbench pin address | Combination of two or more kinds of materials |
| Pin x | A |
| Pin x+1 | B |
| Pin x+2 | C |
| Pin x+3 | D |
From Table 3, only two undirected graphs of A-B, C-D can be generated, two strokes are required, the number of slots occupied by the undirected graphs is 2, and the number of pins required by the undirected graphs is (slot number+2).
Similarly, when the created graph cannot be drawn by one stroke, a slot is empty between each drawing, such as a slot between pins x+1 and x+2 in table 3. At this time, the relationship between the slot number and the pin number is: pin count=slot count+1.
Thus, the relationship between pin number, pinConnection number, and stroke number S can be obtained: pin count = number PinConnection + S.
The resource number updating module can compare the resource number of the pin allocation mode calculated by the current calculation resource number module with the optimal resource number (the initial value of the optimal resource number is not less than the number of the test pins occupied by any pin allocation mode, such as the number of the test pins on the initial value taking test bench), and update the value with smaller value into the new optimal resource number. And finally, the pin allocation mode corresponding to the optimal resource number is the optimal pin allocation mode when the device to be tested performs two-end test, namely the pin allocation mode which occupies the test pins at least.
In one embodiment, when the minimum stroke number required by calculating that any adjacent diagram is completely drawn is 1, no subsequent processing is performed, and the pin allocation mode corresponding to the adjacent diagram is directly the optimal pin allocation mode when the device to be tested performs two-end test.
The pin resource allocation method and system based on the two-end test provided by the invention are described in detail, and specific examples are applied to illustrate the structure and working principle of the invention, and the description of the above embodiments is only used for helping to understand the method and core idea of the invention. It should be noted that it will be apparent to those skilled in the art that various improvements and modifications can be made to the present invention without departing from the principles of the invention, and such improvements and modifications fall within the scope of the appended claims.
Claims (10)
1. A pin resource allocation method based on two-end test comprises the following steps:
acquiring all pin connection groups to be allocated on a device to be tested, wherein each pin connection group to be allocated comprises two pin sets, and determining one pin from the two pin sets for connecting to a test pin during allocation, and obtaining a pin allocation mode of the device to be tested after the allocation of all pin connection groups is completed; obtaining a plurality of pin allocation modes according to different pin allocations in the pin connection group;
Establishing an adjacency graph according to the pin allocation mode, wherein nodes in the adjacency graph correspond to pins of a device to be tested, and edges in the adjacency graph represent pin relations; and calculating the resource number of each pin allocation mode by using the adjacency graph: calculating the minimum stroke number required by the adjacent graph to be completely drawn, and adding the minimum stroke number and the number of the pin connection groups to obtain a value which is the resource number of the pin allocation mode; the resource number refers to the number of test pins required to be occupied by the pin allocation mode;
the pin allocation mode with the minimum resource number is the optimal pin allocation mode when the device to be tested performs two-end test.
2. The method for allocating pin resources based on two-terminal testing according to claim 1, wherein the minimum number of strokes S required for the adjacency graph to be completely drawn is: And the K is the number of connected graphs contained in the adjacent graph, and the S k is the minimum stroke number required by the kth connected graph to be completely drawn.
3. The two-terminal test-based pin resource allocation method according to claim 2, wherein the pin connection group is a non-directional pin connection group, and two pins allocated in the non-directional pin connection group have no sequential requirements on logical addresses of test pins to be connected; an adjacency graph constructed by a pin allocation mode formed by allocating undirected pin connection groups is an undirected adjacency graph;
When the adjacency graph is an undirected adjacency graph, the calculation method of S k is as follows: traversing all nodes in the kth connected graph to obtain the number N of the odd degree nodes in the connected graph, and then: 1) N is 0 or 2, then S k =1; 2) N >2 (N is necessarily even), then S k =n/2.
4. The method for allocating pin resources based on two-terminal testing according to claim 2, wherein the pin connection group is a directional pin connection group, and two pins in the directional pin connection group have a front-back order requirement for logic addresses of test pins to be connected; the adjacency graph constructed by the pin allocation mode formed by the directional pin connection groups is a directional adjacency graph;
When the adjacency graph is a directed adjacency graph, the calculation method of S k is as follows: traversing all nodes in the kth connected graph, and then: 1) The outgoing degree and the incoming degree of each node are equal, and then S k =1; 2) If the difference between the access degrees is positive, the sum of the differences between the access degrees is X, and the sum of the differences between the access degrees of all other nodes is-X, X >1, then S k =X.
5. The method for allocating pin resources based on two-terminal test according to claim 2, wherein when the minimum stroke number required by calculating a certain adjacency graph to be completely drawn is 1, the pin allocation mode corresponding to the adjacency graph is directly used as the optimal pin allocation mode when two-terminal test is performed on the device to be tested, i.e. the pin allocation mode which occupies the least test pins.
6. A pin resource distribution system based on two-end test comprises an integral control module, an adjacency graph building module, a calculation resource number module and an update resource number module;
The method comprises the steps that the overall control module obtains all pin connection groups to be distributed on a device to be tested, each pin connection group to be distributed comprises two pin sets, and when the device to be tested is distributed, the overall control module determines that one pin is used for being connected to a test pin from each of the two pin sets, and after the distribution of all pin connection groups is completed, a pin distribution mode of the device to be tested is obtained; obtaining a plurality of pin allocation modes according to different pin allocations in the pin connection group;
The adjacency graph establishing module establishes an adjacency graph according to the pin allocation mode; wherein, the nodes in the adjacent graph correspond to pins of the device to be tested, and the edges in the adjacent graph represent pin relations;
The resource number calculating module calculates the resource number of the pin allocation mode according to the adjacency graph corresponding to the pin allocation mode: calculating the minimum stroke number required by the adjacent graph to be completely drawn, and adding the minimum stroke number and the number of the pin connection groups to obtain a value which is the resource number of the pin allocation mode; the resource number refers to the number of test pins required to be occupied by the pin allocation mode;
the updated resource number module compares the resource number of the pin allocation mode calculated by the calculated resource number module, and determines the pin allocation mode with the minimum resource number as the optimal pin allocation mode when the device to be tested performs two-end test.
7. The two-terminal test based pin resource allocation system according to claim 6, wherein the minimum number of strokes S required for the adjacency graph to be completely drawn is: And the K is the number of connected graphs contained in the adjacent graph, and the S k is the minimum stroke number required by the kth connected graph to be completely drawn.
8. The two-terminal test-based pin resource allocation system according to claim 7, wherein the pin connection group is a non-directional pin connection group, and two pins allocated in the non-directional pin connection group have no sequential requirements on the logical addresses of the test pins to be connected; an adjacency graph constructed by a pin allocation mode formed by allocating undirected pin connection groups is an undirected adjacency graph;
When the adjacency graph is an undirected adjacency graph, the calculation method of S k is as follows: traversing all nodes in the kth connected graph to obtain the number N of the odd degree nodes in the connected graph, and then: 1) N is 0 or 2, then S k =1; 2) N >2 (N is necessarily even), then S k =n/2.
9. The two-terminal test-based pin resource allocation system according to claim 7, wherein the pin connection group is a directional pin connection group, and two pins in the directional pin connection group have a sequential requirement on the logical addresses of the test pins to be connected; the adjacency graph constructed by the pin allocation mode formed by the directional pin connection groups is a directional adjacency graph;
When the adjacency graph is a directed adjacency graph, the calculation method of S k is as follows: traversing all nodes in the kth connected graph, and then: 1) The outgoing degree and the incoming degree of each node are equal, and then S k =1; 2) If the difference between the access degrees is positive, the sum of the differences between the access degrees is X, and the sum of the differences between the access degrees of all other nodes is-X, X >1, then S k =X.
10. The system of claim 7, wherein when the calculation resource number module calculates that the minimum stroke number required by a certain adjacency graph to be completely drawn is 1, the pin allocation mode corresponding to the adjacency graph is directly used as the optimal pin allocation mode when the device to be tested performs the two-end test, i.e. the pin allocation mode which occupies the least test pins.
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