CN112847124A - Method and system for automatically correcting wafer flatness in double-side polishing process - Google Patents
Method and system for automatically correcting wafer flatness in double-side polishing process Download PDFInfo
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- CN112847124A CN112847124A CN202011595492.5A CN202011595492A CN112847124A CN 112847124 A CN112847124 A CN 112847124A CN 202011595492 A CN202011595492 A CN 202011595492A CN 112847124 A CN112847124 A CN 112847124A
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
- B24B37/07—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool
- B24B37/08—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/005—Control means for lapping machines or devices
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/005—Control means for lapping machines or devices
- B24B37/015—Temperature control
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B7/00—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
- B24B7/20—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground
- B24B7/22—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
- B24B7/228—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain for grinding thin, brittle parts, e.g. semiconductors, wafers
Abstract
The invention discloses a method and a system for automatically correcting the flatness of a wafer in a double-sided polishing process, wherein the method comprises the following steps: acquiring the temperature of the outer side of an upper polishing disc and the temperature of the inner side of the upper polishing disc; comparing the temperature of the outside of the upper polishing pad to the temperature of the inside of the upper polishing pad; and adjusting the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk based on the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk. According to the method for automatically correcting the flatness of the wafer in the double-sided polishing process, the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is automatically adjusted based on the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk, so that the flatness of the wafer in the double-sided polishing process is automatically adjusted, the flatness of the wafer is controlled, and the yield of products is improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a method and a system for automatically correcting wafer flatness in a double-side polishing process.
Background
With the continuous development of Integrated Circuit (IC) manufacturing technology, the feature size of a chip is smaller, the number of interconnection layers is larger, and the diameter of a wafer is also larger. To achieve multi-layer wiring, the wafer surface must have extremely high flatness, smoothness and cleanliness, and chemical mechanical polishing is currently the most effective wafer planarization technique.
The surface polishing of silicon wafers mostly adopts Double-sided polishing (DSP), usually adopts alkaline silicon dioxide polishing solution, and the chemical reaction is Si + H2O+2OH-→SiO3 2-+2H2It is prepared through chemical corrosion reaction of alkali and silicon to produce soluble silicate, and subsequent treatment of SiO with small size, high flexibility, great specific surface area and negative charge2The adsorption effect of the colloidal particles and the mechanical friction effect between the colloidal particles and the polishing pad (pad) and the wafer remove reaction products in time, thereby achieving the effects of removing a damaged layer on the surface of the chip and meeting the requirement of the product on the polishing flatness.
However, existing DSP processes rely primarily on manual real-time adjustments. Therefore, there is a need for a new method and system for automatically correcting wafer flatness during double-side polishing to solve the above problems.
Disclosure of Invention
In this summary, concepts in a simplified form are introduced that are further described in the detailed description. This summary of the invention is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
The invention provides a method for automatically correcting the flatness of a wafer in a double-sided polishing process, which comprises the following steps:
acquiring the temperature of the outer side of an upper polishing disc and the temperature of the inner side of the upper polishing disc;
comparing the temperature of the outside of the upper polishing pad to the temperature of the inside of the upper polishing pad;
and adjusting the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk based on the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk.
Further, when the temperature of the outer side of the upper polishing disk is higher than the temperature of the inner side of the upper polishing disk, the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is reduced.
Further, when the temperature of the outer side of the upper polishing disk is lower than the temperature of the inner side of the upper polishing disk, the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is increased.
Further, when the temperature of the outer side of the upper polishing disk is equal to the temperature of the inner side of the upper polishing disk, the height difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk is maintained.
Further, the relationship between the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk and the adjustment amount of the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is as follows:
ΔGAP=K×ΔT
wherein the content of the first and second substances,
Δ GAP represents the amount of adjustment of the height difference between the inside of the upper polishing pad and the outside of the upper polishing pad;
Δ T represents the temperature difference between the outside of the upper polishing pad and the inside of the upper polishing pad;
k represents a coefficient and is a constant.
The invention also provides a system for automatically correcting the flatness of a wafer in a double-sided polishing process, which comprises the following steps:
the polishing device comprises a lower polishing disk positioned below the wafer and an upper polishing disk positioned above the wafer, and is used for performing double-sided polishing on the wafer;
the sensors at least comprise sensors which are respectively arranged on the outer side of the upper polishing disk and the inner side of the upper polishing disk and are used for acquiring the temperature of the outer side of the upper polishing disk and the temperature of the inner side of the upper polishing disk;
and the processor compares the temperature of the outer side of the upper polishing disk with the temperature of the inner side of the upper polishing disk and adjusts the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk based on the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk.
Further, the polishing device further comprises polishing pads, and the polishing pads are respectively arranged between the lower polishing disk and the wafer and between the upper polishing disk and the wafer.
Further, when the temperature of the outer side of the upper polishing disk is higher than the temperature of the inner side of the upper polishing disk, the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is reduced.
Further, when the temperature of the outer side of the upper polishing disk is lower than the temperature of the inner side of the upper polishing disk, the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is increased.
Further, when the temperature of the outer side of the upper polishing disk is equal to the temperature of the inner side of the upper polishing disk, the height difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk is maintained.
According to the method for automatically correcting the flatness of the wafer in the double-sided polishing process, the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is automatically adjusted based on the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk, so that the flatness of the wafer in the double-sided polishing process is automatically adjusted, the flatness of the wafer is controlled, and the yield of products is improved.
Drawings
The following drawings of the invention are included to provide a further understanding of the invention. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
In the drawings:
figure 1A is a bottom view of an upper polishing pad of a system for automatically correcting wafer planarity during double-side polishing in accordance with one embodiment of the present invention;
FIG. 1B is a front view of a system for automatically correcting wafer planarity during double-side polishing in accordance with one embodiment of the present invention;
FIG. 2 is a flow chart of a method for automatically correcting wafer planarity during double-side polishing in accordance with one embodiment of the present invention;
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the invention.
It is to be understood that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.
It will be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it can be directly on, adjacent to, connected or coupled to the other elements or layers or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
Spatial relational terms such as "under," "below," "under," "above," "over," and the like may be used herein for convenience in describing the relationship of one element or feature to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "under" can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
In order to provide a thorough understanding of the present invention, detailed steps and detailed structures will be set forth in the following description in order to explain the present invention. The following detailed description of the preferred embodiments of the invention, however, the invention is capable of other embodiments in addition to those detailed.
As shown in fig. 1A and 1B, a polishing apparatus for performing double-side polishing on a wafer includes at least a lower polishing pad 101 located below the wafer and an upper polishing pad 102 located above the wafer. Further, the surface of the lower polishing pad 101 (i.e., the contact surface of the lower polishing pad with the wafer) and the surface of the upper polishing pad (i.e., the contact surface of the upper polishing pad with the wafer) are provided with a polishing pad 103. Further, the polishing device also comprises an abrasive liquid supply system.
Illustratively, the lower polishing disk 101 and the upper polishing disk 102 provide a certain pressure and friction to a wafer (not shown), so as to achieve mechanical action with the wafer to remove damage and dirt on the surface of the wafer, and also achieve the purpose of flatness polishing; meanwhile, a slurry supply system (not shown) supplies a slurry containing an alkaline substance such as KOH, which chemically corrodes the wafer surface when contacting the wafer surface, so as to remove the damage and contamination on the wafer surface by chemical action and achieve the flatness requirement of the wafer surface.
In an embodiment, the lower polishing pad 101 is fixedly disposed, for example, the lower polishing pad 101 is fixedly disposed in a horizontal direction, and the distance between the upper polishing pad 102 and the lower polishing pad 101, and the inclination of the upper polishing pad 102 can be adjusted by adjusting the height of the central region of the upper polishing pad 102.
As shown in FIG. 1B, the inner side of the upper polishing pad 102 is spaced apart from the lower polishing pad 101 by a distance HinThe distance between the outer side of the upper polishing disk 102 and the lower polishing disk 101 is HoutThe height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is GAP ═ Hin-Hout. The GAP value is an important adjustment parameter in the double-side polishing process because the change in the GAP value changes the frictional force of the polishing pad 103 against the wafer, thereby adjusting the polishing flatness.
Illustratively, for a perfectly flat ideal wafer 106, the adjustment to GAP has the following effect on wafer flatness:
when GAP > 0, i.e. Hin-HoutIf the thickness is more than 0, the center of the wafer is abraded more, so that the center is sunken, and the flatness is poor;
when GAP is 0, i.e. Hin-HoutThe abrasion of the whole surface of the wafer is uniform, and the flatness of the polished wafer is good;
when GAP < 0, i.e. Hin-HoutLess than 0, the edge of the wafer is abraded more, the middle of the wafer is raised after polishing, and the flatness is poor.
Therefore, for a wafer with high flatness, a better flatness of the wafer can be realized by keeping GAP equal to 0, however, in the production practice, due to the influence of the shape change of the wafer itself, GAP needs to be changed in real time to adjust the frictional force of the polishing pad 103 on the wafer, so as to realize a better flatness of the wafer.
Further, the frictional force between the polishing pad 103 and the wafer can be characterized by temperature: when the friction force of a region is larger, the temperature of the region is increased.
Illustratively, mounted on at least the outside of the upper polishing pad and the inside of the upper polishing pad are sensors, as shown in FIGS. 1A and 1B, mounted on the outside of the upper polishing pad 102 is a first sensor 104 for measuring the temperature T at the outside of the upper polishing padoutMounted inside the upper polishing pad 102 is a second sensor 105 for measuring the temperature T inside the upper polishing padinThe temperature difference delta T between the outer side of the upper polishing disk and the inner side of the upper polishing disk is Tout-Tin。
Illustratively, the relationship between the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk and the adjustment amount of the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is as follows:
ΔGAP=K×ΔT
wherein the content of the first and second substances,
Δ GAP represents the amount of adjustment of the height difference between the inside of the upper polishing pad and the outside of the upper polishing pad;
Δ T represents the temperature difference between the outside of the upper polishing pad and the inside of the upper polishing pad;
k represents a coefficient and is a constant.
As an example. K is related to the friction system of the polishing pad 103 and the GAP value characteristic of the machine. The K value remains constant for a particular polishing apparatus.
In one embodiment, when GAP1At 56 μm,. DELTA.T1=1.56℃:
ΔGAP1=GAP1-GAPTarget=K×ΔT1 (1)
When GAP is used2At 53 μm,. DELTA.T2=0.06℃:
ΔGAP2=GAP2-GAPTarget=K×ΔT2 (2)
Combining formula (1) with formula (2), we can obtain:
GAP2-GAP1=K×(ΔT2-ΔT1) (3)
thus, K ═ 2.
According to the relationship between the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk and the adjustment quantity of the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk, the processor automatically adjusts the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk based on the temperature difference:
when the temperature of the outer side of the upper polishing disk is higher than the temperature of the inner side of the upper polishing disk (i.e., Δ T > 0), the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is reduced (i.e., Δ GAP < 0). In the embodiment shown in fig. 1A and 1B, the cylinder pressure of the upper polishing disk 102 increases, the edge of the upper polishing disk 102 rises, GAP decreases, the temperature outside the upper polishing disk decreases, and Δ T approaches 0, so that uniform friction polishing is achieved.
When the temperature of the outer side of the upper polishing disk is lower than the temperature of the inner side of the upper polishing disk (i.e., Δ T < 0), the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is increased (i.e., Δ GAP > 0). In the embodiment shown in fig. 1A and 1B, the cylinder pressure of the upper polishing disk 102 is decreased, the edge of the upper polishing disk 102 is pressed downward, GAP is increased, the temperature outside the upper polishing disk is increased, and Δ T approaches 0, so that uniform friction polishing is achieved.
Maintaining a height difference between the outside of the upper polishing pad and the inside of the upper polishing pad (i.e., Δ GAP ═ 0) when the temperature of the outside of the upper polishing pad is equal to the temperature of the inside of the upper polishing pad (i.e., Δ T ═ 0).
The present invention also provides a method for automatically correcting wafer flatness during double-side polishing, as shown in fig. 2, comprising the steps of:
s201: acquiring the temperature of the outer side of an upper polishing disc and the temperature of the inner side of the upper polishing disc;
s202: comparing the temperature of the outside of the upper polishing pad to the temperature of the inside of the upper polishing pad;
s203: and adjusting the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk based on the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk.
First, step S201 is performed: and acquiring the temperature of the outer side of the upper polishing disk and the temperature of the inner side of the upper polishing disk.
Referring to FIGS. 1A and 1B, a temperature T outside an upper polishing pad 102 is measured using a first sensor 104 mounted on the outside of the upper polishing padoutThe temperature T inside the upper polishing pad is measured by a second sensor 105 mounted inside the upper polishing pad 102in。
Then, step S202 is performed: and comparing the temperature of the outer side of the upper polishing disk with the temperature of the inner side of the upper polishing disk.
Illustratively, the temperature T outside the upper polishing pad is compared using a processoroutAnd the temperature T of the inner side of the upper polishing diskinOr, calculating the temperature difference delta T between the outer side of the upper polishing disk and the inner side of the upper polishing diskout-Tin。
Next, step S203 is executed: and adjusting the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk based on the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk.
Illustratively, the relationship between the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk and the adjustment amount of the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is as follows:
ΔGAP=K×ΔT
wherein the content of the first and second substances,
Δ GAP represents the amount of adjustment of the height difference between the inside of the upper polishing pad and the outside of the upper polishing pad;
Δ T represents the temperature difference between the outside of the upper polishing pad and the inside of the upper polishing pad;
k represents a coefficient and is a constant.
Illustratively, the processor automatically adjusts a height difference between an inside of the upper polishing pad and an outside of the upper polishing pad based on the temperature difference:
when the temperature of the outer side of the upper polishing disk is higher than the temperature of the inner side of the upper polishing disk (i.e., Δ T > 0), the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is reduced (i.e., Δ GAP < 0). In the embodiment shown in fig. 1A and 1B, the cylinder pressure of the upper polishing disk 102 increases, the edge of the upper polishing disk 102 rises, GAP decreases, the temperature outside the upper polishing disk decreases, and Δ T approaches 0, so that uniform friction polishing is achieved.
When the temperature of the outer side of the upper polishing disk is lower than the temperature of the inner side of the upper polishing disk (i.e., Δ T < 0), the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is increased (i.e., Δ GAP > 0). In the embodiment shown in fig. 1A and 1B, the cylinder pressure of the upper polishing disk 102 is decreased, the edge of the upper polishing disk 102 is pressed downward, GAP is increased, the temperature outside the upper polishing disk is increased, and Δ T approaches 0, so that uniform friction polishing is achieved.
Maintaining a height difference between the outside of the upper polishing pad and the inside of the upper polishing pad (i.e., Δ GAP ═ 0) when the temperature of the outside of the upper polishing pad is equal to the temperature of the inside of the upper polishing pad (i.e., Δ T ═ 0).
According to the method for automatically correcting the flatness of the wafer in the double-sided polishing process, the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk is automatically adjusted based on the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk, so that the flatness of the wafer in the double-sided polishing process is automatically adjusted, the flatness of the wafer is controlled, and the yield of products is improved.
The present invention has been illustrated by the above embodiments, but it should be understood that the above embodiments are for illustrative and descriptive purposes only and are not intended to limit the invention to the scope of the described embodiments. Furthermore, it will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that many variations and modifications may be made in accordance with the teachings of the present invention, which variations and modifications are within the scope of the present invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (10)
1. A method for automatically correcting wafer flatness during double-side polishing, comprising:
acquiring the temperature of the outer side of an upper polishing disc and the temperature of the inner side of the upper polishing disc;
comparing the temperature of the outside of the upper polishing pad to the temperature of the inside of the upper polishing pad;
and adjusting the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk based on the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk.
2. The method of claim 1, wherein the difference in height between the inside of the upper polishing pad and the outside of the upper polishing pad is reduced when the temperature of the outside of the upper polishing pad is higher than the temperature of the inside of the upper polishing pad.
3. The method of claim 1, wherein the difference in height between the inside of the upper polishing pad and the outside of the upper polishing pad is increased when the temperature of the outside of the upper polishing pad is lower than the temperature of the inside of the upper polishing pad.
4. The method of claim 1, wherein the difference in height between the outside of the upper polishing pad and the inside of the upper polishing pad is maintained when the temperature of the outside of the upper polishing pad is equal to the temperature of the inside of the upper polishing pad.
5. The method of claim 1, wherein the relationship between the difference in temperature between the outside of the upper polishing pad and the inside of the upper polishing pad and the amount of adjustment of the difference in height between the inside of the upper polishing pad and the outside of the upper polishing pad is:
ΔGAP=K×ΔT
wherein the content of the first and second substances,
Δ GAP represents the amount of adjustment of the height difference between the inside of the upper polishing pad and the outside of the upper polishing pad;
Δ T represents the temperature difference between the outside of the upper polishing pad and the inside of the upper polishing pad;
k represents a coefficient and is a constant.
6. A system for automatically correcting wafer planarity during double-side polishing, comprising:
the polishing device comprises a lower polishing disk positioned below the wafer and an upper polishing disk positioned above the wafer, and is used for performing double-sided polishing on the wafer;
the sensors at least comprise sensors which are respectively arranged on the outer side of the upper polishing disk and the inner side of the upper polishing disk and are used for acquiring the temperature of the outer side of the upper polishing disk and the temperature of the inner side of the upper polishing disk;
and the processor compares the temperature of the outer side of the upper polishing disk with the temperature of the inner side of the upper polishing disk and adjusts the height difference between the inner side of the upper polishing disk and the outer side of the upper polishing disk based on the temperature difference between the outer side of the upper polishing disk and the inner side of the upper polishing disk.
7. The system of claim 6, wherein the polishing apparatus further comprises polishing pads disposed between the lower polishing pad and the wafer, and between the upper polishing pad and the wafer, respectively.
8. The system of claim 6, wherein the difference in height between the inside of the upper polishing pad and the outside of the upper polishing pad is reduced when the temperature of the outside of the upper polishing pad is higher than the temperature of the inside of the upper polishing pad.
9. The system of claim 6, wherein the difference in height between the inside of the upper polishing pad and the outside of the upper polishing pad is increased when the temperature of the outside of the upper polishing pad is lower than the temperature of the inside of the upper polishing pad.
10. The system of claim 6, wherein the difference in height between the outside of the upper polishing pad and the inside of the upper polishing pad is maintained when the temperature of the outside of the upper polishing pad is equal to the temperature of the inside of the upper polishing pad.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114083419A (en) * | 2021-11-08 | 2022-02-25 | 浙江晶盛机电股份有限公司 | Polishing disk with adjustable disk shape, polishing device and regulation and control method |
WO2022259813A1 (en) * | 2021-06-11 | 2022-12-15 | 株式会社Sumco | Method for two-sided polishing of workpiece and device for two-sided polishing of workpiece |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1405850A (en) * | 2001-09-07 | 2003-03-26 | 联华电子股份有限公司 | System for controlling instant-compensuted grinded curved surface |
CN101106082A (en) * | 2006-07-13 | 2008-01-16 | 硅电子股份公司 | Method for the simultaneous double-side grinding of a plurality of semiconductor wafers, and semiconductor wafer having outstanding flatness |
JP2008049448A (en) * | 2006-08-25 | 2008-03-06 | Nitta Haas Inc | Polishing device |
US20110223835A1 (en) * | 2010-03-12 | 2011-09-15 | Duescher Wayne O | Three-point spindle-supported floating abrasive platen |
TW201436942A (en) * | 2012-12-18 | 2014-10-01 | Memc Electronic Materials | Double side polisher with platen parallelism control |
JP2017098350A (en) * | 2015-11-20 | 2017-06-01 | 株式会社ディスコ | Wafer manufacturing method |
CN107097145A (en) * | 2016-02-22 | 2017-08-29 | 株式会社荏原制作所 | The apparatus and method being adjusted for the surface temperature to grinding pad |
CN111546228A (en) * | 2020-05-14 | 2020-08-18 | 长江存储科技有限责任公司 | Grinding pad temperature control method and device and grinding equipment |
-
2020
- 2020-12-29 CN CN202011595492.5A patent/CN112847124A/en active Pending
-
2021
- 2021-02-20 TW TW110105941A patent/TW202224852A/en unknown
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1405850A (en) * | 2001-09-07 | 2003-03-26 | 联华电子股份有限公司 | System for controlling instant-compensuted grinded curved surface |
CN101106082A (en) * | 2006-07-13 | 2008-01-16 | 硅电子股份公司 | Method for the simultaneous double-side grinding of a plurality of semiconductor wafers, and semiconductor wafer having outstanding flatness |
JP2008049448A (en) * | 2006-08-25 | 2008-03-06 | Nitta Haas Inc | Polishing device |
US20110223835A1 (en) * | 2010-03-12 | 2011-09-15 | Duescher Wayne O | Three-point spindle-supported floating abrasive platen |
TW201436942A (en) * | 2012-12-18 | 2014-10-01 | Memc Electronic Materials | Double side polisher with platen parallelism control |
JP2017098350A (en) * | 2015-11-20 | 2017-06-01 | 株式会社ディスコ | Wafer manufacturing method |
CN107097145A (en) * | 2016-02-22 | 2017-08-29 | 株式会社荏原制作所 | The apparatus and method being adjusted for the surface temperature to grinding pad |
CN111546228A (en) * | 2020-05-14 | 2020-08-18 | 长江存储科技有限责任公司 | Grinding pad temperature control method and device and grinding equipment |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2022259813A1 (en) * | 2021-06-11 | 2022-12-15 | 株式会社Sumco | Method for two-sided polishing of workpiece and device for two-sided polishing of workpiece |
JP2022189524A (en) * | 2021-06-11 | 2022-12-22 | 株式会社Sumco | Double-side polishing method of workpiece and double-side polishing device of the workpiece |
JP7235071B2 (en) | 2021-06-11 | 2023-03-08 | 株式会社Sumco | Work double-sided polishing method and work double-sided polishing device |
TWI818573B (en) * | 2021-06-11 | 2023-10-11 | 日商Sumco股份有限公司 | Double-sided workpiece polishing method and double-sided workpiece polishing equipment |
CN114083419A (en) * | 2021-11-08 | 2022-02-25 | 浙江晶盛机电股份有限公司 | Polishing disk with adjustable disk shape, polishing device and regulation and control method |
CN114083419B (en) * | 2021-11-08 | 2023-09-05 | 浙江晶盛机电股份有限公司 | Disk-shaped adjustable polishing disk, polishing device and regulating method |
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