CN112838833A - Class F power amplifier and design method based on hairpin microstrip bandpass filter - Google Patents

Class F power amplifier and design method based on hairpin microstrip bandpass filter Download PDF

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CN112838833A
CN112838833A CN202110140935.XA CN202110140935A CN112838833A CN 112838833 A CN112838833 A CN 112838833A CN 202110140935 A CN202110140935 A CN 202110140935A CN 112838833 A CN112838833 A CN 112838833A
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microstrip line
microstrip
harmonic
impedance
hairpin
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CN112838833B (en
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程知群
黄谢镔
秦泽
刘国华
简叶龙
赵众
王维荣
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Shenzhen Wanzhida Information Consulting Co ltd
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Hangzhou University Of Electronic Science And Technology Fuyang Institute Of Electronic Information Co ltd
Hangzhou Dianzi University
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217—Class D power amplifiers; Switching amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

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Abstract

The invention discloses an F-type power amplifier based on a hairpin-type microstrip band-pass filter and a design method thereof. Compared with the prior art, the novel output matching network provided by the invention consists of a harmonic control network and a hairpin type microstrip band-pass filter, and the optimal load impedance of the transistor is converted into the input real impedance required by the filter while the harmonic control network and the drain electrode bias network are combined to inhibit the second harmonic and the third harmonic. Moreover, the microstrip band-pass filter with the hairpin structure has the characteristics of miniaturization, good in-band characteristic and the like. On the premise that the output matching structure becomes more compact, the output power and the drain efficiency of the designed power amplifier in a frequency band are improved.

Description

F-type power amplifier based on hairpin type microstrip band-pass filter and design method
Technical Field
The invention relates to the field of radio frequency circuit design, and provides a class-F power amplifier based on a hairpin type microstrip band-pass filter and a design method.
Background
With the rapid development of the 5G mobile communication technology and the commercial stage, the development of the intelligent mobile terminal and the communication base station is continuously driven. The 5G communication system has the outstanding characteristics of large bandwidth, high frequency, low time delay, high reliability and the like, and needs to be put into larger-scale equipment. The radio frequency module is used as a key component of a transmitter in a communication system and is used for amplifying radio frequency signals of a transmitting channel, and bandwidth, stability, efficiency, linearity and output power are key indexes influencing the performance of the radio frequency module. Considering the problem of power consumption of a 5G communication base station and achieving high data volume communication, increasing the number of frequency bands required to be processed, high efficiency is mostly required. This puts higher demands on the power amplifier.
In a conventional wireless communication transmitter, a filter and a power amplifier are separately designed, resulting in a large size of the entire transmitter. And how to achieve high efficiency and high output power in a high frequency band is a very troublesome problem. The output matching network of the conventional power amplifier is very complex and large in size, and simultaneously, the suppression of out-of-band noise and harmonics is difficult, thereby increasing unnecessary design loss of the power amplifier.
Therefore, in order to overcome the above-mentioned drawbacks of the prior art, research and improvement are needed to provide a design concept of a class F power amplifier with a compact output matching structure.
Disclosure of Invention
The invention provides a class-F power amplifier based on a hairpin type microstrip band-pass filter and a design method thereof, aiming at the defects of the power amplifier in the prior art in harmonic suppression and output matching structure design. The hairpin type microstrip band-pass filter is designed by low-pass filtering and frequency conversion of the band-pass filter and U-shaped folding of the cascade parallel coupling microstrip lines, a fundamental wave matching network is not required to be designed, the structural complexity and the design size are reduced, out-of-band noise and harmonic waves are effectively inhibited, the overall efficiency is improved, and meanwhile, the hairpin type microstrip band-pass filter is used for reducing the processing cost.
In order to overcome the defects of the prior art, the invention adopts the following technical scheme:
a class F power amplifier based on a hairpin type microstrip band-pass filter comprises an input matching network, a grid bias network, a transistor, a harmonic control network, a drain bias network and the hairpin type microstrip band-pass filter,
the input end of the input matching network is connected with a signal source with the internal resistance of 50 ohms, the output end of the input matching network is connected with the grid electrode of the transistor, and the maximum power input is realized by matching the conjugate of the optimal source impedance of the transistor to 50 ohms.
The grid electrode bias network and the drain electrode bias network are respectively connected with the grid electrode and the drain electrode of the transistor and provide stable direct current working voltage for the transistor.
The input end of the harmonic control network is connected with the drain electrode of the transistor, and the output end of the harmonic control network is connected with the hairpin type microstrip band-pass filter.
The input end of the hairpin type microstrip band-pass filter is connected with the harmonic control network, and the output end of the hairpin type microstrip band-pass filter is connected with the 50 ohm load end.
The harmonic control network simplifies a harmonic matching network by adding parallel open-circuit fan-shaped microstrip lines in a drain bias network, and comprises a first microstrip line TL1, a second microstrip line TL2, a third microstrip line TL3, a fourth microstrip line TL4, a fifth microstrip line TL5 and a sixth microstrip line TL6, wherein TL1, TL2 and TL4 are series microstrip lines, and TL3, TL5 and TL6 are parallel microstrip lines; one end of a sixth microstrip line TL6 is connected with one end of a fifth microstrip line TL5, one end of a fifth microstrip line TL5 is connected with one end of a fourth microstrip line TL4, one end of the fourth microstrip line TL4 is connected with one ends of a second microstrip line TL2 and a third microstrip line TL3, and the first microstrip line TL1 is connected with a drain of the transistor and one end of the second microstrip line TL 2; the first microstrip line TL1 is used as a tuning line for compensating the parasitic capacitance of the transistor; the first microstrip line TL1, the second microstrip line TL2, the fourth microstrip line TL4, the fifth microstrip line TL5 and the sixth microstrip line TL6 control second harmonic waves together; the first microstrip line TL1, the second microstrip line TL2 and the third microstrip line TL3 jointly control third harmonic, and second harmonic short circuit and third harmonic open circuit are achieved on the end face of a transistor current source.
The hairpin microstrip band-pass filter has good in-band characteristics and comprises a first series microstrip line TL7, a second series microstrip line TL8, a third series microstrip line TL9, a fourth series microstrip line TL10, a fifth series microstrip line TL11, a first parallel coupling microstrip line CLin1, a second parallel coupling microstrip line CLin2, a third parallel coupling microstrip line CLin3 and a fourth parallel coupling microstrip line CLin 4; the first microstrip line TL7 is connected to a port 1 of the first parallel-coupled microstrip line CLin1, the second series microstrip line TL8 is connected to a port 3 of the first parallel-coupled microstrip line CLin1 and a port 1 of the second parallel-coupled microstrip line CLin2, the third series microstrip line TL9 is connected to a port 3 of the second parallel-coupled microstrip line CLin2 and a port 1 of the third parallel-coupled microstrip line CLin3, the fourth series microstrip line TL10 is connected to a port 3 of the third parallel-coupled microstrip line CLin3 and a port 1 of the fourth parallel-coupled microstrip line CLin4, and the fifth series microstrip line TL11 and a port 3 of the fourth parallel-coupled microstrip line CLin4 are connected to a 50-ohm load terminal.
The invention also discloses a design method of the F-type power amplifier based on the hairpin-type microstrip band-pass filter, which is realized by the following steps:
step S1: carrying out multiple load pulling and source pulling on the GaN HEMT CGH40010F transistor, and obtaining the optimal load impedance and the optimal source impedance of the transistor when the power is added with efficiency and the maximum output power;
step S2: performing conjugate setting according to the optimal source impedance obtained in the step S1, and performing matching operation with the 50 ohm internal resistance of the signal source in a step impedance matching mode to complete the design of an input matching circuit so that the transistor obtains a maximum power input signal;
step S3: a quarter-wavelength microstrip line is adopted to design a grid bias network and a drain bias network so as to ensure that the power amplifier has stable direct-current supply voltage;
step S4: designing a harmonic control network, effectively combining with a drain electrode bias network, and simultaneously enabling the drain electrode voltage and current waveform of the power amplifier to meet F-type conditions and the central frequency point F of a working frequency band0Characteristic impedance Z of microstrip linenFor free parameters, the line length theta of each microstrip line needs to be solvedn(ii) a The lengths of the designed microstrip lines TL6, TL5 and TL3 are respectively
Figure BDA0002928799060000041
Make 2f0Short circuit at point B, 3f0The open circuit is realized at the point c, and the length of the microstrip line TL2 is designed to be
Figure BDA0002928799060000042
Selecting the appropriate Z1And Z4The electrical lengths of the microstrip lines TL1 and TL4 may be determined, eventually to achieve 2f at point E, respectively0And 3f0Short circuit and open circuit;
step S5: designing a hairpin microstrip band-pass filter, wherein the filter can only convert 50 ohm load impedance into real impedance, and fundamental impedance and harmonic impedance can be matched to an optimal region through the harmonic control network of the step S4; in order to determine the parameters of the filter, it is necessary to apply load pulling techniques at the center frequency f0Obtaining the best fundamental wave impedance, and converting the best fundamental wave impedance into real impedance through a harmonic wave control network
Figure BDA0002928799060000053
As a designed input impedance; obtaining a low-pass prototype parameter of the three-order Chebyshev-based low-pass filter by looking up a table according to the three-order Chebyshev-based low-pass filter and the 0.1dB attenuation ripple value; calculating the characteristic impedance Z of odd-even mode of each section of coupling line0oAnd Z0e(ii) a Through Z0oAnd Z0eWith given microstrip line substrate parameter (dielectric relative dielectric constant epsilon)rAnd the dielectric thickness d), solving the width W of the microstrip line and the microstrip line coupling distance S; finally, the lengths are
Figure BDA0002928799060000051
The parallel coupling microstrip line is folded to reduce the length by half
Figure BDA0002928799060000052
To reduce the overall size of the filter;
step S6: and building an overall circuit structure by combining the steps S1, S2, S3, S4 and S5, and performing circuit simulation and optimization by using ADS software to ensure that the optimal performance is realized.
The invention improves the output matching network of the traditional power amplifier, and combines the F-type harmonic control network and the hairpin-type microstrip band-pass filter, wherein the F-type harmonic control network matches the second harmonic impedance and the third harmonic impedance to the optimal region and tunes the input impedance of the filter to real impedance, and further, the hairpin-type microstrip band-pass filter is designed by carrying out U-shaped folding on the cascade parallel coupling microstrip lines, and the fundamental wave matching network is not required to be designed, thereby not only realizing the miniaturization of the output matching network and improving the overall efficiency, but also having good application prospect in 5G commercial frequency band.
Drawings
FIG. 1 is a schematic diagram of a class F power amplifier based on a hairpin microstrip band-pass filter according to the present invention;
FIG. 2 is a schematic diagram of a harmonic control network topology of the present invention;
FIG. 3a is a schematic diagram of a second harmonic short circuit control circuit;
FIG. 3b is a schematic diagram of a third harmonic open circuit control circuit;
FIG. 4 is a schematic diagram of a hairpin microstrip bandpass filter topology of the present invention;
fig. 5a is an equivalent circuit schematic diagram of a single set of coupled microstrip lines;
fig. 5b is a schematic diagram of the odd-even mode impedance analysis of the coupled microstrip line.
FIG. 6 is a schematic diagram of S-parameter simulation results of hairpin microstrip bandpass filter of the present invention
Fig. 7 is a graph showing simulation results of output power, efficiency and gain of a class F power amplifier based on a hairpin microstrip band-pass filter according to the present invention.
Detailed Description
Specific embodiments of the present invention will be further illustrated below with reference to the following examples and drawings:
in a conventional wireless communication transmitter, a filter and a power amplifier are separately designed, resulting in a large size of the entire transmitter. And how to design a compact output matching network in a high frequency band is a very difficult problem. The output matching network of the conventional power amplifier is very complex and large in size, and the suppression of out-of-band noise and second and third harmonics is difficult, which affect each other to match the harmonics to an undesired impedance value, thereby increasing unnecessary design loss.
The harmonic control network and the hairpin microstrip band-pass filter are utilized, the miniaturization of an output matching structure and the good characteristics in the band are guaranteed, meanwhile, short circuit and open circuit are respectively realized on the second harmonic and the third harmonic, the influence on fundamental frequency is reduced, and the efficiency and the output power in the band are improved.
Referring to fig. 1, a schematic diagram of a class F power amplifier based on a hairpin microstrip band-pass filter according to the present invention is shown, including an input matching network, a gate bias network, a transistor, a harmonic control network, a drain bias network, and a hairpin microstrip band-pass filter, wherein,
the input end of the input matching network is connected with a signal source with the internal resistance of 50 ohms, the output end of the input matching network is connected with the grid electrode of the transistor, and maximum power input is achieved by matching the conjugate of the optimal source impedance of the transistor to 50 ohms.
The grid bias network and the drain bias network are respectively connected with the grid and the drain of the transistor to provide stable direct-current working voltage for the transistor, and the bypass capacitors and the quarter-wavelength microstrip line in the two bias networks play a role of radio frequency open circuit to prevent radio frequency signals from leaking into the bias networks.
The input end of the harmonic control network is connected with the drain electrode of the transistor, and the output end of the harmonic control network is connected with the hairpin type microstrip band-pass filter.
The input end of the hairpin type microstrip band-pass filter is connected with the harmonic control network, and the output end of the hairpin type microstrip band-pass filter is connected with the 50 ohm load end.
Referring to fig. 2, a schematic diagram of a topology structure of a harmonic control network is shown, and a harmonic matching network is simplified by adding parallel open-circuit sector microstrip lines in a drain bias network. The microstrip line structure comprises a first microstrip line TL1, a second microstrip line TL2, a third microstrip line TL3, a fourth microstrip line TL4, a fifth microstrip line TL5 and a sixth microstrip line TL6, wherein TL1, TL2 and TL4 are series microstrip lines, and TL3, TL5 and TL6 are parallel microstrip lines; one end of a sixth microstrip line TL6 is connected with one end of a fifth microstrip line TL5, one end of a fifth microstrip line TL5 is connected with one end of a fourth microstrip line TL4 and one end of a hairpin type microstrip band-pass filter, one end of the fourth microstrip line TL4 is connected with one end of a second microstrip line TL2 and one end of a third microstrip line TL3, and the first microstrip line TL1 is connected with the drain of a transistor and one end of the second microstrip line TL 2; the first microstrip line TL1 is used as a tuning line for compensating the parasitic capacitance of the transistor; the first microstrip line TL1, the second microstrip line TL2, the fourth microstrip line TL4, the fifth microstrip line TL5 and the sixth microstrip line TL6 control second harmonic waves together; the first microstrip line TL1, the second microstrip line TL2 and the third microstrip line TL3 jointly control third harmonic, and second harmonic short circuit and third harmonic open circuit are achieved on the end face of a transistor current source.
Further, the calculation of the parameters of the microstrip line of the harmonic control network is explained as follows:
the specific parameter of the microstrip line is electrical lengthDegree thetanAnd a characteristic impedance ZnWherein the characteristic impedance ZnFor free parameters, the parameter sought is the electrical length θn. Meanwhile, in order to separately illustrate the control of the second harmonic wave and the third harmonic wave, the central frequency point f of the working frequency band is divided into0And f'0Electrical length thetanAnd θ'nCharacteristic impedance ZnAnd Z'nAnd so on.
Referring to fig. 3a, in the design of the second harmonic short circuit, the second harmonic short circuit is realized at the point a by connecting an open-circuit fan-shaped microstrip line TL6 in parallel with the drain bias network, the second harmonic short circuit point is transferred from the point a to the point B by a quarter-wavelength microstrip line TL5, and finally the second harmonic short circuit is realized at the current source end face of the transistor by the total length of the quarter-wavelength microstrip lines of the microstrip lines TL1, TL2 and TL 4. The impedance from the point a to the open end of the sixth microstrip line TL6 is
Figure BDA0002928799060000081
The impedance from point B to point A is
Figure BDA0002928799060000082
The impedance from point C to point B is
Figure BDA0002928799060000091
The impedance from point D to point C is
Figure BDA0002928799060000092
The impedance from point E to point D is
Figure BDA0002928799060000093
Referring to fig. 3b, in the design of the third harmonic open circuit, the open circuit point is transferred to the point C' through the second microstrip line TL2 with the length of one twelfth wavelength, and finally, the third harmonic short open circuit is realized on the current source end face of the transistor through the microstrip line TL2 with the length of one twelfth wavelength and the tuning microstrip line TL 1. The impedance from the point C' to the open end of the third microstrip line TL3 is
Figure BDA0002928799060000094
The impedance from point D 'to point C' is
Figure BDA0002928799060000095
The impedance from point E 'to point D' is
Figure BDA0002928799060000096
By making equations (1), (2) and (5) approach 0 (short circuit) and equations (6) and (7) approach ∞ (open circuit), the length of the resulting microstrip line TL6 is set to be
Figure BDA0002928799060000097
Microstrip line TL5 having a length of
Figure BDA0002928799060000098
Microstrip line TL4 having a length of
Figure BDA0002928799060000099
Microstrip line TL3 having a length of
Figure BDA00029287990600000910
By selecting the appropriate Z1And Z4The electrical length of the microstrip lines TL1 and TL4 can be determined. The harmonic control network is combined with the drain electrode bias network, so that the design is reduced while the second harmonic and the third harmonic are effectively inhibitedA space.
Referring to fig. 4, the hairpin microstrip band-pass filter has good in-band characteristics, and includes a first series microstrip line TL7, a second series microstrip line TL8, a third series microstrip line TL9, a fourth series microstrip line TL10, a fifth series microstrip line TL11, a first parallel coupling microstrip line CLin1, a second parallel coupling microstrip line CLin2, a third parallel coupling microstrip line CLin3, and a fourth parallel coupling microstrip line CLin 4; the first microstrip line TL7 is connected to a port 1 of the first parallel-coupled microstrip line CLin1, the second series microstrip line TL8 is connected to a port 3 of the first parallel-coupled microstrip line CLin1 and a port 1 of the second parallel-coupled microstrip line CLin2, the third series microstrip line TL9 is connected to a port 3 of the second parallel-coupled microstrip line CLin2 and a port 1 of the third parallel-coupled microstrip line CLin3, the fourth series microstrip line TL10 is connected to a port 3 of the third parallel-coupled microstrip line CLin3 and a port 1 of the fourth parallel-coupled microstrip line CLin4, and the fifth series microstrip line TL11 and a port 3 of the fourth parallel-coupled microstrip line CLin4 are connected to a 50-ohm load terminal.
Furthermore, the design working principle of the hairpin-type microstrip band-pass filter is further explained:
since the filter can only convert a 50 ohm load impedance into a real impedance, the fundamental impedance and the harmonic impedance can be matched to an optimal region through the harmonic control network. In order to determine the parameters of the filter, it is necessary to apply load pulling techniques at the center frequency f0Obtaining the best fundamental wave impedance, and converting the best fundamental wave impedance into real impedance through a harmonic wave control network
Figure BDA0002928799060000102
As the designed input impedance. Referring to fig. 5a, a parallel coupled microstrip line is equivalent to an admittance-inverted converter and connected to two sides with electrical lengths of theta and characteristic impedance of Z0The combination of the microstrip lines of (1) can obtain the ABCD matrix parameters of the equivalent circuit:
Figure BDA0002928799060000101
referring to fig. 5b, the cascaded parallel coupled microstrip lines are subjected to odd-even mode analysis, which is represented by the following formula:
Figure BDA0002928799060000111
Figure BDA0002928799060000112
Figure BDA0002928799060000113
wherein Z0oAnd Z0eCharacteristic impedance of odd-even mode for single group of parallel coupled microstrip lines, ZinoAnd ZineFor the odd and even mode input impedance of the filter, gnBeing a parameter of a third-order low-pass prototype filter, WcIs the relative bandwidth of the band-pass filter, Z0Is a characteristic impedance of the microstrip line, JnInverting the parameters of the converter for each admittance by Z0oAnd Z0eWith given microstrip line substrate parameter (dielectric relative dielectric constant epsilon)rAnd the dielectric thickness d), solving the width W of the microstrip line and the microstrip line coupling distance S.
After discussing a section of parallel coupling microstrip line, a band-pass filter of cascading a plurality of sections of parallel coupling microstrip lines is considered, and the length of the microstrip line between two admittance-inversed converters is
Figure BDA0002928799060000117
The length of the microstrip line is halved after the microstrip line is U-shaped folded
Figure BDA0002928799060000116
Forming the novel hairpin type microstrip band-pass filter. The odd-even mode input impedance is introduced into the scattering parameter, and the expression of the scattering parameter can be obtained as follows:
Figure BDA0002928799060000114
Figure BDA0002928799060000115
the scattering parameters of the hairpin type microstrip band-pass filter can be calculated and analyzed through the formula, and the filtering performance parameters in the working frequency band can be obtained.
Referring to fig. 6 and 7, shown are graphs of simulation results of gain, output power and efficiency of the F-class power amplifier based on the hairpin microstrip band-pass filter of the present invention, in an operating frequency band of 3.2 to 3.7GHz, the saturated output power is 39.8dBm to 42.1dBm, the gain is 9.8dB to 12.1dB, and the drain efficiency is 60.1% to 68.3%, which are consistent with the design method set forth in the present invention.
The invention relates to a design method of an F-type power amplifier based on a hairpin-type microstrip band-pass filter, which is realized by the following steps:
step S1: carrying out multiple load pulling and source pulling on the GaN HEMT CGH40010F transistor, and obtaining the optimal load impedance and the optimal source impedance of the transistor when the power is added with efficiency and the maximum output power;
step S2: performing conjugate setting according to the optimal source impedance obtained in the step S1, and performing matching operation with the 50 ohm internal resistance of the signal source in a step impedance matching mode to complete the design of an input matching circuit so that the transistor obtains a maximum power input signal;
step S3: a quarter-wavelength microstrip line is adopted to design a grid bias network and a drain bias network so as to ensure that the power amplifier has stable direct-current supply voltage;
step S4: designing a harmonic control network, effectively combining with a drain electrode bias network, and simultaneously enabling fundamental wave, second harmonic and third harmonic impedance of the power amplifier to meet F-type power amplification and central frequency point F of a working frequency band0Characteristic impedance Z of microstrip linenFor free parameters, the line length theta of each microstrip line needs to be solvedn(ii) a The lengths of the designed microstrip lines TL6, TL5 and TL3 are respectively
Figure BDA0002928799060000121
Figure BDA0002928799060000122
Make 2f0Short circuit at point B, 3f0The open circuit is realized at the point C, and the length of the microstrip line TL2 is designed to be
Figure BDA0002928799060000123
And selecting the appropriate Z1And Z4The electrical lengths of the microstrip lines TL1 and TL4 may be determined, eventually to achieve 2f at point E, respectively0And 3f0Short circuit and open circuit.
Step S5: the hairpin microstrip band pass filter is designed to match the fundamental impedance and the harmonic impedance to the optimum region by the harmonic control network of step S4 because the filter can convert only the 50 ohm load impedance into the real impedance. In order to determine the parameters of the filter, it is necessary to apply load pulling techniques at the center frequency f0Obtaining the best fundamental wave impedance, and converting the best fundamental wave impedance into real impedance through a harmonic wave control network
Figure BDA0002928799060000131
As the designed input impedance. Referring to fig. 5a, a parallel coupled microstrip line is equivalent to an admittance-inverted converter and connected to two sides with electrical lengths of theta and characteristic impedance of Z0The combination of the microstrip lines of (1) can obtain the ABCD matrix parameters of the equivalent circuit:
Figure BDA0002928799060000132
referring to fig. 5b, the cascaded parallel coupled microstrip lines are subjected to odd-even mode analysis, which is represented by the following formula:
Figure BDA0002928799060000133
Figure BDA0002928799060000134
Figure BDA0002928799060000135
wherein Z0oAnd Z0eCharacteristic impedance of odd-even mode for single group of parallel coupled microstrip lines, ZinoAnd ZineFor the odd and even mode input impedance of the filter, gnBeing a parameter of a third-order low-pass prototype filter, WcIs the relative bandwidth of the band-pass filter, Z0Is a characteristic impedance of the microstrip line, JnInverting the parameters of the converter for each admittance by Z0oAnd Z0eWith given microstrip line substrate parameter (dielectric relative dielectric constant epsilon)rAnd the dielectric thickness d), solving the width W of the microstrip line and the microstrip line coupling distance S.
After discussing a section of parallel coupling microstrip line, a band-pass filter of cascading a plurality of sections of parallel coupling microstrip lines is considered, and the length of the microstrip line between two admittance-inversed converters is
Figure BDA0002928799060000136
The length of the microstrip line is halved after the microstrip line is U-shaped folded
Figure BDA0002928799060000137
Forming the novel hairpin type microstrip band-pass filter. The odd-even mode input impedance is introduced into the scattering parameter, and the expression of the scattering parameter can be obtained as follows:
Figure BDA0002928799060000141
Figure BDA0002928799060000142
the scattering parameters of the hairpin type microstrip band-pass filter can be calculated and analyzed through the formula, and the filtering performance parameters in the working frequency band can be obtained.
Step S6: and building an overall circuit structure by combining the steps S1, S2, S3, S4 and S5, and performing circuit simulation and optimization by using ADS software to ensure that the optimal performance is realized.
Referring to fig. 6 and 7, shown are graphs of simulation results of gain, output power and efficiency of the F-class power amplifier based on the hairpin microstrip band-pass filter of the present invention, in an operating frequency band of 3.2 to 3.7GHz, the saturated output power is 39.8dBm to 42.1dBm, the gain is 9.8dB to 12.1dB, and the drain efficiency is 60.1% to 68.3%, which are consistent with the design method set forth in the present invention.
The above description of the embodiments is only intended to facilitate the understanding of the method of the invention and its core idea. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (4)

1.一种基于发夹式微带带通滤波器的F类功率放大器，其特征在于，至少包括输入匹配网络、栅极偏置网络、晶体管、漏极偏置网络、谐波控制网络、发夹式微带带通滤波器，其中，1. A class F power amplifier based on a hairpin microstrip bandpass filter, characterized in that it at least comprises an input matching network, a gate bias network, a transistor, a drain bias network, a harmonic control network, a hairpin type microstrip bandpass filter, where, 所述输入匹配网络的输入端连接内阻为50欧姆的信号源，输出端与晶体管栅极相连接，用于将50欧姆阻抗匹配到晶体管的最佳源阻抗的共轭；The input end of the input matching network is connected to a signal source with an internal resistance of 50 ohms, and the output end is connected to the gate of the transistor, for matching the 50 ohm impedance to the conjugate of the best source impedance of the transistor; 所述栅极偏置网络和漏极偏置网络分别用于对晶体管栅极和漏极提供稳定的直流工作电压；The gate bias network and the drain bias network are respectively used to provide a stable DC working voltage to the gate and drain of the transistor; 所述谐波控制网络的输入端与晶体管漏极相连接，输出端与发夹式微带带通滤波器相连接；The input end of the harmonic control network is connected with the drain of the transistor, and the output end is connected with the hairpin microstrip bandpass filter; 所述发夹式微带带通滤波器的输入端与谐波控制网络相连接，输出端与50欧姆负载端相连接；The input end of the hairpin microstrip bandpass filter is connected with the harmonic control network, and the output end is connected with the 50 ohm load end; 所述谐波控制网络通过在漏极偏置网络中添加并联开路扇形微带线来简化谐波匹配网络，包括第一微带线TL1、第二微带线TL2、第三微带线TL3、第四微带线TL4、第五微带线TL5和第六微带线TL6，其中，TL1、TL2和TL4为串联微带线，TL3、TL5和TL6为并联微带线；第六微带线TL6一端与第五微带线TL5的一端相连接，第五微带线TL5的一端与第四微带线TL4和发夹式微带带通滤波器的一端相连接，第四微带线TL4的一端与第二微带线TL2和第三微带线TL3的一端相连接，第一微带线TL1与晶体管的漏极和第二微带线TL2的一端相连接；第一微带线TL1做为调谐线用于补偿晶体管的寄生电容；第一微带线TL1、第二微带线TL2、第四微带线TL4、第五微带线TL5和第六微带线TL6共同控制二次谐波；第一微带线TL1、第二微带线TL2和第三微带线TL3共同控制三次谐波，在晶体管电流源端面实现二次谐波短路和三次谐波开路；The harmonic control network simplifies the harmonic matching network by adding parallel open sector microstrip lines in the drain bias network, including the first microstrip line TL1, the second microstrip line TL2, the third microstrip line TL3, The fourth microstrip line TL4, the fifth microstrip line TL5 and the sixth microstrip line TL6, wherein TL1, TL2 and TL4 are series microstrip lines, TL3, TL5 and TL6 are parallel microstrip lines; the sixth microstrip line One end of TL6 is connected to one end of the fifth microstrip line TL5, one end of the fifth microstrip line TL5 is connected to one end of the fourth microstrip line TL4 and one end of the hairpin microstrip band-pass filter, and the fourth microstrip line TL4 One end is connected to one end of the second microstrip line TL2 and the third microstrip line TL3, the first microstrip line TL1 is connected to the drain of the transistor and one end of the second microstrip line TL2; the first microstrip line TL1 is is the tuning line used to compensate the parasitic capacitance of the transistor; the first microstrip line TL1, the second microstrip line TL2, the fourth microstrip line TL4, the fifth microstrip line TL5 and the sixth microstrip line TL6 jointly control the second harmonic The first microstrip line TL1, the second microstrip line TL2 and the third microstrip line TL3 jointly control the third harmonic, and realize the second harmonic short circuit and the third harmonic open circuit on the end face of the transistor current source; 所述发夹式微带带通滤波器具有良好带内特性，至少包括第一串联微带线TL7、第二串联微带线TL8、第三串联微带线TL9、第四串联微带线TL10、第五串联微带线TL11、第一平行耦合微带线CLin1、第二平行耦合微带线CLin2、第三平行耦合微带线CLin3、第四平行耦合微带线CLin4；其中，第一串联微带线TL7与第一平行耦合微带线CLin1的1端口相连接，第二串联微带线TL8分别与第一平行耦合微带线CLin1的3端口和第二平行耦合微带线CLin2的1端口相连接，第三串联微带线TL9分别与第二平行耦合微带线CLin2的3端口和第三平行耦合微带线CLin3的1端口相连接，第四串联微带线TL10分别与第三平行耦合微带线CLin3的3端口和第四平行耦合微带线CLin4的1端口相连接，第五串联微带线TL11与第四平行耦合微带线CLin4的3端口相连接到50欧姆负载端。The hairpin microstrip band-pass filter has good in-band characteristics, and at least includes a first series microstrip line TL7, a second series microstrip line TL8, a third series microstrip line TL9, a fourth series microstrip line TL10, The fifth serially coupled microstrip line TL11, the first parallel coupled microstrip line CLin1, the second parallel coupled microstrip line CLin2, the third parallel coupled microstrip line CLin3, and the fourth parallel coupled microstrip line CLin4; The strip line TL7 is connected to port 1 of the first parallel coupled microstrip line CLin1, and the second series microstrip line TL8 is respectively connected to port 3 of the first parallel coupled microstrip line CLin1 and port 1 of the second parallel coupled microstrip line CLin2 connected, the third series microstrip line TL9 is respectively connected with the 3 port of the second parallel coupled microstrip line CLin2 and the 1 port of the third parallel coupled microstrip line CLin3, and the fourth series microstrip line TL10 is respectively connected with the third parallel Port 3 of the coupled microstrip line CLin3 is connected to port 1 of the fourth parallel coupled microstrip line CLin4, and the fifth series microstrip line TL11 and port 3 of the fourth parallel coupled microstrip line CLin4 are connected to the 50 ohm load terminal. 2.根据权利要求1所述的基于发夹式微带带通滤波器的F类功率放大器，其特征在于，所述的谐波控制网络将第六微带线TL6、第五微带线TL5、第四微带线TL4、第二微带线TL2和第一微带线TL1进行参数调谐，在E点实现二次谐波短路；将第三微带线TL3、第二微带线TL2和第一微带线TL1进行参数调谐，在E点实现三次谐波开路。2. class F power amplifier based on hairpin microstrip bandpass filter according to claim 1, is characterized in that, described harmonic control network will be the sixth microstrip line TL6, the fifth microstrip line TL5, The fourth microstrip line TL4, the second microstrip line TL2 and the first microstrip line TL1 perform parameter tuning to realize the second harmonic short circuit at point E; the third microstrip line TL3, the second microstrip line TL2 and the first A microstrip line TL1 performs parameter tuning and realizes the third harmonic open circuit at point E. 3.根据权利要求1所述的基于发夹式微带带通滤波器的F类功率放大器，其特征在于，所述的发夹式微带带通滤波器通过将2、4端口进行开路设置的长度为
Figure FDA0002928799050000031
的级联平行耦合式微带线折叠成长度减半为
Figure FDA0002928799050000032
的发夹式结构，形成对称带通滤波网络。3. the class F power amplifier based on hairpin type microstrip band-pass filter according to claim 1, is characterized in that, described hairpin type microstrip band-pass filter is carried out by the length that 2,4 ports are open-circuited and set for
Figure FDA0002928799050000031
The cascaded parallel-coupled microstrip line is folded into a length halved as
Figure FDA0002928799050000032
The hairpin structure forms a symmetrical bandpass filter network. 4.一种基于发夹式微带带通滤波器的F类功率放大器的设计方法，其特征在于，通过如下步骤实现：4. a kind of design method based on the F class power amplifier of hairpin type microstrip bandpass filter, it is characterized in that, realize by following steps: 步骤S1：对GaN HEMT CGH40010F晶体管进行多次负载牵引和源牵引，在功率附加效率和最大输出功率时得出该晶体管最佳负载阻抗和最佳源阻抗；Step S1: Perform multiple load pulls and source pulls on the GaN HEMT CGH40010F transistor, and obtain the optimal load impedance and optimal source impedance of the transistor at the power added efficiency and maximum output power; 步骤S2：根据步骤S1获得的最佳源阻抗进行共轭设置并通过阶梯阻抗匹配方式与信号源50欧姆内阻进行匹配操作，完成输入匹配电路设计，使晶体管获得最大功率输入信号；Step S2: carry out a conjugate setting according to the optimal source impedance obtained in step S1, and perform a matching operation with the 50 ohm internal resistance of the signal source through a ladder impedance matching method, and complete the design of the input matching circuit, so that the transistor can obtain the maximum power input signal; 步骤S3：采用四分之一波长微带线设计栅极偏置网络和漏极偏置网络以保证功率放大器具有稳定的直流供电电压；Step S3: using quarter-wavelength microstrip line to design gate bias network and drain bias network to ensure that the power amplifier has a stable DC supply voltage; 步骤S4：设计谐波控制网络，在与漏极偏置网络进行有效结合的同时，同时使该功率放大器的漏极电压和电流波形满足F类条件，工作频段的中心频点f0，微带线特征阻抗Zn为自由参数，需求解各微带线电长度θn；设计微带线TL6、TL5、TL3的长度分别为
Figure FDA0002928799050000033
使2f0在B点实现短路，3f0在C点实现开路，通过设计微带线TL2的长度为
Figure FDA0002928799050000034
选定合适的Z1和Z4即可确定微带线TL1和TL4的电长度，最后使得在E点分别实现2f0和3f0的短路和开路；Step S4: Designing a harmonic control network, while effectively combining with the drain bias network, at the same time making the drain voltage and current waveforms of the power amplifier meet Class F conditions, the center frequency point f 0 of the working frequency band, the microstrip The line characteristic impedance Z n is a free parameter, and the electrical length θ n of each microstrip line needs to be solved; the lengths of the designed microstrip lines TL6, TL5 and TL3 are respectively
Figure FDA0002928799050000033
Make 2f 0 short circuit at point B and 3f 0 open circuit at point C, by designing the length of microstrip line TL2 as
Figure FDA0002928799050000034
The electrical lengths of the microstrip lines TL1 and TL4 can be determined by selecting suitable Z 1 and Z 4 , and finally the short circuit and open circuit of 2f 0 and 3f 0 can be realized at point E respectively; 步骤S5：设计发夹式微带带通滤波器，由于该滤波器只能将50欧姆负载阻抗转换为实阻抗，通过步骤S4的谐波控制网络将基波阻抗和谐波阻抗匹配到最佳区域；为了确定该滤波器的参数，通过负载牵引技术在中心频率f0获得最佳基波阻抗，通过谐波控制网络后变换为实阻抗
Figure FDA0002928799050000043
作为设计的输入阻抗；根据基于三阶切比雪夫低通滤波器和0.1dB衰减波纹值，通过查表求得其低通原型参量；计算各段耦合线的奇偶模特性阻抗Z0o和Z0e；通过Z0o和Z0e与给定微带线基板参数(介质相对介电常数εr和介质厚度d)，求解微带线的宽度W和微带线耦合距离S；最后将这些长度为
Figure FDA0002928799050000041
的平行耦合微带线折叠成长度减半为
Figure FDA0002928799050000042
的发夹式结构，以减小滤波器的整体尺寸；Step S5: Design a hairpin microstrip band-pass filter. Since the filter can only convert the 50 ohm load impedance into real impedance, the fundamental impedance and harmonic impedance are matched to the optimal region through the harmonic control network in step S4. ; In order to determine the parameters of the filter, the optimal fundamental impedance is obtained at the center frequency f 0 by the load-pull technique, which is transformed into a real impedance after passing through the harmonic control network
Figure FDA0002928799050000043
As the input impedance of the design; based on the third-order Chebyshev low-pass filter and the 0.1dB attenuation ripple value, the low-pass prototype parameters are obtained by looking up the table; the parity model impedance Z 0o and Z 0e of each segment of the coupling line are calculated ; Calculate the width W of the microstrip line and the coupling distance S of the microstrip line through Z 0o and Z 0e and the given microstrip line substrate parameters (dielectric relative permittivity ε r and dielectric thickness d); Finally, these lengths are
Figure FDA0002928799050000041
The parallel coupled microstrip line is folded into a length halved as
Figure FDA0002928799050000042
The hairpin structure to reduce the overall size of the filter; 步骤S6：结合步骤S1、S2、S3、S4、S5，搭建整体电路结构，使用ADS软件进行电路仿真和优化，以保证实现最优性能。Step S6: Combine steps S1, S2, S3, S4, and S5 to build an overall circuit structure, and use ADS software to perform circuit simulation and optimization to ensure optimal performance.
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