CN112821979A - Decentralized fast network time synchronization method - Google Patents
Decentralized fast network time synchronization method Download PDFInfo
- Publication number
- CN112821979A CN112821979A CN202110409529.9A CN202110409529A CN112821979A CN 112821979 A CN112821979 A CN 112821979A CN 202110409529 A CN202110409529 A CN 202110409529A CN 112821979 A CN112821979 A CN 112821979A
- Authority
- CN
- China
- Prior art keywords
- node
- master clock
- clock
- time
- master
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
- H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
- H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
- H04J3/0667—Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays
Abstract
A decentralized fast network time synchronization method belongs to the technical field of network communication, and adopts periodic communication during communication, wherein each communication period is a macrocycle; one node in the network is a master clock node for providing a time reference, and the master clock node has a master clock identity which has uniqueness; the node which carries out time synchronization to the master clock node is a slave clock node which has a slave clock identity; all slave clock nodes need to perform clock synchronization communication with the master clock node, so that the time synchronization of the whole network is realized; the method comprises the following steps: step S1, identity competition process; step S2, clock synchronization process. Distributed networking architecture, decentralized networking. In the scheme, the generation of the master-slave clock node identity is caused by the competition of all nodes in the network, namely all the nodes are possible to become master clock nodes.
Description
Technical Field
The invention belongs to the technical field of network communication, and particularly relates to a decentralized rapid network time synchronization method.
Background
The EPA-SRB bus is a real-time Ethernet bus developed based on the EPA bus, and has the remarkable communication characteristic that the system adopts periodic communication during communication, each communication period is a macro period, the macro period consists of period time and non-period time, all equipment in the system is synchronized under the same time reference, namely all nodes are synchronized on the same clock reference branch line, one node in the system is a main clock node for providing the time reference, other nodes are slave clock nodes, and all the slave clock nodes need to perform clock synchronization communication with the main clock node, so that the time synchronization of the whole network is realized.
Chinese patent publication No. CN205283557U discloses a PTP time synchronization apparatus based on synchronous ethernet, which describes the structure and synchronization method of the system. The system comprises a master end time synchronization part, a slave end time synchronization part and a connecting optical fiber; the master end time synchronization part is connected with the slave end time synchronization part in a point-to-point mode through a connecting optical fiber; the master time synchronization part has the same structure as the slave time synchronization part. The distributed synchronous data acquisition and transmission system is added with a high-precision remote time synchronization function on the basis of the high-speed Ethernet, and in distributed synchronous data acquisition and transmission, the data transmission distance is long, the transmission time synchronization precision is high, the data transmission rate is high, the data transmission is guaranteed to be safe and reliable, and the network data transmission and the time synchronization can be realized on a single link. However, this solution has the following disadvantages:
1) according to the prior art, the two types of fixed nodes are divided into a master node and a slave node, the master node provides a time reference, and the time synchronization of the slave clock nodes cannot work due to the failure of the master clock node.
2) The synchronization mode of the existing synchronization technology is realized based on IEEE1588, the types of messages required for synchronization are multiple, and the consumption of bandwidth possibly caused by more than one message in a complex system environment is very large.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the present invention is directed to a decentralized fast network time synchronization method.
In order to achieve the above object, the present invention adopts the following technical solutions.
A decentralized fast network time synchronization method, use periodic communication while communicating, each communication cycle is a macrocycle; one node in the network is a master clock node for providing a time reference, and the master clock node has a master clock identity which has uniqueness; the node which carries out time synchronization to the master clock node is a slave clock node which has a slave clock identity; all slave clock nodes need to perform clock synchronization communication with the master clock node, so that the time synchronization of the whole network is realized;
the method comprises the following steps:
step S1, identity competition process: the competition process of the master clock identity is carried out through a master clock declaration message; the main competition rules are: which node sends the main clock declaration message to declare, the node becomes the main clock node; after only one master clock node is contended, the master clock node provides a time reference for the whole network and periodically sends a master clock period message carrying a timestamp;
step S2, clock synchronization process: other nodes in the network send clock synchronization request messages to the master clock node, and the master clock node replies synchronization response messages after receiving the synchronization request messages to complete clock synchronization.
Further, step S1 includes the steps of:
step S1a, determining whether a node accessing the network has a mandatory identity, where the mandatory identity is a master clock identity or a slave clock identity:
if a certain node is forced to be appointed as a slave clock node in the network, the node does not participate in the competition of the master clock identity no matter what time the node is accessed into the network, becomes a slave clock node and only participates in the clock synchronization process;
if a certain node is forced to be designated as a master clock node in the network, the node becomes the master clock node no matter what time the node is accessed into the network; the node can be independent of other nodes, and forcibly and directly sends the master clock period message until other nodes are not in competition or the original master clock node does not work as a master.
If a plurality of nodes in the network are forcibly set as the master clock nodes, the master clock nodes are preferentially formed according to the master clock period message sent by the master clock period message, and other forced master clock nodes do not compete with the master clock period message any more;
if the node accessing the network does not have a mandatory identity, the next step is taken.
Further, step S1 includes the steps of:
step S1b, determining whether a network to which the node is connected already has a master clock node:
if the network accessed by the node has the master clock node, the node becomes a slave clock node;
if the network accessed by the node does not have the master clock node, the node participates in the competition of master clock identity and proceeds to the next step.
Further, step S1 includes the steps of:
step S1c, competition of master clock identities:
after the node accesses the network, it first needs to monitor whether there is a master clock node in the network or other nodes have a master clock declaration:
if so, the node will not attempt to contend for the master clock identity;
if not, the node starts to periodically send a main clock declaration message for a period of time, and if no person competes with the node in the period of time, the node becomes a main clock node; if the node sending the main clock declaration message receives the main clock declaration messages of other nodes, namely a plurality of nodes send the main clock declaration messages at the same time, judging according to the logic address of the main clock declaration message: the smaller the logic address is, the higher the priority is, the lower the priority node will actively avoid and stop sending the main clock declaration message, so that the sending node corresponding to the main clock declaration message with the smallest logic address becomes the main clock node;
when the master clock node continuously receives master clock period messages of other forced master identities, the master clock node indicates that a certain node is forced to be specified in the network and is determined as a new master clock node, and the original master clock node becomes a slave clock node;
the slave clock identities of the slave clock nodes are obtained without competition, and the nodes which do not become the master clock nodes automatically become the slave clock nodes.
Further, step S1 includes the steps of:
step S1d, judging whether the main clock node is disconnected:
the slave clock node needs to be synchronized with the master clock node, and each macro cycle detects a master clock cycle message sent by the master clock node; if the slave clock node does not receive the master clock period message in a plurality of continuous periods, the master clock node is disconnected, at this time, the slave clock node performs the competition process of the master clock identity again, the step S1c is returned, a new master clock node is competed, and other slave clock nodes synchronize to the new master clock node; if the master clock node is not dropped, the slave clock node is still the slave clock node.
Further, step S2 includes the steps of:
step S2a, a clock preliminary synchronization process between the slave clock node and the master clock node, to complete preliminary calibration of time:
in the process, the slave clock node receives a master clock cycle message sent by the master clock node, extracts the time corresponding to the timestamp in the message, and replaces the time corresponding to the timestamp with the local time of the slave clock node at the receiving moment, namely, the time corresponding to the timestamp of the message received by the slave clock node is considered as the time of sending the message by the master clock node, and the primary calibration of the clock is completed.
Further, step S2 includes the steps of:
and step S2b, calculating the line delay from the slave clock node to the master clock node, and compensating the calculated line delay to the local time of the slave clock node to realize complete time synchronization.
Each macro-period master clock node sends a master clock period message to each slave clock node, the time when the master clock node sends the master clock period message is T1, the time information is sent to the slave clock nodes through the master clock period message, and the time when the slave clock nodes receive the master clock period message is T2; after receiving the master clock cycle message, the slave clock node sends a synchronization request message to the master clock node, wherein the sending time is T3; the time when the master clock node receives the synchronization request message is T4, and the master clock node returns T4 time information in the returned synchronization response message to the slave clock node. Thus, the slave clock node records the times of T1, T2, T3 and T4 at the same time, and starts to calculate the line Delay:
after the line Delay is calculated, the line Delay is added in each macro-cycle calibration time, so that the clocks of the slave clock nodes and the clocks of the master clock nodes are kept synchronous.
The scheme is a method for realizing time synchronization among all devices in a real-time bus communication system. Firstly, a system carries out an identity competition process to compete out a single master clock node, the master clock node provides a time reference for the whole network, and a master clock period message carrying a timestamp is periodically sent; then other nodes in the network send clock synchronization request messages to the master clock node, and the master clock node replies synchronization response messages after receiving the synchronization request messages to complete clock synchronization; and finally, realizing the clock synchronization of the slave clock node and the master clock node.
The invention has the following advantages:
1. distributed networking architecture, decentralized networking. The only master clock node in the network described by the scheme is not a fixed node, all nodes in the synchronous network are the same node actually, a central node is not arranged, the generation of master and slave clock node identities is originated from competition of all nodes in the network, and all nodes are possible to become master clock nodes.
2. The simplified synchronization process improves the utilization of network bandwidth. According to the scheme, the time message types are not increased independently, but the time information is converted into the timestamp and attached to the periodic message. The synchronization mode is simple, the service communication message of the master clock node is fused with the periodic message of the maintenance time system, the complexity of the synchronization process is reduced, and the communication efficiency is improved.
3. The contention and synchronization process has no requirements on the network topology. If a redundant network is arranged between the nodes, a plurality of channels are connected with each other, and the synchronization process can realize independent calculation of line delay of different channels, so that independent synchronization of multiple channels is achieved.
Drawings
FIG. 1 is a general node identity competition flow diagram;
FIG. 2 is a clock synchronization flow;
FIG. 3 is a flowchart of a clock synchronization process in which a master clock node participates;
FIG. 4 is a flow diagram of a clock synchronization process involving a slave clock node;
FIG. 5 is a schematic diagram of the delay differences of different channels;
FIG. 6 is a schematic of a preliminary calibration of the time of the different channels;
fig. 7 is a schematic diagram of the different channels after line delay compensation.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings.
A decentralized fast network time synchronization method comprises the following steps:
step S1, identity competition process.
The node accesses the network. Any one of the nodes may be divided into a master clock node and a slave clock node according to an operation state in the network. A node in the network that provides a unique time reference becomes a master clock node, which has a master clock identity. The master clock node provides a time reference for the whole network, all nodes in the network need to perform clock synchronization to the master clock node, and the identity of the master clock node is unique. The node that is time synchronized to the master clock node is a slave clock node, which has a slave clock identity.
Each node has no identity state (except that the node is forcibly appointed) at the initial power-on stage, and identity competition is required. The identity that can compete is the master clock identity, and the slave clock does not need to compete, and the node that does not compete to become the master clock identity automatically has the slave clock identity.
Step S1a, determine whether the node accessing the network has a mandatory identity, where the mandatory identity is a master clock identity or a slave clock identity.
If a certain node is forced to be appointed as a slave clock node in the network, the node does not participate in the competition of the master clock identity no matter what time the node accesses the network, becomes a slave clock node and only participates in the clock synchronization process.
If a certain node is forced to be designated as a master clock node in the network, the node becomes the master clock node no matter what time the node is accessed into the network. The node can be independent of other nodes, and forcibly and directly sends the master clock period message until other nodes are not in competition or the original master clock node does not work as a master.
If a plurality of nodes in the network are all set as master clock nodes by force, then according to who sends the master clock period message first, who preferentially becomes the master clock node, and other forced master clock nodes do not compete with the master clock node any more.
If the node accessing the network does not have a mandatory identity, the next step is taken.
Step S1b, determine whether the network to which the node accesses already has a master clock node.
If the network that the node accesses already has a master clock node, then the node becomes a slave clock node. Specifically, a node that has obtained the identity of the master clock sends a master clock cycle packet at each cycle time. If the network to which the node is connected already has a master clock node (i.e., can receive a master clock cycle message), then the node becomes a slave clock node.
If the network accessed by the node does not have the master clock node, the node participates in the competition of master clock identity and proceeds to the next step.
The competition process for master clock identities is performed on the premise that there are no master clock nodes in the network.
Step S1c, master clock identity contention.
The competition process of the master clock identity is carried out through a master clock declaration message. The main rules of competition for master clock identities are: and when the node firstly sends the main clock declaration message for declaration, the node firstly becomes the main clock node.
After the node accesses the network, it first needs to monitor whether there is a master clock node in the network or other nodes have a master clock declaration:
if so, the node will not attempt to contend for the master clock identity;
if not, the node starts to periodically send a master clock declaration message for a period of time, and the node becomes the master clock node if no person competes with the node in the period of time. If the node sending the main clock declaration message receives the main clock declaration messages of other nodes, namely a plurality of nodes send the main clock declaration messages at the same time, judging according to the logic address of the main clock declaration message: the smaller the logic address is, the higher the priority is, the node with the low priority will actively avoid and stop sending the master clock declaration message, so the sending node corresponding to the master clock declaration message with the minimum logic address becomes the master clock node.
When the master clock node continuously receives master clock period messages of other mandatory master identities, which indicates that a certain node is forcibly appointed in the network to be a new master clock node, the original master clock node becomes a slave clock node.
The slave clock identities of the slave clock nodes are obtained without competition, and the nodes which do not become the master clock nodes automatically become the slave clock nodes.
And step S1d, judging whether the master clock node is disconnected.
The slave clock node needs to be synchronized with the master clock node, and each macro cycle detects a master clock cycle message sent by the master clock node; if the slave clock node does not receive the master clock period message in a plurality of continuous periods, the master clock node is disconnected, at this time, the slave clock node performs the competition process of the master clock identity again, returns to the step S1c, competes out a new master clock node, and performs clock synchronization to the new master clock node by other slave clock nodes. If the master clock node is not dropped, the slave clock node is still the slave clock node.
Step S2, clock synchronization process.
The clock synchronization process is a process of realizing the time unification of the whole network system by each node in the system through timestamp information carried in the message.
The method comprises the steps that a master clock node sends a master clock period message in each macro period, the message is a period message sent by the master clock node, timestamp information when the message is sent is carried in the message, the information is used for providing a time reference for the whole network, but the message also has the function of carrying service data of normal periodic communication of the node, namely the time reference is only a part of the function of the message, an independent message is not used for providing the time reference, and the service message in a general system and the message of the time reference provided by the master clock are fused to form the master clock period message, so that the number of the messages in the network is reduced, the network load is reduced, and the bandwidth is improved.
The clock synchronization process is divided into two stages:
and step S2a, performing a clock preliminary synchronization process between the slave clock node and the master clock node to finish preliminary time calibration.
In the process, the slave clock node receives a master clock cycle message sent by the master clock node, extracts the time corresponding to the timestamp in the message, and replaces the time corresponding to the timestamp with the local time of the slave clock node at the receiving moment, namely, the time corresponding to the timestamp of the message received by the slave clock node is considered as the time of sending the message by the master clock node, and the primary calibration of the clock is completed. After the processing, the actual error between the master clock node and the slave clock node is the line delay between the time when the master clock node sends the master clock cycle message and the time when the slave clock node receives the master clock cycle message.
And step S2b, calculating the line delay from the slave clock node to the master clock node, and compensating the calculated line delay to the local time of the slave clock node to realize complete time synchronization.
In the preliminary calibration of time, the slave clock node calibrates the clock carried in the master clock node as its own running clock each time the slave clock node receives the master clock cycle message of the master clock node, but an error Delay caused by a line Delay exists between the calibration result and the actual time sent by the master clock node.
The following is needed to calculate the error Delay caused by this line Delay: the time stamp in the master clock cycle message sent by the master clock node, the time stamp in the synchronization request message of the slave clock node and the time stamp carried in the synchronization response message replied by the master clock node.
The principle of the line delay calculation is described as follows:
each macro-period master clock node sends a master clock period message to each slave clock node, the time when the master clock node sends the master clock period message is T1, the time information is sent to the slave clock nodes through the master clock period message, and the time when the slave clock nodes receive the master clock period message is T2; after receiving the master clock cycle message, the slave clock node sends a synchronization request message to the master clock node, wherein the sending time is T3; the time when the master clock node receives the synchronization request message is T4, and the master clock node returns T4 time information in the returned synchronization response message to the slave clock node. Thus, the slave clock node records the time T1, the time T2, the time T3 and the time T4 at the same time, and starts to calculate the line delay:
after the line Delay is calculated, the line Delay is added in each macro-cycle calibration time, so that the clocks of the slave clock nodes and the clocks of the master clock nodes are kept synchronous.
If the system is a multi-channel redundant communication network, the communication node has a plurality of communication ports (namely, communication channels), the synchronization request messages sent from the clock node are simultaneously sent to the communication ports, and the time stamps in the synchronization request messages are the same; however, according to different network topologies, the time for the multiple communication ports corresponding to the master clock node to receive the synchronization request message sent by each communication port of the slave clock node may be different (i.e., the T4 time recorded by different communication ports is different), and each communication port of the synchronization response message replied by the master clock node may send simultaneously, but since each communication port path may be different, the timestamp information of the reception request carried in the synchronization response message replied by each communication port is independent (i.e., the carried T3 time is different).
The line delay time calculated from each port of the clock node may be different. However, the system synchronizes with the timestamp and the line delay of the master clock cycle packet of any channel, and the synchronization effect should be consistent.
FIG. 3 is a flow chart of a synchronization process for master clock nodes of a channel; FIG. 4 is a flow chart of a synchronization process for slave clock nodes of a channel. The minimum unit of the communication synchronization is a channel, if one device/node has a plurality of data channels, a plurality of channels of the master clock node can simultaneously send out master clock period messages, the time stamp in the messages is the same time, each channel received by the slave clock node can independently carry out the synchronization process, and each channel can calculate different Delay times (because the line delays of different channels are different).
After the synchronization of the channels is completed, although the Delay calculation results of different channels are different, the local running time of each channel after the time compensation is consistent and the same as the local time of the master node.
For example: fig. 5 is a ring topology network composed of 3 nodes, where a node U1 and a node U2 are slave clock nodes, and a node U3 is a master clock node. Each node has two channels connected end to end, the line Delay between any two node channels is 10 (thus, Delay a =10, Delay1=10, and Delay3= 10), the forwarding Delay from a to B inside the node is 5 (thus, Delay2= 5), then when node U3 is the master clock node, the line Delay DelayA of the a channel of node U1 reaching U3 is 10, and the line Delay of the B channel reaching U3 is DelayB = Delay1+ Delay2+ Delay3= 25.
Under such conditions, the master clock node U3 will periodically send master clock cycle messages, where the master clock cycle messages carry timestamp information of the message sending. Assuming that each period starts from 0, the time of the master clock node U3 sending the master clock period message is 5, the A, B channel of the master clock node U3 sending the message at the same time is sent to the A, B channel of the slave clock node U1 along two different paths, and the two channels of the slave clock node U1 receiving the message will initially calibrate their own time. The results are shown in FIG. 6.
In the packet sent by the master clock node U3, the channel a of the slave clock node U1 receives the packet after the delay of 10, and replaces the local clock with the transmission time 5 carried in the master clock cycle packet sent by the master clock node U3, the channel B of the slave clock node U1 receives the master clock cycle packet of another channel after the delay of 25, and replaces the local clock with the transmission time 5 carried in the master clock cycle packet sent by the master clock node U3, as a result, as shown in fig. 6, after the time of the slave clock node U1 is preliminarily calibrated according to the master clock cycle packet of the master clock node U3, the time 0 of the channel A, B and the time of the master clock node U3 have errors, and the errors are the line delays of two paths.
After the preliminary calibration is completed, the slave clock node U1 sends a synchronization packet to the master clock node U3 through A, B two channels respectively to calculate the line delay, and the calculation result is that the line delay from the channel a of the slave clock node U1 to the master clock node U3 is 10, and the line delay from the channel B to the master clock node U3 is 25. After compensating the two line delays to A, B local clocks for the two channels, the result is that, as shown in FIG. 7, both A, B channels of the slave clock node U1 remain coincident with the clock of the master clock node U3 after compensating the line delays.
The advantages of the invention are as follows:
1) the decentralized synchronous network structure has no absolute main clock node, the selected main clock node is selected through self competition, the selected main clock node is disconnected, a new main clock node is selected, and the clock synchronization of the whole network cannot be influenced by the fault of a specific node.
2) The simple synchronization mode fuses the service communication message of the master clock node and the periodic message of the maintenance time system, reduces the complexity of the synchronization process and improves the communication efficiency.
3) The circuit delay is calculated synchronously independently through multiple channels, and the circuit delay of different channels is different without influencing the synchronous effect.
4) And under different line delays, the request message is dynamically adjusted, and the synchronization precision is ensured when the communication bandwidth is reduced.
It should be understood that equivalents and modifications of the technical solution and inventive concept thereof may occur to those skilled in the art, and all such modifications and alterations should fall within the scope of the appended claims.
Claims (7)
1. A decentralized fast network time synchronization method, use periodic communication while communicating, each communication cycle is a macrocycle; one node in the network is a master clock node for providing a time reference, and the master clock node has a master clock identity which has uniqueness; the node which carries out time synchronization to the master clock node is a slave clock node which has a slave clock identity; all slave clock nodes need to perform clock synchronization communication with the master clock node, so that the time synchronization of the whole network is realized; the method is characterized by comprising the following steps:
step S1, identity competition process: the competition process of the master clock identity is carried out through a master clock declaration message; the main competition rules are: which node sends the main clock declaration message to declare, the node becomes the main clock node; after only one master clock node is contended, the master clock node provides a time reference for the whole network and periodically sends a master clock period message carrying a timestamp;
step S2, clock synchronization process: other nodes in the network send clock synchronization request messages to the master clock node, and the master clock node replies synchronization response messages after receiving the synchronization request messages to complete clock synchronization.
2. The decentralized fast network time synchronization method according to claim 1, wherein in step S1, the method further comprises the steps of:
step S1a, determining whether a node accessing the network has a mandatory identity, where the mandatory identity is a master clock identity or a slave clock identity:
if a certain node is forced to be appointed as a slave clock node in the network, the node does not participate in the competition of the master clock identity no matter what time the node is accessed into the network, becomes a slave clock node and only participates in the clock synchronization process;
if a certain node is forced to be designated as a master clock node in the network, the node becomes the master clock node no matter what time the node is accessed into the network; the node can be independent of other nodes, and forcibly and directly sends the master clock period message until other nodes are not in competition or the original master clock node does not work as a master;
if a plurality of nodes in the network are forcibly set as the master clock nodes, the master clock nodes are preferentially formed according to the master clock period message sent by the master clock period message, and other forced master clock nodes do not compete with the master clock period message any more;
if the node accessing the network does not have a mandatory identity, the next step is taken.
3. The decentralized fast network time synchronization method according to claim 2, wherein in step S1, the method further comprises the steps of:
step S1b, determining whether a network to which the node is connected already has a master clock node:
if the network accessed by the node has the master clock node, the node becomes a slave clock node;
if the network accessed by the node does not have the master clock node, the node participates in the competition of master clock identity and proceeds to the next step.
4. The decentralized fast network time synchronization method according to claim 3, wherein the step S1 further comprises the steps of:
step S1c, competition of master clock identities:
after the node accesses the network, it first needs to monitor whether there is a master clock node in the network or other nodes have a master clock declaration:
if so, the node will not attempt to contend for the master clock identity;
if not, the node starts to periodically send a main clock declaration message for a period of time, and if no person competes with the node in the period of time, the node becomes a main clock node; if the node sending the main clock declaration message receives the main clock declaration messages of other nodes, namely a plurality of nodes send the main clock declaration messages at the same time, judging according to the logic address of the main clock declaration message: the smaller the logic address is, the higher the priority is, the lower the priority node will actively avoid and stop sending the main clock declaration message, so that the sending node corresponding to the main clock declaration message with the smallest logic address becomes the main clock node;
when the master clock node continuously receives master clock period messages of other forced master identities, the master clock node indicates that a certain node is forced to be specified in the network and is determined as a new master clock node, and the original master clock node becomes a slave clock node;
the slave clock identities of the slave clock nodes are obtained without competition, and the nodes which do not become the master clock nodes automatically become the slave clock nodes.
5. The decentralized fast network time synchronization method according to claim 4, wherein in step S1, further comprising the steps of:
step S1d, judging whether the main clock node is disconnected:
the slave clock node needs to be synchronized with the master clock node, and each macro cycle detects a master clock cycle message sent by the master clock node; if the slave clock node does not receive the master clock period message in a plurality of continuous periods, the master clock node is disconnected, at this time, the slave clock node performs the competition process of the master clock identity again, the step S1c is returned, a new master clock node is competed, and other slave clock nodes synchronize to the new master clock node; if the master clock node is not dropped, the slave clock node is still the slave clock node.
6. The decentralized fast network time synchronization method according to claim 1, wherein in step S2, the method further comprises the steps of:
step S2a, a clock preliminary synchronization process between the slave clock node and the master clock node, to complete preliminary calibration of time:
in the process, the slave clock node receives a master clock cycle message sent by the master clock node, extracts the time corresponding to the timestamp in the message, and replaces the time corresponding to the timestamp with the local time of the slave clock node at the receiving moment, namely, the time corresponding to the timestamp of the message received by the slave clock node is considered as the time of sending the message by the master clock node, and the primary calibration of the clock is completed.
7. The decentralized fast network time synchronization method according to claim 6, wherein in step S2, further comprising the steps of:
step S2b, calculating the line delay from the slave clock node to the master clock node, and compensating the calculated line delay to the local time of the slave clock node to realize the complete time synchronization;
each macro-period master clock node sends a master clock period message to each slave clock node, the time when the master clock node sends the master clock period message is T1, the time information is sent to the slave clock nodes through the master clock period message, and the time when the slave clock nodes receive the master clock period message is T2; after receiving the master clock cycle message, the slave clock node sends a synchronization request message to the master clock node, wherein the sending time is T3; the time when the master clock node receives the synchronization request message is T4, and the master clock node returns T4 time information to the slave clock node in the returned synchronization response message; thus, the slave clock node records the times of T1, T2, T3 and T4 at the same time, and starts to calculate the line Delay:
after the line Delay is calculated, the line Delay is added in each macro-cycle calibration time, so that the clocks of the slave clock nodes and the clocks of the master clock nodes are kept synchronous.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110409529.9A CN112821979A (en) | 2021-04-16 | 2021-04-16 | Decentralized fast network time synchronization method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110409529.9A CN112821979A (en) | 2021-04-16 | 2021-04-16 | Decentralized fast network time synchronization method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112821979A true CN112821979A (en) | 2021-05-18 |
Family
ID=75862552
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110409529.9A Pending CN112821979A (en) | 2021-04-16 | 2021-04-16 | Decentralized fast network time synchronization method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112821979A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113037421A (en) * | 2021-05-25 | 2021-06-25 | 浙江国利信安科技有限公司 | Method, communication device, communication system, and storage medium for clock synchronization |
| CN113282520A (en) * | 2021-07-23 | 2021-08-20 | 浙江国利信安科技有限公司 | EPA system test method, EPA system test equipment and medium |
| CN114697270A (en) * | 2022-03-28 | 2022-07-01 | 西安微电子技术研究所 | EPA network model-based arbitration method, system, equipment and medium |
| CN114924617A (en) * | 2022-06-15 | 2022-08-19 | 深圳前海微众银行股份有限公司 | Clock synchronization method and device in decentralized system |
| CN114924617B (en) * | 2022-06-15 | 2024-04-26 | 深圳前海微众银行股份有限公司 | Clock synchronization method and device in decentralization system |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011085585A1 (en) * | 2010-07-23 | 2011-07-21 | 华为技术有限公司 | Method and device for time synchronization |
| CN103532693A (en) * | 2013-10-18 | 2014-01-22 | 杭州华三通信技术有限公司 | Time synchronizing device and method |
| CN109921871A (en) * | 2018-12-20 | 2019-06-21 | 清华大学 | A kind of method for synchronizing time, device and network system |
| CN110138490A (en) * | 2019-05-14 | 2019-08-16 | 浙江国利网安科技有限公司 | A kind of method and apparatus of clock competition |
-
2021
- 2021-04-16 CN CN202110409529.9A patent/CN112821979A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011085585A1 (en) * | 2010-07-23 | 2011-07-21 | 华为技术有限公司 | Method and device for time synchronization |
| CN103532693A (en) * | 2013-10-18 | 2014-01-22 | 杭州华三通信技术有限公司 | Time synchronizing device and method |
| CN109921871A (en) * | 2018-12-20 | 2019-06-21 | 清华大学 | A kind of method for synchronizing time, device and network system |
| CN110138490A (en) * | 2019-05-14 | 2019-08-16 | 浙江国利网安科技有限公司 | A kind of method and apparatus of clock competition |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113037421A (en) * | 2021-05-25 | 2021-06-25 | 浙江国利信安科技有限公司 | Method, communication device, communication system, and storage medium for clock synchronization |
| CN113037421B (en) * | 2021-05-25 | 2021-08-13 | 浙江国利信安科技有限公司 | Method, communication device, communication system, and storage medium for clock synchronization |
| CN113282520A (en) * | 2021-07-23 | 2021-08-20 | 浙江国利信安科技有限公司 | EPA system test method, EPA system test equipment and medium |
| CN113282520B (en) * | 2021-07-23 | 2021-10-15 | 浙江国利信安科技有限公司 | EPA system test method, EPA system test equipment and medium |
| CN114697270A (en) * | 2022-03-28 | 2022-07-01 | 西安微电子技术研究所 | EPA network model-based arbitration method, system, equipment and medium |
| CN114924617A (en) * | 2022-06-15 | 2022-08-19 | 深圳前海微众银行股份有限公司 | Clock synchronization method and device in decentralized system |
| CN114924617B (en) * | 2022-06-15 | 2024-04-26 | 深圳前海微众银行股份有限公司 | Clock synchronization method and device in decentralization system |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112821979A (en) | Decentralized fast network time synchronization method | |
| US8724453B2 (en) | Method and apparatus for implementing trunk optical fiber protection in ethernet passive optical network (EPON) | |
| CN103442312B (en) | Intelligent distribution network clock synchronization system based on PTN+EPON communication system and method | |
| US11095382B2 (en) | Communication system, communication device and communication method | |
| CN102299788A (en) | Method and device for controlling automatic transmission of IEEE1558 (Institute of Electrical and Electronic Engineers 1558) protocol message | |
| JPWO2012108387A1 (en) | Communication system time synchronization method, slave station device, master station device, control device, and program | |
| CN104378193A (en) | Time synchronization system and method, exchanger and embedded interface board | |
| CN106451763A (en) | Intelligent substation-level bus network system without requiring global synchronous system | |
| CN102263630A (en) | Clock source selection method | |
| Ferrari et al. | On the seamless interconnection of IEEE1588-based devices using a PROFINET IO infrastructure | |
| CN113422665B (en) | Method and system for realizing time synchronization of vehicle-mounted system based on IPC mechanism | |
| WO2021174784A1 (en) | Method for time synchronization between communications of multiple main devices in can bus | |
| CN111740800B (en) | Multi-precision clock synchronization method based on SDN framework 5G intelligent node | |
| CN105978652A (en) | Synchronous time comparing equipment of redundant Ethernet, system and method thereof | |
| CN111543019B (en) | System and method for accurate time synchronization using optical modules | |
| US20240048260A1 (en) | Clock synchronization method, optical head end, and optical terminal | |
| CN106656395B (en) | Based on the improved power grid time synchronized measurement system of self study and method | |
| CN111601189B (en) | Accurate time synchronization method and system applied to cable distance measuring device | |
| CN110708135A (en) | Communication control system and method of passive optical network | |
| Qi et al. | Design and implementation of IEEE1588 time synchronization messages timestamping based on FPGA | |
| Gutiérrez-Rivas et al. | Sub-nanosecond synchronization accuracy for time-sensitive applications on industrial networks | |
| CN107888315B (en) | A kind of method for synchronizing time | |
| Hu et al. | Multi-domain time synchronization model and performance evaluation in TSN | |
| CN109842456A (en) | A kind of clock synchronizing method based on AFDX network | |
| KR101243434B1 (en) | Synchronization method for fieldbus using gateway and synchronization system for fieldbus using gateway |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20210518 |
|
| RJ01 | Rejection of invention patent application after publication |