CN112821792A - Double-frequency staggered hybrid half-bridge circuit and control method thereof - Google Patents
Double-frequency staggered hybrid half-bridge circuit and control method thereof Download PDFInfo
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- CN112821792A CN112821792A CN202110201361.2A CN202110201361A CN112821792A CN 112821792 A CN112821792 A CN 112821792A CN 202110201361 A CN202110201361 A CN 202110201361A CN 112821792 A CN112821792 A CN 112821792A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from dc input or output
- H02M1/15—Arrangements for reducing ripples from dc input or output using active elements
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- Dc-Dc Converters (AREA)
Abstract
The invention provides a double-frequency staggered hybrid half-bridge circuit and a control method thereof. The double-frequency staggered hybrid half-bridge circuit enables input energy to be processed at different frequencies by the two bridge arms, utilizes the low-frequency bridge arm to process power at a lower frequency, reduces loss, utilizes the high-frequency bridge arm to realize high-frequency processing of partial power, compensates harmonic waves caused by low-frequency action of the low-frequency bridge arm, realizes the effect of active filtering, and enables an output waveform to approach an expected value. Energy conversion under different working conditions is realized through the optimized combination of energy packets with different frequencies. The invention fully combines the main power of a low-cost and high-rated-capacity device low-frequency processing system and the high-frequency processing partial power of a low-loss and high-frequency device, realizes the double-frequency staggered hybrid half-bridge circuit, and can obviously improve the efficiency and reduce the loss and the cost compared with a full high-frequency processing half-bridge circuit.
Description
Technical Field
The invention relates to the field of switching power supplies, in particular to a double-frequency staggered hybrid half-bridge circuit and a control method thereof.
Background
An important role of the power electronic converter is to convert electric energy into electric energy for different working conditions. In order to achieve the purpose, in the switching converter, the converter processes input energy flow into a plurality of energy packets through a power device, then the energy packets are conveyed through energy storage elements (inductors and capacitors), and the energy packets are mutually exchanged and converged among the elements through demand control, so that the energy flow is smoothly and stably output.
The conventional half-bridge structure is full power processing, and input electric energy is processed in a uniform path and frequency. In order to achieve a good performance of the converter, the waveform of the output is made closer to an expected value, and the most direct method is to increase the switching frequency of the power device to increase the frequency of the converter. The high switching frequency can greatly reduce the volume and weight of passive elements of the device, and achieve the aim of high power density. High switching frequencies also present many challenges in improving converter performance, the most immediate of which is the steep rise in losses.
Disclosure of Invention
The present invention is directed to overcome the above-mentioned deficiencies in the prior art and to provide a dual-frequency interleaved hybrid half-bridge circuit and a control method thereof. The technical scheme of the invention is as follows.
A dual-frequency staggered hybrid half-bridge circuit comprises a low-frequency branch and a high-frequency branch, wherein the low-frequency branch comprises a low-frequency bridge arm and a main inductor, and the high-frequency branch comprises a high-frequency bridge arm and a high-frequency inductor;
the main inductor is connected with the high-frequency inductor in parallel, and the low-frequency bridge arm is connected with the high-frequency bridge arm in parallel;
the low-frequency bridge arm comprises a first low-frequency device and a second low-frequency device;
the high-frequency bridge arm comprises a first high-frequency device and a second high-frequency device.
Preferably, the first low-frequency device and/or the second low-frequency device comprise a silicon metal oxide transistor and a silicon-based insulated gate bipolar transistor anti-parallel diode.
Preferably, the first high frequency and/or the second high frequency comprise silicon-based super junction metal oxide transistors, silicon carbide metal oxide transistors or gallium nitride high electron mobility transistors.
A power control method based on a dual-frequency interleaved hybrid half-bridge circuit comprises the following steps:
reference value I of total currentLrMultiplying by a proportionality coefficient to generate a low-frequency bridge arm current reference value IL1rThe low-frequency bridge arm current reference value I is comparedL1rAnd low-frequency bridge arm current sampling value IL1sComparing to obtain a low-frequency bridge arm control error IL1.errThe low frequency bridge arm control error IL1.errThe control signal duty ratio D of the low-frequency bridge arm is output after being input into the low-frequency current regulatorLObtaining a low-frequency bridge arm switching signal through a PWM (pulse width modulation) module; the power distribution ratio of the low-frequency bridge arm is changed by adjusting the proportionality coefficient, so that the current free distribution of the high-frequency bridge arm and the low-frequency bridge arm is realized; wherein the total current reference value ILrA total current reference signal to be tracked;
calculating predicted value delta I of low-frequency bridge arm current variation based on model prediction functionL1p(ii) a Wherein the model prediction function is:
in the formula, VABIs the input port voltage, VCBFor the output port voltage, TSHFor a high frequency switching period, L1A low frequency bridge arm inductance; sLFor low frequency bridge arm switching function:
wherein S isL1First low-frequency device, S, being a low-frequency bridge armL2A second low frequency device being a low frequency bridge arm;
reference value I of total currentLrAnd total current sampling value ILsComparing to obtain the total current error IL.errError in total current IL.errPredicted value delta I of current variation of bridge arm in low frequencyL1pAfter comparison, generating a high-frequency bridge arm current control error IL2.errControlling the error I of the high-frequency bridge arm currentL2.errControl signal supplied to high-frequency current regulator to generate high-frequency bridge armNumber duty cycle DHObtaining a high-frequency bridge arm switching signal through a PWM (pulse width modulation) module;
preferably, a low-frequency bridge arm current predicted value delta I is introduced into each high-frequency periodL1pSo as to compensate the current ripple of the low-frequency bridge arm in real time.
Compared with the prior art, the invention has the beneficial effects that: the double-frequency staggered hybrid half bridge enables input energy to be processed at different frequencies by the two bridge arms, utilizes the low-frequency bridge arm to process power at a lower frequency, reduces loss, utilizes the high-frequency bridge arm to realize high-frequency processing of partial power, compensates harmonic waves caused by low-frequency action of the low-frequency bridge arm, realizes the effect of active filtering, and enables an output waveform to approach an expected value. Energy conversion under different working conditions is realized through the optimized combination of energy packets with different frequencies. The invention fully combines the main power of a low-frequency processing system of a device with low cost and large rated capacity and the high-frequency processing partial power of a device with low loss and high frequency, and realizes the staggered double-frequency hybrid half-bridge circuit. Compared with a full high-frequency processing half-bridge circuit, the invention can obviously improve the efficiency and reduce the loss and the cost.
Drawings
FIG. 1 is a schematic diagram of the control of the dual-frequency interleaved hybrid half-bridge circuit of the present invention;
fig. 2 is a schematic diagram of a main circuit of a dual-frequency interleaved hybrid half-bridge bidirectional dc-dc converter with a wide bandgap device and a Si-based device according to an embodiment of the present invention;
fig. 3 is a specific control schematic diagram of a dual-frequency interleaved hybrid half-bridge bidirectional dc-dc converter with a wide bandgap device and a Si-based device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 1, the dual-frequency interleaved hybrid half-bridge circuit of the present embodiment includes a low-frequency branch and a high-frequency branch, and specifically includes a main inductor L1 and a high-frequency inductor L2 connected in parallel, and an output terminal of the main inductor L1 is connected with a first low-frequency device SL1 and a second low-frequency device SL 2; the output end of the high-frequency inductor L2 is connected with a first high-frequency device SH1 and a second high-frequency device SH 2.
For example, as shown in fig. 2, the first low-frequency device SL1 and the second low-frequency device SL2 are Si IGBT anti-parallel diodes; the first high-frequency device SH1 and the second high-frequency device SH2 employ SiC MOSFET devices.
The first high frequency device SL1 and the second high frequency device SL2 are connected to an output capacitor and a load connected in parallel.
The first low-frequency device SL1 and the second low-frequency device SL2 form a low-frequency bridge arm H1; the first high-frequency device SH1 and the second high-frequency device SH2 form a high-frequency bridge arm H2.
And the low-frequency bridge arm H1 and the main inductor L1 form a low-frequency branch circuit. The high-frequency bridge arm H2 and the high-frequency inductor L2 form a high-frequency branch. And the low-frequency branch and the high-frequency branch form a double-frequency staggered hybrid half-bridge circuit.
The current includes the total input current ILHigh frequency branch current IL2Low frequency branch current IL1. And the low-frequency branch consisting of the low-frequency bridge arm H1 and the main inductor L1 processes most of the power of the system. The operation principle of the low-frequency branch is the same as that of the conventional half-bridge. Most of the power of the system is processed by the low-frequency branch circuit, so that the switching loss of the system can be reduced. But a low switching frequency causes a large current ripple in the low frequency branch current.
The high-frequency branch consisting of the high-frequency bridge arm H2 and the high-frequency inductor L2 operates at a higher switching frequency so as to eliminate current ripples of the low-frequency branch, process a small part of power and track a reference value I of input currentL. Meanwhile, the ripple of the low-frequency branch is offset by the high-frequency branch, so that the total input current ILThe ripple is determined by the high-frequency branch current ripple, so that the total harmonic distortion rate of the system is reduced, and the waveform quality of the input current is improved.
The double-frequency staggered hybrid half-bridge utilizes a high-frequency bridge arm with small capacity to carry out high-frequency conversion on a small part of energy, improves the performance of the converter without remarkably increasing the cost of a system, and realizes the effect of almost a full high-frequency half-bridge.
As shown in fig. 3, the specific control flow of the dual-frequency interleaved hybrid half-bridge bidirectional dc-dc converter with the wide bandgap device and the Si-based device provided in this embodiment includes:
(1) voltage control loop: the reference value is used for tracking the output voltage reference value and generating the reference value of the input current. And comparing the output voltage reference value with the measured value, inputting the generated error into a voltage loop controller, and outputting the error through a PI regulator to obtain the reference value of the input total current.
(2) Si bridge arm control loop: multiplying the total current reference value by a proportionality coefficient K to generate a low-frequency bridge arm current reference value, namely IL1r＝KILr. Error I between low-frequency bridge arm current reference value and low-frequency current sampling valueL1.errThe control signal is input into a PI regulator, the duty ratio of the control signal of the low-frequency bridge arm is output, and then the duty ratio signal is compared with a carrier wave through a PWM (pulse-width modulation) module to generate a PWM control signal, so that a proper low-frequency switching tube is selected to act. The power distribution ratio of the low-frequency bridge arm can be changed by adjusting the parameter K, so that the current free distribution of the high-frequency bridge arm and the low-frequency bridge arm is realized.
(3) Prediction control: this section is used to predict the change in low frequency leg current during the high frequency period. Will input the port voltage VABVoltage at output port VCBAnd inputting the switching signal of the low-frequency bridge arm into a prediction function for calculation so as to obtain a predicted value of the current variation of the low-frequency bridge arm.
For the purpose of analysis, a switching function S is definedLTo describe the low frequency leg switch states:
in each high frequency period, the switching signal and the switching function S of the low frequency half-bridge are adjustedLRegarding the current as a constant value, predicting the current variation delta I of the low-frequency bridge arm by adopting the following formulaL1p。
In the formula, VABIs the input port voltage, VCBFor the output port voltage, TSHA high frequency switching period.
(4) High-frequency bridge arm control loop: this loop is used to ensure that the total current meets the ripple requirements. Reference value I of total currentLrAnd the total current sampling value I at a high frequency sampling rateLsComparing to obtain the total current error IL.errI.e. IL.err＝ILr-ILs. The total current error is compared with the predicted value of the current variation of the low-frequency bridge arm to generate a high-frequency bridge arm current control error IL2.errI.e. IL2.err＝IL.err-ΔIL1p. And finally, comparing the duty ratio signal with a carrier wave through a PWM (pulse-width modulation) module to generate a PWM control signal, so that a proper high-frequency switching tube is selected to act.
In each high-frequency period, the low-frequency bridge arm current ripple predicted value in the high-frequency bridge arm control loop is considered, so that the real-time compensation of the low-frequency bridge arm current ripple can be realized, and the output waveform quality is improved. It should be noted that the predictive control part and the high frequency leg control loop should be calculated in each high frequency cycle.
The invention can be widely applied to various power electronic devices represented by a switching power supply, and provides a new solution for realizing the aims of high reliability, high power capacity, high energy efficiency and low cost of the power electronic converter.
It should be noted that the above-mentioned embodiments are only used for illustrating the embodiments of the present invention, and the description is more specific and detailed, but the scope of the present invention is not limited thereto. Reasonable changes and improvements can be made on the basis of the concept of the invention by those skilled in the art, but the invention can not depart from the core idea of the invention and is included in the protection scope of the invention. Therefore, the protection scope of the present patent shall be subject to the claims.
Claims (5)
1. A dual-frequency interleaved hybrid half-bridge circuit comprising a low-frequency branch and a high-frequency branch, characterized in that the low-frequency branch comprises a low-frequency leg (H1) and a main inductance (L1), and the high-frequency branch comprises a high-frequency leg (H2) and a high-frequency inductance (L2);
the main inductor (L1) is connected with the high-frequency inductor (L2) in parallel, and the low-frequency bridge arm (H1) is connected with the high-frequency bridge arm (H2) in parallel;
the low frequency bridge arm (H1) comprises a first low frequency device (SL1) and a second low frequency device (SL 2);
the high-frequency bridge arm (H2) comprises a first high-frequency device (SH1) and a second high-frequency device (SH 2).
2. The dual-frequency interleaved hybrid half-bridge circuit according to claim 1 wherein said first low frequency device (SL1) and/or said second low frequency device (SL2) comprises a silicon-based metal oxide transistor, a silicon-based insulated gate bipolar transistor anti-parallel diode.
3. The dual-frequency interleaved hybrid half-bridge circuit according to claim 2 wherein the first high frequency (SH1) and/or the second high frequency (SH2) comprise silicon-based super junction metal oxide transistors, silicon carbide metal oxide transistors or gallium nitride high electron mobility transistors.
4. A method of power control in a dual frequency interleaved hybrid half bridge circuit according to any of claims 1 to 3, comprising:
reference value I of total currentLrMultiplying by a proportionality coefficient to generate a low-frequency bridge arm by-flow reference value IL1rThe low-frequency bridge arm current reference value I is comparedL1rAnd low-frequency bridge arm current sampling value IL1sComparing to obtain a low-frequency bridge arm control error IL1.errThe low frequency bridge arm control error IL1.errThe control signal duty ratio D of the low-frequency bridge arm is output after being input into the low-frequency current regulatorLObtaining a low-frequency bridge arm switching signal through a PWM (pulse width modulation) module; the power distribution ratio of the low-frequency bridge arm is changed by adjusting the proportionality coefficient, so that the current free distribution of the high-frequency bridge arm and the low-frequency bridge arm is realized; it is composed ofThe total current reference value ILrA total current reference signal to be tracked;
calculating predicted value delta I of low-frequency bridge arm current variation based on model prediction functionL1p(ii) a Wherein the model prediction function is:
in the formula, VABIs the input port voltage, VCBFor the output port voltage, TSHFor a high frequency switching period, L1A low frequency bridge arm inductance; sLFor low frequency bridge arm switching function:
wherein S isL1First low-frequency device, S, being a low-frequency bridge armL2A second low frequency device being a low frequency bridge arm;
reference value I of total currentLrAnd total current sampling value ILsComparing to obtain the total current error IL.errError in total current IL.errPredicted value delta I of current variation of bridge arm in low frequencyL1pAfter comparison, generating a high-frequency bridge arm current control error IL2.errControlling the error I of the high-frequency bridge arm currentL2.errControl signal duty ratio D transmitted to high-frequency current regulator to generate high-frequency bridge armHAnd obtaining a high-frequency bridge arm switching signal through a PWM (pulse width modulation) module.
5. The method of claim 4, wherein a predicted value Δ I of the current variation of the low frequency bridge arm is introduced in each high frequency cycleL1pSo as to compensate the current ripple of the low-frequency bridge arm in real time.
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| CN113541489A (en) * | 2021-07-02 | 2021-10-22 | 燕山大学 | Composite type staggered parallel direct current conversion circuit and control method |
| CN117650711A (en) * | 2023-11-28 | 2024-03-05 | 浙江大学 | Mixed three-level superimposed mixed bridge arm active neutral point clamped converter and modulation method thereof |
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