CN112821369A - Soft start circuit and FPGA system - Google Patents
Soft start circuit and FPGA system Download PDFInfo
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- CN112821369A CN112821369A CN202110218532.2A CN202110218532A CN112821369A CN 112821369 A CN112821369 A CN 112821369A CN 202110218532 A CN202110218532 A CN 202110218532A CN 112821369 A CN112821369 A CN 112821369A
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- filter capacitor
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- 238000012544 monitoring process Methods 0.000 claims abstract description 22
- 239000003990 capacitor Substances 0.000 claims description 40
- 238000001514 detection method Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 abstract description 8
- 230000009286 beneficial effect Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000001914 filtration Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
- H02H9/025—Current limitation using field effect transistors
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Power Conversion In General (AREA)
Abstract
The application discloses soft start circuit, including monitoring module, drive module and locate the first switch on power module and FPGA's the supply path, wherein: the monitoring module is used for monitoring the voltage of the output end of the power supply module and outputting a corresponding control signal according to the voltage; and the driving module is used for adjusting the conduction degree of the first switch according to the control signal so as to adjust the current on the power supply path. The method and the device can reduce the influence of overlarge current of the rear-stage load and pull down the voltage of the front end, and ensure the stability of a power supply loop. The application also discloses an FPGA system, which has the beneficial effects.
Description
Technical Field
The application relates to the field of Field Programmable Gate Array (FPGA), in particular to a soft start circuit and an FPGA system.
Background
At present, the core supply current requirements for chips such as FPGA (Field Programmable Gate Array) are higher and higher, from tens of amperes to hundreds of amperes, and the specific size is related to the clock frequency and the size of the used resources. The large amount of current required to power up the FPGA can cause high load transients on the power supply, resulting in unstable power supply loops.
Therefore, how to provide a solution to the above technical problem is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The application aims at providing a soft start circuit and an FPGA system, which can reduce the influence of overlarge current of a rear-stage load and low voltage of a front-end voltage and ensure the stability of a power supply loop.
In order to solve the technical problem, the present application provides a soft start circuit, including monitoring module, drive module and locate the first switch on power module and FPGA's the supply path, wherein:
the monitoring module is used for monitoring the voltage of the output end of the power supply module and outputting a corresponding control signal according to the voltage;
the driving module is used for adjusting the conducting degree of the first switch according to the control signal so as to adjust the current on the power supply path.
Preferably, the detection module includes a comparator, a non-inverting input terminal of the comparator is connected to the voltage, and an inverting input terminal of the comparator is connected to the reference voltage.
Preferably, the driving module includes a first capacitor, a first resistor, and a second switch, wherein:
the first capacitor is connected with the output end of the power module and the first end of the first switch, the second capacitor is connected with the first resistor and the control end of the first switch, the second resistor is connected with the second switch, the first switch is grounded, and the control end of the second switch is connected with the output end of the detection module.
Preferably, the first switch is a PMOS transistor, and the second switch is an NMOS transistor.
Preferably, the soft start circuit further includes a first filter capacitor, a second filter capacitor and a third filter capacitor, wherein:
the first end of the first filter capacitor is connected with the output end of the power supply module, the second end of the first filter capacitor is grounded, the first end of the second filter capacitor and the first end of the third filter capacitor are both connected with the second end of the first switch, and the second end of the second filter capacitor and the second end of the third filter capacitor are both grounded.
In order to solve the above technical problem, the present application further provides an FPGA system, which includes a power module, an FPGA, and the soft start circuit described in any one of the above.
The application provides a soft start circuit, including monitoring module, drive module and locate the first switch on power module and FPGA's the supply path, wherein: the monitoring module is used for monitoring the voltage of the output end of the power supply module and outputting a corresponding control signal according to the voltage; and the driving module is used for adjusting the conduction degree of the first switch according to the control signal so as to adjust the current on the power supply path.
In practical application, the scheme of the application is adopted, the voltage of the output end of the power supply module is monitored through the monitoring module, so that the conduction degree of the first switch on the power supply path of the power supply module and the FPGA is adjusted, the current on the power supply path is adjusted, the overlarge current of a rear-stage load is reduced, the influence of the voltage of a front end is reduced, and the stability of a power supply loop is ensured.
The application also provides an FPGA system which has the same beneficial effect as the soft start circuit.
Drawings
In order to more clearly illustrate the embodiments of the present application, the drawings needed for the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings can be obtained by those skilled in the art without inventive effort.
Fig. 1 is a schematic structural diagram of a soft start circuit provided in the present application.
Detailed Description
The core of the application is to provide a soft start circuit and an FPGA system, which can reduce the influence of overlarge current of a rear-stage load and low front-end voltage and ensure the stability of a power supply loop.
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a soft start circuit provided in the present application, where the soft start circuit includes a monitoring module, a driving module, and a first switch Q1 disposed on a power supply path of a power module and an FPGA, where:
the monitoring module is used for monitoring the voltage of the output end of the power supply module and outputting a corresponding control signal according to the voltage;
and the driving module is used for adjusting the conduction degree of the first switch Q1 according to the control signal so as to adjust the current on the power supply path.
It can be understood that, when FPGA is powered on, because the required heavy current of FPGA, can draw down power module's output voltage, lead to the unable normal power supply of power module, this application provides a soft start circuit based on this, this soft start circuit includes the monitoring module, the drive module and locate power module and FPGA's the power supply route on first switch Q1, the voltage of monitoring module detection power module's output, give drive module according to the corresponding control signal of the voltage output of output, so that drive module adjusts the conduction degree of first switch Q1, thereby the electric current size on the adjustment power supply route.
In a preferred embodiment, the detection module includes a comparator U1, the non-inverting input terminal of the comparator U1 is connected to the voltage at the output terminal of the power module, and the inverting input terminal of the comparator U1 is connected to the reference voltage. The driving module comprises a first capacitor C1, a first resistor R1 and a second switch Q2, wherein: the first end of the first capacitor C1 is connected to the output end of the power module and the first end of the first switch Q1, the second end of the first capacitor C1 is connected to the first end of the first resistor R1 and the control end of the first switch Q1, the second end of the first resistor R1 is connected to the second end of the second switch Q2, the first end of the second switch Q2 is grounded, and the control end of the second switch Q2 is connected to the output end of the detection module. In a preferred embodiment, the first switch Q1 is a PMOS transistor, and the second switch Q2 is an NMOS transistor.
Specifically, the reference voltage VREF is set first, when the voltage VOUT at the output terminal of the power module is greater than the reference voltage VREF, the comparator U1 outputs a high level, the second switch Q2 is turned on, when the voltage VOUT at the output terminal of the power module is less than the reference voltage VREF, the comparator U1 outputs a low level, and the second switch Q2 is turned off. Meanwhile, when the second switch Q2 is turned on, the first capacitor C1 is charged through the first resistor R1, so that the two ends of the first resistor R1 are at a high level, the turn-on threshold voltage of the first switch Q1 is not reached yet, at this time, the first switch Q1 is turned off, when the charging of the first capacitor C1 is completed, the voltage of the two ends of the first resistor R1 is gradually reduced to 0, the turn-on threshold voltage of the first switch Q1 is met, the first switch Q1 is turned on, the first switch Q1 is turned on from turn-off to semi-conduction to full conduction in the charging process of the first capacitor C1, the influence of overlarge rear-stage load current and reduced front-stage voltage is sequentially reduced, and the stability of a power supply loop is ensured
As a preferred embodiment, the soft start circuit further includes a first filter capacitor C01, a second filter capacitor C02, and a third filter capacitor C03, wherein:
the first end of the first filter capacitor C01 is connected with the output end of the power module, the second end of the first filter capacitor C01 is grounded, the first end of the second filter capacitor C02 and the first end of the third filter capacitor C03 are both connected with the second end of the first switch Q1, and the second end of the second filter capacitor C02 and the second end of the third filter capacitor C03 are both grounded.
The filter capacitor is used for filtering interference in the circuit and ensuring the stability of signal transmission.
The application provides a soft start circuit, including monitoring module, drive module and locate the first switch Q1 on power module and FPGA's the supply path, wherein: the monitoring module is used for monitoring the voltage of the output end of the power supply module and outputting a corresponding control signal according to the voltage; and the driving module is used for adjusting the conduction degree of the first switch Q1 according to the control signal so as to adjust the current on the power supply path.
In practical application, by adopting the scheme of the application, the voltage of the output end of the power supply module is monitored by the monitoring module, so that the conduction degree of the first switch Q1 on the power supply path of the power supply module and the FPGA is adjusted, the current on the power supply path is adjusted, the overlarge current of a rear-stage load is reduced, the influence of the voltage of a front end is reduced, and the stability of a power supply loop is ensured.
In another aspect, the present application further provides an FPGA system, which includes a power module, an FPGA, and the soft start circuit described in any one of the above embodiments.
For introducing the FPGA system provided in the present application, please refer to the above embodiments, which are not described herein again.
The FPGA system has the same beneficial effect as the soft start circuit.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (6)
1. The utility model provides a soft start circuit, its characterized in that includes monitoring module, drive module and locates the first switch on power module and FPGA's the supply path, wherein:
the monitoring module is used for monitoring the voltage of the output end of the power supply module and outputting a corresponding control signal according to the voltage;
the driving module is used for adjusting the conducting degree of the first switch according to the control signal so as to adjust the current on the power supply path.
2. The soft-start circuit of claim 1, wherein the detection module comprises a comparator, a non-inverting input of the comparator is connected to the voltage, and an inverting input of the comparator is connected to a reference voltage.
3. The soft-start circuit of claim 1, wherein the driving module comprises a first capacitor, a first resistor, and a second switch, wherein:
the first capacitor is connected with the output end of the power module and the first end of the first switch, the second capacitor is connected with the first resistor and the control end of the first switch, the second resistor is connected with the second switch, the first switch is grounded, and the control end of the second switch is connected with the output end of the detection module.
4. The soft-start circuit of claim 3, wherein the first switch is a PMOS transistor and the second switch is an NMOS transistor.
5. The soft-start circuit of claim 1, further comprising a first filter capacitor, a second filter capacitor, and a third filter capacitor, wherein:
the first end of the first filter capacitor is connected with the output end of the power supply module, the second end of the first filter capacitor is grounded, the first end of the second filter capacitor and the first end of the third filter capacitor are both connected with the second end of the first switch, and the second end of the second filter capacitor and the second end of the third filter capacitor are both grounded.
6. An FPGA system comprising a power module, an FPGA and the soft start circuit of any one of claims 1-5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110218532.2A CN112821369A (en) | 2021-02-26 | 2021-02-26 | Soft start circuit and FPGA system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110218532.2A CN112821369A (en) | 2021-02-26 | 2021-02-26 | Soft start circuit and FPGA system |
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| Publication Number | Publication Date |
|---|---|
| CN112821369A true CN112821369A (en) | 2021-05-18 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110218532.2A Pending CN112821369A (en) | 2021-02-26 | 2021-02-26 | Soft start circuit and FPGA system |
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| CN (1) | CN112821369A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117220492A (en) * | 2023-11-09 | 2023-12-12 | 荣耀终端有限公司 | Power supply circuit, slow start method thereof and power supply chip |
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| JP2000250643A (en) * | 1999-02-25 | 2000-09-14 | Nec Corp | Rush current prevention circuit |
| CN203984377U (en) * | 2014-05-27 | 2014-12-03 | 广东金莱特电器股份有限公司 | One is with soft start and turn-off switching circuit fast |
| CN104270000A (en) * | 2014-09-10 | 2015-01-07 | 深圳市易联技术有限公司 | Thermal printer power supply soft start system for POS machine |
| CN208174582U (en) * | 2018-03-30 | 2018-11-30 | 歌尔科技有限公司 | A kind of motor soft starting circuit and earphone |
| CN109391137A (en) * | 2018-12-12 | 2019-02-26 | 哈工大机器人（岳阳）军民融合研究院 | Inhibit the soft starting circuit and method of power surge |
| CN212518787U (en) * | 2020-05-06 | 2021-02-09 | 国奥科技(深圳)有限公司 | Power supply soft start circuit with switch and power supply module |
-
2021
- 2021-02-26 CN CN202110218532.2A patent/CN112821369A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000250643A (en) * | 1999-02-25 | 2000-09-14 | Nec Corp | Rush current prevention circuit |
| CN203984377U (en) * | 2014-05-27 | 2014-12-03 | 广东金莱特电器股份有限公司 | One is with soft start and turn-off switching circuit fast |
| CN104270000A (en) * | 2014-09-10 | 2015-01-07 | 深圳市易联技术有限公司 | Thermal printer power supply soft start system for POS machine |
| CN208174582U (en) * | 2018-03-30 | 2018-11-30 | 歌尔科技有限公司 | A kind of motor soft starting circuit and earphone |
| CN109391137A (en) * | 2018-12-12 | 2019-02-26 | 哈工大机器人（岳阳）军民融合研究院 | Inhibit the soft starting circuit and method of power surge |
| CN212518787U (en) * | 2020-05-06 | 2021-02-09 | 国奥科技(深圳)有限公司 | Power supply soft start circuit with switch and power supply module |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117220492A (en) * | 2023-11-09 | 2023-12-12 | 荣耀终端有限公司 | Power supply circuit, slow start method thereof and power supply chip |
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Application publication date: 20210518 |
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