CN112820841A - Display substrate and preparation method thereof - Google Patents
Display substrate and preparation method thereof Download PDFInfo
- Publication number
- CN112820841A CN112820841A CN202110065256.0A CN202110065256A CN112820841A CN 112820841 A CN112820841 A CN 112820841A CN 202110065256 A CN202110065256 A CN 202110065256A CN 112820841 A CN112820841 A CN 112820841A
- Authority
- CN
- China
- Prior art keywords
- layer
- anode
- partition
- display
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/805—Electrodes
- H10K50/81—Anodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/84—Passivation; Containers; Encapsulations
- H10K50/842—Containers
- H10K50/8428—Vertical spacers, e.g. arranged between the sealing arrangement and the OLED
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
Abstract
The invention discloses a display substrate and a preparation method thereof, the display substrate is provided with a hole area, a partition area and a display area, the partition area is at least partially arranged around the hole area, the partition area is positioned between the hole area and the display area, and the display substrate comprises: an array substrate; the device layer is arranged on one side of the array substrate of the display area and comprises an anode layer; the partition parts are arranged on one side of the array substrate of the partition area at intervals and comprise anode material layers, and the anode material layers are made of the same material as the anode layer; and the concave parts are arranged on the array substrate among the partition parts and between the partition parts and the device layer. The anode layer of the device layer is used for realizing the normal display function of the display substrate, and the anode material layer of the partition part is used for blocking water vapor entering the hole region from the outside from invading into the display region.
Description
Technical Field
The invention belongs to the technical field of electronic products, and particularly relates to a display substrate and a preparation method of the display substrate.
Background
With the progress of science and technology, digital display devices such as smart phones and tablet computers are widely used, wherein a display screen is an indispensable interpersonal communication interface of the display devices. Such as an Organic Light Emitting Diode (OLED) display panel, has the advantages of self-luminescence, energy saving, consumption reduction, flexibility, good flexibility, and the like, and the display device for realizing display does not need a backlight source, has the characteristics of high reaction speed and good display effect, is concerned by users, and is widely applied to terminal products such as smart phones, tablet computers, and the like.
In order to improve the screen occupancy, a hole with a relative size is formed in the display screen by laser in the prior art, the hole is suitable for a camera of a mobile phone, but water vapor easily invades into the display screen from the hole to damage the display screen, a partition is formed around an opening hole by an etching process to partition the water vapor in practice, and when the existing partition is formed, the process is complex, the process flows are multiple, and the production cost is high.
Therefore, a new display substrate and a method for manufacturing the display substrate are needed.
Disclosure of Invention
The embodiment of the invention provides a display substrate and a preparation method thereof, wherein an anode material layer which is the same as the anode material layer is used as a partition part, namely the anode layer and the anode material layer can be formed together by adopting the same process, the process is simple, and the production cost is effectively reduced.
In one aspect, an embodiment of the present invention provides a display substrate having a hole region, a partition region and a display region, wherein the partition region at least partially surrounds the hole region, and the partition region is located between the hole region and the display region, the display substrate including: an array substrate; the device layer is positioned in the display area and arranged on one side of the array substrate, and comprises an anode layer; the partition part is positioned in the partition area, is arranged on the array substrate at intervals, and is arranged on the same side of the device layer, the partition part comprises an anode material layer, and the anode material layer and the anode layer are made of the same material; and the concave parts are arranged between the adjacent partition parts and/or between the adjacent partition parts and the device layer on the array substrate.
According to one aspect of the invention, the array substrate comprises a substrate, a pixel circuit, a planarization layer covering the pixel circuit, and a via hole connection layer arranged on one side of the planarization layer, which is far away from the substrate, wherein the anode layer is arranged on one side of the via hole connection layer, which is far away from the substrate, and at least part of the depression part is arranged on the via hole connection layer.
According to one aspect of the invention, the anode layer and the anode material layer are of a single metal layer structure; or the anode layer and the anode material layer comprise a first conducting layer, a second conducting layer and a third conducting layer which are arranged in a stacked mode, wherein the first conducting layer and the third conducting layer are transparent conducting layers; preferably, the first conductive layer is a transparent indium tin oxide layer, the second conductive layer is a silver metal layer, and the third conductive layer is a transparent indium tin oxide layer.
According to one aspect of the invention, the display device further comprises a pixel defining layer, wherein the pixel defining layer at least partially covers the anode layer and the via hole connecting layer of the display area exposed by the anode layer, and the recess is arranged between the pixel defining layer and the partition.
According to one aspect of the invention, the display device further comprises a supporting column, the supporting column is arranged on one side, away from the via hole connecting layer, of the pixel defining layer, and the orthographic projection of the connecting surface of the supporting column and the pixel defining layer on the pixel defining layer covers the orthographic projection of the surface, away from the side of the pixel defining layer, of the supporting part on the pixel defining layer.
According to one aspect of the invention, an orthographic projection of the depression on the via connecting layer and an orthographic projection of the partition on the via connecting layer at least partially coincide; preferably, the recess has a smooth curved surface facing the partition.
In another aspect, an embodiment of the present invention further provides a method for manufacturing a display substrate, including the following steps: providing an array substrate; the anode layer and the anode material layer are positioned on the same side of the array substrate, the anode layer is formed in a display area of a display substrate, and the anode material layer is formed in a partition area of the display substrate; forming a recess on the array substrate, wherein the recess is located between the adjacent partitions and/or between the adjacent partitions and the device layer.
According to another aspect of the present invention, in the forming the recess on the array substrate step: and forming a concave part by etching, wherein the concave part is formed on the via hole connecting layer of the array substrate between the adjacent partition parts and/or the via hole connecting layer between the adjacent partition parts and the device layer.
According to another aspect of the present invention, between the step of simultaneously forming the anode layer of the device layer and the anode material layer of the partition and the step of forming the recess on the array substrate, comprises: forming a pixel defining layer and support posts on the anode layer side facing away from the array substrate; a photoresist is coated on the anode layer exposed by the pixel defining layer and the space between the pixel defining layers.
According to another aspect of the present invention, in the step of forming the recess by etching, the etching uses a dry etching technique or a wet etching technique.
Compared with the prior art, the display substrate provided by the embodiment of the invention is provided with the hole region, the partition region and the display region, and comprises the array substrate, the device layer, the partition portion and the depressed portion, wherein the device layer comprises the anode layer, the partition portion comprises the anode material layer, the anode material layer is made of the same material as the anode layer, namely the anode layer and the anode material layer can be formed together through the same process, the process flow is reduced, and the cost is reduced, the anode layer of the device layer is used for realizing the normal display function of the display substrate, the anode material layer of the partition portion is used for preventing water vapor entering the hole region from the outside from invading into the display region, so as to avoid the water vapor from corroding the device layer and influencing the normal display of the display substrate, and the depressed portion is arranged between the adjacent partition portions and/or on the array substrate between the partition portion and the device layer, so as, the display substrate provided by the embodiment of the invention adopts the anode material layer which is the same as the anode layer material as the partition part, namely, the anode layer and the anode material layer can be formed together by adopting the same process, the process is simple, and the production cost is effectively reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments of the present invention will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a display substrate according to an embodiment of the present invention;
FIG. 2 is a diagram of the structure of the film layer at C-C in FIG. 1;
FIG. 3 is a flow chart of a method for fabricating a display substrate according to an embodiment of the present invention;
fig. 4 is a film structure diagram of a display substrate in a manufacturing process of a method for manufacturing a display substrate according to an embodiment of the present invention;
fig. 5 is a film structure diagram of another display substrate in the manufacturing process of the display substrate manufacturing method according to the embodiment of the invention;
fig. 6 is a film structure diagram of another display substrate in the manufacturing process of the display substrate manufacturing method according to the embodiment of the invention;
fig. 7 is a film structure diagram of another display substrate in the manufacturing process of the display substrate manufacturing method according to the embodiment of the invention;
fig. 8 is a film structure diagram of another display substrate in the manufacturing process of the display substrate manufacturing method according to the embodiment of the present invention.
In the drawings:
1-an array substrate; 11-a via connection layer; 12-a planarization layer; 13-a pixel circuit; 14-a substrate; 2-a device layer; 21-an anode layer; 3-a layer of anode material; 31-a first conductive layer; 32-a second conductive layer; 33-a third conductive layer; 4-a recess; 5-a pixel defining layer; 6-support column; 7-photoresist; AA-display area; a PA-cut-off region; TA-pore region.
Detailed Description
Features and exemplary embodiments of various aspects of the present invention will be described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
For better understanding of the present invention, the following description will be made in detail with reference to fig. 1 to 8 in accordance with an embodiment of the present invention.
Referring to fig. 1 to fig. 3, a display substrate according to an embodiment of the present invention includes a hole area TA, an isolation area PA and a display area AA, wherein the isolation area PA at least partially surrounds the hole area TA, and the isolation area PA is located between the hole area TA and the display area AA, and the display substrate includes: an array substrate 1; the device layer 2 is positioned in the display area AA and arranged on one side of the array substrate 1, and the device layer 2 comprises an anode layer 21; the partition part is positioned in the partition area PA, is arranged on the array substrate 1 at intervals, is arranged on the same side as the device layer 2, and comprises an anode material layer 3, and the material of the anode material layer 3 is the same as that of the anode layer 21; and the concave parts 4 are arranged between the adjacent partition parts and/or on the array substrate 1 between the adjacent partition parts and the device layer 2.
The display substrate provided by the embodiment of the invention is provided with a hole area TA, a partition area PA and a display area AA, and comprises an array substrate 1, a device layer 2, a partition part and a concave part 4, wherein the device layer 2 comprises an anode layer 21, the partition part comprises an anode material layer 3, the material of the anode material layer 3 is the same as that of the anode layer 21, namely, the anode layer 21 and the anode material layer 3 can be formed together by the same process, the process flow is reduced, the cost is reduced, the anode layer 21 of the device layer 2 is used for realizing the normal display function of the display substrate, the anode material layer 3 of the partition part is used for blocking water vapor entering the hole area TA from the outside from invading into the display area AA, the water vapor is prevented from corroding the device layer 2 and influencing the normal display of the display substrate, the concave part 4 is arranged between the adjacent partition parts and/or on the array substrate 1 between the partition part and the device layer 2 and is used for further improving, the display substrate provided by the embodiment of the invention adopts the anode material layer 3 with the same material as the anode layer 21 as the partition part, namely, the anode layer 21 and the anode material layer 3 can be formed together by adopting the same process, the process is simple, and the production cost is effectively reduced.
Note that the aperture area TA of the display substrate is generally used to dispose an optical element such as a camera, and the blocking area PA is disposed around the aperture area TA to block a flow path of moisture entering from the aperture area TA to prevent the moisture from invading into the display area AA.
The depressed part 4 specifically etches a part of the surface of the array substrate 1 facing the partition part downwards by means of etching and the like to form a depressed groove structure, and the encapsulation length of the encapsulation layer in the vertical direction along the display substrate in the subsequent encapsulation process can be increased by arranging the depressed part 4, so that the encapsulation effect of the display substrate is improved.
It is understood that the anode layer 21 and the anode material layer 3 may be formed by a patterned film structure formed by evaporation or the like, and are formed at different positions of the display area AA and the partition area PA of the display substrate. Optionally, the anode layer 21 and the anode material layer 3 may be a single-layer metal layer structure, for example, a metal film layer with good conductivity, such as an aluminum metal layer or a silver metal layer, so as to ensure the working performance of the device layer 2. Of course, the anode layer 21 may also be a multi-layer film structure, specifically, the anode layer 21 includes a first conductive layer 31, a second conductive layer 32, and a third conductive layer 33, which are stacked, where the first conductive layer 31 and the third conductive layer 33 are transparent conductive layers.
The second conductive layer 32 may include Ag or other opaque metal materials, and the second conductive layer 32 is used to increase the reflectivity and improve the light utilization efficiency of the display substrate. The first conductive layer 31 and the third conductive layer 33 may include, for example, indium tin oxide, or zinc oxide. The first conductive layer 31 and the third conductive layer 33 in the anode layer 21 are made of a material having a high work function, which facilitates the injection of holes. Optionally, the reflectivity of the anode layer 21 may be adjusted by adjusting the material of the anode layer 21 and the thickness of each film layer, and the reflectivity of the anode layer 21 may be set to be greater than 80% in this embodiment. The anode layer 21 and the anode material layer 3 can be formed by evaporation, sputtering, vapor deposition, ion beam deposition, electron beam deposition, laser ablation, or the like. Optionally, the first conductive layer 31 is a transparent ito layer, the second conductive layer 32 is a silver metal layer, and the third conductive layer 33 is a transparent ito layer.
Referring to fig. 3, in some optional embodiments, the array substrate 1 includes a substrate 14, a pixel circuit 13, a planarization layer 12 covering the pixel circuit 13, and a via connection layer 11 disposed on a side of the planarization layer away from the substrate 14, the anode layer 21 is disposed on a side of the via connection layer 11 away from the substrate 14, and the recess 4 is at least partially opened on the via connection layer 11.
The anode layer 21 is connected to the pixel circuit 13 through a via hole of the via hole connection layer 11, the pixel circuit 13 generally includes thin film transistors and metal wires arranged in an array, the thin film transistors are connected to the metal wires to drive the light emitting display of the display substrate together, and the material of the via hole connection layer 11 is generally organic. At least part of depressed part 4 is seted up in via hole articulamentum 11, specifically mean, depressed part 4 can only etch partial via hole articulamentum 11 towards one side of device layer 2, can not run through whole via hole articulamentum 11 and extend to other retes of array substrate 1, improves display substrate's structural stability, also can all run through via hole articulamentum 11, and depressed part 4 is seted up to the partial planarization layer 12 of via hole articulamentum 11 below, as long as do not influence display substrate's encapsulation effect can.
In some optional embodiments, the display substrate further includes a pixel defining layer 5, the pixel defining layer 5 at least partially covers the anode layer 21 and the via connecting layer 11 exposed by the anode layer 21, and a recess 4 is disposed between the pixel defining layer 5 and the partition.
It should be noted that a plurality of partition portions are disposed at intervals in the partition area PA, the recessed portions 4 are disposed between the partition portions, and the pixel defining layer 5 at least partially covers the anode layer 21 and the via hole connecting layer 11 exposed by the anode layer 21 to limit the size of the pixel opening of the display substrate.
In some optional embodiments, the display substrate further includes a supporting pillar 6, the supporting pillar 6 is disposed on a side of the pixel defining layer 5 facing away from the via connecting layer 11, and an orthogonal projection of a connecting surface of the supporting pillar 6 and the pixel defining layer 5 on the pixel defining layer 5 covers an orthogonal projection of a surface of the supporting portion on the side facing away from the pixel defining layer 5 on the pixel defining layer 5.
It should be noted that the device layer 2 further includes a light emitting layer and a cathode layer (not shown in the figure) disposed on the anode layer 21, and the support pillars 6 are disposed to prevent the mask from scratching the film structure of the device layer 2 during the evaporation process of the light emitting material, so as to enhance the pressure resistance of the display substrate and maintain the uniformity of the cell thickness of the large-sized display substrate. Optionally, the orthographic projection of the connection surface of the support pillar 6 and the pixel defining layer 5 on the pixel defining layer 5 covers the orthographic projection of the surface of the support pillar 6 on the side away from the pixel defining layer 5 on the pixel defining layer 5, that is, the cross section of the support pillar 6 is trapezoidal or trapezoid-like, so that the cathode layer can be better supported, the continuity of the cathode layer is maintained, and the support pillar 6 can be directly formed by extending the pixel defining layer 5, and can also be formed separately.
Optionally, the orthographic projection of the depression 4 on the via hole connection layer 11 and the orthographic projection of the partition on the via hole connection layer 11 are at least partially overlapped; the recess 4 has a smooth curved surface facing the partition. Specifically, the recessed portion 4 is partially formed in the edge portion where the partition portion contacts the via connection layer 11, so as to facilitate packaging, and optionally, the recessed portion 4 has a smooth curved surface facing the partition portion, that is, the top of the cross section of the recessed portion 4 in the vertical plane of the display substrate is a curve, and the specific shape is determined by an etching process. It should be noted that, the recessed portion 4 and the blocking portion are both disposed annularly around the hole area TA, and the specific shape needs to match the shape of the hole area TA.
Referring to fig. 4 to 8, an embodiment of the invention further provides a method for manufacturing a display substrate, including the following steps:
s110: as shown in fig. 5, an array substrate 1 is provided;
s120: as shown in fig. 5, the anode layer 21 of the synchronization forming device layer 2 and the anode material layer 3 of the partition portion are located on the same side of the array substrate 1, the anode layer 21 is formed in the display area AA of the display substrate, and the anode material layer 3 is formed in the partition area PA of the display substrate;
s130: as shown in fig. 8, the recess 4 is formed on the array substrate 1, and the recess 4 is located between adjacent partitions and/or between adjacent partitions and the device layer 2.
According to the display substrate preparation method provided by the embodiment of the invention, the anode layer 21 of the device layer 2 and the anode material layer 3 of the partition part are synchronously formed on the same side of the array substrate 1, the anode layer 21 is formed in the display area AA of the display substrate, the anode material layer 3 is formed in the partition area PA of the display substrate and is used for realizing normal display of the display substrate, the anode material layer 3 is used as the partition part to realize partition of TA (water vapor) in the hole area, and the process flow is simplified.
In step S110, optionally, the provided array substrate 1 includes a substrate 14, a pixel circuit 13, a planarization layer 12 covering the pixel circuit 13, and a via connection layer 11 disposed on a side of the planarization layer 12 away from the substrate 14, the anode layer 21 is connected to the pixel circuit 13 through a via of the via connection layer 11, and the pixel circuit 13 generally includes a thin film transistor and a metal wire arranged in an array.
In step S120, the anode layer 21 of the device layer 2 and the anode material layer 3 of the partition portion are simultaneously formed through a process such as mask evaporation, that is, the materials used for the anode layer 21 and the anode material layer 3 are completely the same, the anode layer 21 is formed in the display area AA of the display substrate, the anode material layer 3 is formed in the partition area PA of the display substrate, and the anode material layer 3 serves as the partition portion and plays a role of partitioning water vapor.
In step S130, a concave portion 4 may be formed on the via connection layer 11 of the array substrate 1 between the partition portions and between the partition portion and the device layer 2 by an etching process, and at least a portion of the concave portion 4 is opened on the via connection layer 11. The packaging length of the packaging layer in the vertical direction along the display substrate in the subsequent packaging process can be increased by arranging the concave part 4, so that the packaging effect of the display substrate is improved.
Referring to fig. 6 and 7, in some alternative embodiments, between the steps of synchronously forming the anode layer 21 of the device layer 2 and the anode material layer 3 of the partition and forming the recess 4 on the array substrate 1 includes: forming a pixel defining layer 5 and support posts 6 on the anode layer 21 side away from the array substrate 1; a photoresist 7 is coated on the anode layer 21 exposed by the space between the pixel defining layer 5 and the pixel defining layer 5.
It should be noted that the photoresist 7 is coated on the anode layer 21 exposed at the interval between the pixel defining layer 5 and the pixel defining layer 5, that is, the device layer 2, the pixel defining layer 5 and other film layers of the display area AA are protected by the photoresist 7, so as to avoid the film layers of the display area AA from being etched carelessly during etching, in order to form the recess 4, the interval between the partition parts, the via connecting layer 11 exposed at the interval between the partition part and the device layer 2 need to be etched, and after the etching process is completed, the photoresist 7 needs to be stripped so as to avoid the photoresist 7 from affecting the subsequent preparation process of the display substrate, optionally, the photoresist 7 can be stripped by a laser stripping process and other film layers from being damaged.
In some alternative embodiments, in the step of forming the recess 4 by etching, the etching employs a dry etching technique or a wet etching technique.
Note that the dry etching and the wet etching are different in that the wet etching uses a solvent or a solution to perform etching. Wet etching is a pure chemical reaction process, which means that chemical reaction between solution and pre-etching material is used to remove the part not masked by the masking film material for etching purpose. The method has the advantages of good selectivity, good repeatability, high production efficiency, simple equipment and low cost. The dry etching is of various types, including photo-evaporation, gas phase etching, plasma etching, etc. The dry etching has the advantages that: good anisotropy, high selectivity ratio, good controllability, flexibility and repeatability, safe thin line operation, easy realization of automation, no chemical waste liquid, no pollution in the treatment process and high cleanliness. In this embodiment, dry etching or wet etching may be selected according to actual conditions.
As will be apparent to those skilled in the art, for convenience and brevity of description, the specific working processes of the systems, modules and units described above may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again. It should be understood that the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive various equivalent modifications or substitutions within the technical scope of the present invention, and these modifications or substitutions should be covered within the scope of the present invention.
It should also be noted that the exemplary embodiments mentioned in this patent describe some methods or systems based on a series of steps or devices. However, the present invention is not limited to the order of the above-described steps, that is, the steps may be performed in the order mentioned in the embodiments, may be performed in an order different from the order in the embodiments, or may be performed simultaneously.
Claims (10)
1. A display substrate having an aperture region, a blocking region disposed at least partially around the aperture region, and a display region, the blocking region being located between the aperture region and the display region, the display substrate comprising:
an array substrate;
the device layer is positioned in the display area and arranged on one side of the array substrate, and comprises an anode layer;
the partition part is positioned in the partition area, is arranged on the array substrate at intervals, and is arranged on the same side as the device layer, the partition part comprises an anode material layer, and the anode material layer is made of the same material as the anode layer;
and the concave parts are arranged between the adjacent partition parts and/or between the adjacent partition parts and the device layer on the array substrate.
2. The display substrate according to claim 1, wherein the array substrate comprises a substrate, a pixel circuit, a planarization layer covering the pixel circuit, and a via connection layer disposed on a side of the planarization layer facing away from the substrate, the anode layer is disposed on a side of the via connection layer facing away from the substrate, and the recess is at least partially opened on the via connection layer.
3. The display substrate of claim 1, wherein the anode layer and the anode material layer are a single metal layer structure; alternatively, the first and second electrodes may be,
the anode layer and the anode material layer comprise a first conducting layer, a second conducting layer and a third conducting layer which are arranged in a stacked mode, wherein the first conducting layer and the third conducting layer are transparent conducting layers;
preferably, the first conductive layer is a transparent indium tin oxide layer, the second conductive layer is a silver metal layer, and the third conductive layer is a transparent indium tin oxide layer.
4. The display substrate according to claim 2, further comprising a pixel defining layer at least partially covering the anode layer and the via connecting layer of the display region exposed by the anode layer, wherein the recess is disposed between the pixel defining layer and the partition.
5. The display substrate according to claim 4, further comprising a supporting pillar, wherein the supporting pillar is disposed on a side of the pixel defining layer facing away from the via connecting layer, and an orthogonal projection of a connecting surface of the supporting pillar and the pixel defining layer on the pixel defining layer covers an orthogonal projection of a surface of the supporting portion on the side facing away from the pixel defining layer on the pixel defining layer.
6. The display substrate of claim 2, wherein an orthographic projection of the depression on the via connection layer and an orthographic projection of the partition on the via connection layer at least partially coincide;
preferably, the recess has a smooth curved surface facing the partition.
7. A preparation method of a display substrate is characterized by comprising the following steps:
providing an array substrate;
the anode layer and the anode material layer are positioned on the same side of the array substrate, the anode layer is formed in a display area of a display substrate, and the anode material layer is formed in a partition area of the display substrate;
forming a recess on the array substrate, wherein the recess is located between the adjacent partitions and/or between the adjacent partitions and the device layer.
8. The method for manufacturing a display substrate according to claim 7, wherein in the step of forming the recess on the array substrate:
and forming a concave part by etching, wherein the concave part is formed on the via hole connecting layer of the array substrate between the adjacent partition parts and/or the via hole connecting layer between the adjacent partition parts and the device layer.
9. The method for manufacturing a display substrate according to claim 8, wherein the step of simultaneously forming an anode layer of the device layer and an anode material layer of the partition and forming the recess on the array substrate comprises:
forming a pixel defining layer and support posts on the anode layer side facing away from the array substrate;
a photoresist is coated on the anode layer exposed by the pixel defining layer and the space between the pixel defining layers.
10. The method for manufacturing a display substrate according to claim 8, wherein in the step of forming the recess by etching, the etching employs a dry etching technique or a wet etching technique.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110065256.0A CN112820841B (en) | 2021-01-18 | 2021-01-18 | Display substrate and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110065256.0A CN112820841B (en) | 2021-01-18 | 2021-01-18 | Display substrate and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112820841A true CN112820841A (en) | 2021-05-18 |
| CN112820841B CN112820841B (en) | 2022-06-21 |
Family
ID=75870101
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110065256.0A Active CN112820841B (en) | 2021-01-18 | 2021-01-18 | Display substrate and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112820841B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113488604A (en) * | 2021-07-12 | 2021-10-08 | 昆山梦显电子科技有限公司 | Micro display and manufacturing method thereof |
| CN113488511A (en) * | 2021-06-22 | 2021-10-08 | 深圳市华星光电半导体显示技术有限公司 | Array substrate |
| WO2023245599A1 (en) * | 2022-06-24 | 2023-12-28 | 京东方科技集团股份有限公司 | Display panel and preparation method therefor, and display apparatus |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018194815A (en) * | 2017-05-16 | 2018-12-06 | 株式会社ジャパンディスプレイ | Display and sensor device |
| CN110164916A (en) * | 2018-12-05 | 2019-08-23 | 京东方科技集团股份有限公司 | Display panel, display equipment and the method for manufacturing display panel |
| CN110416434A (en) * | 2019-08-06 | 2019-11-05 | 京东方科技集团股份有限公司 | Display base plate and preparation method thereof, display device |
| CN110518046A (en) * | 2019-08-30 | 2019-11-29 | 云谷（固安）科技有限公司 | A kind of display panel and display device |
| CN110890481A (en) * | 2019-11-29 | 2020-03-17 | 京东方科技集团股份有限公司 | Display substrate, preparation method thereof and display device |
| CN111180496A (en) * | 2020-01-06 | 2020-05-19 | 京东方科技集团股份有限公司 | Display substrate, preparation method thereof, display panel and display device |
| CN111293148A (en) * | 2020-02-20 | 2020-06-16 | 绵阳京东方光电科技有限公司 | Display device, display panel and manufacturing method thereof |
| US20200365825A1 (en) * | 2019-05-13 | 2020-11-19 | Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Oled display panel and manufacturing method thereof |
| CN112071889A (en) * | 2020-09-18 | 2020-12-11 | 京东方科技集团股份有限公司 | Array substrate, display device and manufacturing method |
| KR20210001055A (en) * | 2019-06-26 | 2021-01-06 | 엘지디스플레이 주식회사 | Display device and method for manufacturing of the same |
-
2021
- 2021-01-18 CN CN202110065256.0A patent/CN112820841B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018194815A (en) * | 2017-05-16 | 2018-12-06 | 株式会社ジャパンディスプレイ | Display and sensor device |
| CN110164916A (en) * | 2018-12-05 | 2019-08-23 | 京东方科技集团股份有限公司 | Display panel, display equipment and the method for manufacturing display panel |
| US20200365825A1 (en) * | 2019-05-13 | 2020-11-19 | Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Oled display panel and manufacturing method thereof |
| KR20210001055A (en) * | 2019-06-26 | 2021-01-06 | 엘지디스플레이 주식회사 | Display device and method for manufacturing of the same |
| CN110416434A (en) * | 2019-08-06 | 2019-11-05 | 京东方科技集团股份有限公司 | Display base plate and preparation method thereof, display device |
| CN110518046A (en) * | 2019-08-30 | 2019-11-29 | 云谷（固安）科技有限公司 | A kind of display panel and display device |
| CN110890481A (en) * | 2019-11-29 | 2020-03-17 | 京东方科技集团股份有限公司 | Display substrate, preparation method thereof and display device |
| CN111180496A (en) * | 2020-01-06 | 2020-05-19 | 京东方科技集团股份有限公司 | Display substrate, preparation method thereof, display panel and display device |
| CN111293148A (en) * | 2020-02-20 | 2020-06-16 | 绵阳京东方光电科技有限公司 | Display device, display panel and manufacturing method thereof |
| CN112071889A (en) * | 2020-09-18 | 2020-12-11 | 京东方科技集团股份有限公司 | Array substrate, display device and manufacturing method |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113488511A (en) * | 2021-06-22 | 2021-10-08 | 深圳市华星光电半导体显示技术有限公司 | Array substrate |
| CN113488604A (en) * | 2021-07-12 | 2021-10-08 | 昆山梦显电子科技有限公司 | Micro display and manufacturing method thereof |
| CN113488604B (en) * | 2021-07-12 | 2024-02-02 | 昆山梦显电子科技有限公司 | Micro display and manufacturing method thereof |
| WO2023245599A1 (en) * | 2022-06-24 | 2023-12-28 | 京东方科技集团股份有限公司 | Display panel and preparation method therefor, and display apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112820841B (en) | 2022-06-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112820841B (en) | Display substrate and preparation method thereof | |
| US11133369B2 (en) | Flexible display panel and manufacturing method thereof | |
| CN109360900B (en) | Display panel and manufacturing method thereof | |
| US11257957B2 (en) | Thin film transistor, method of fabricating the same, array substrate and display device | |
| CN110416269B (en) | Display panel and manufacturing method thereof | |
| US20220407023A1 (en) | Stretchable display panel and method for manufacturing same, and display device | |
| EP3333922B1 (en) | Organic luminescence unit and manufacturing method therefor | |
| US9929183B2 (en) | Array substrate, manufacturing method of array substrate and display device | |
| US10396209B2 (en) | Thin film transistor comprising light shielding layers, array substrate and manufacturing processes of them | |
| EP2709159B1 (en) | Fabricating method of thin film transistor, fabricating method of array substrate and display device | |
| US11882716B2 (en) | Display panel, method for manufacturing same, and display apparatus | |
| CN111508976A (en) | Substrate, preparation method thereof and display device | |
| CN103489874B (en) | Array base palte and preparation method thereof, display unit | |
| CN110299322B (en) | Display substrate, manufacturing method thereof and display device | |
| CN112820741B (en) | Display substrate and preparation method thereof | |
| CN111293155B (en) | Display substrate, preparation method thereof and display device | |
| CN111276636B (en) | Organic light emitting diode display and method of manufacturing the same | |
| CN112802799A (en) | Preparation method of display panel, display panel and display device | |
| CN108198819B (en) | Array substrate and preparation method thereof | |
| JP2006002243A (en) | Mask, method for producing mask, film deposition method, electronic device and electronic equipment | |
| CN115224219A (en) | Display panel, display panel preparation method and display device | |
| US20240016017A1 (en) | Display panel and method for manufacturing same | |
| US11737303B2 (en) | Organic light-emitting diode display substrate and manufacturing method thereof, display device | |
| US7580087B2 (en) | Method for manufacturing pixel structure | |
| CN113571587B (en) | Array substrate, display panel and manufacturing method of array substrate |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |