CN112820785A - Solar cell chip and manufacturing method thereof - Google Patents
Solar cell chip and manufacturing method thereof Download PDFInfo
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- CN112820785A CN112820785A CN202011586812.0A CN202011586812A CN112820785A CN 112820785 A CN112820785 A CN 112820785A CN 202011586812 A CN202011586812 A CN 202011586812A CN 112820785 A CN112820785 A CN 112820785A
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- 239000010410 layer Substances 0.000 claims abstract description 132
- 239000002346 layers by function Substances 0.000 claims abstract description 39
- 238000005530 etching Methods 0.000 claims description 36
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- 239000004065 semiconductor Substances 0.000 claims description 8
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 claims description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 6
- 238000000227 grinding Methods 0.000 claims description 6
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- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims description 5
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- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 3
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- 238000000137 annealing Methods 0.000 claims description 3
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- 239000011259 mixed solution Substances 0.000 claims description 3
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- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
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Abstract
The invention discloses a solar cell chip and a manufacturing method thereof, and the solar cell chip comprises a front electrode layer, a solar functional layer, a germanium substrate and a back electrode layer which are sequentially stacked, wherein the back electrode layer is provided with an upper edge part at the edge of the germanium substrate, the upper edge part extends to the side surface of the germanium substrate and covers the side surface of the germanium substrate, and the upper edge part covers the side surface of the germanium substrate, so that the thickness of the germanium substrate can be reduced, the weight is reduced, the back electrode layer can compensate the mechanical strength lost due to the reduction of the thickness of the germanium substrate, and can protect the germanium substrate, the germanium substrate is not easy to directly impact with external articles, the germanium substrate is not easy to wear, and the fragment rate of the germanium substrate is reduced.
Description
Technical Field
The invention relates to the technical field of solar cells, in particular to a solar cell chip and a manufacturing method thereof.
Background
The existing III-V compound multi-junction solar cell needs to sequentially generate a solar functional layer, a front electrode layer and the like on a germanium substrate during production and manufacturing, and a back electrode layer is paved at the bottom of the germanium substrate.
Therefore, the current popular development direction of the iii-v compound multi-junction solar cell is to thin the germanium substrate, but when the germanium substrate is thinned, the protection level of the solar functional layer is reduced, the germanium substrate is not enough to provide enough mechanical strength for the solar cell, and in the production process and the subsequent application process, when the side surface of the germanium substrate is subjected to the external stress, the germanium substrate and the solar functional layer are impacted, and when the germanium substrate is worn, the problem of leakage of the PN junction of the solar functional layer from the germanium substrate is easily caused.
The existing production process solves the problems that the solar cell structure is complex, the process is multiple, and the efficiency is low during batch production.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. Therefore, the invention provides a solar cell chip, which reduces the thickness of a substrate, reduces the weight and maintains the mechanical strength required by the solar cell chip.
The invention also provides a manufacturing method of the solar cell chip, which reduces the thickness of the substrate and improves the production efficiency and the yield.
The solar cell chip comprises a front electrode layer, a solar functional layer, a germanium substrate and a back electrode layer which are sequentially stacked, wherein the back electrode layer is provided with an upper edge part at the edge of the germanium substrate, and the upper edge part extends to the side surface of the germanium substrate and wraps the side surface of the germanium substrate.
The solar cell chip provided by the embodiment of the invention at least has the following beneficial effects:
according to the solar cell chip, the upper edge part extends from the back electrode layer, and the side surface of the germanium substrate is coated with the upper edge part, so that the thickness of the germanium substrate can be reduced, the weight is reduced, the back electrode layer can compensate mechanical strength lost due to the reduction of the thickness of the germanium substrate, the germanium substrate can be protected, the germanium substrate is not easy to directly collide with external articles, the germanium substrate is not easy to wear, and the fragment rate of the germanium substrate is reduced.
According to some embodiments of the invention, a first curved transition surface is disposed between the bottom surface of the back electrode and the outer surface of the top edge portion.
According to some embodiments of the invention a second curved transition surface is provided between a bottom surface of the germanium substrate and a side surface of the germanium substrate.
According to some embodiments of the present invention, the solar cell further includes an antireflection dielectric layer and an ohmic contact layer, the antireflection dielectric layer is disposed on the solar functional layer, the front electrode is disposed on the antireflection dielectric layer, an opening is disposed on the antireflection dielectric layer, and the ohmic contact layer is disposed at the opening to be respectively in conductive connection with the front electrode and the solar functional layer.
According to some embodiments of the invention, the solar functional layer comprises a GaInP subcell, a first tunnel junction, an InGaAs subcell, a second tunnel junction, and an n-type germanium semiconductor layer stacked in sequence, the n-type germanium semiconductor layer is stacked on the germanium substrate, and the anti-reflection medium layer and the ohmic contact layer are stacked on the GaInP subcell.
According to the second aspect of the invention, the method for manufacturing the solar cell chip comprises the following steps:
s1, sequentially generating a solar functional layer and a front electrode layer on the germanium substrate to form a primary battery finished product;
s2, etching the battery primary product from the side provided with the front electrode layer to the side provided with the germanium substrate to form a plurality of etching grooves, wherein the etching grooves extend to the germanium substrate and form a preset depth on the germanium substrate, and the etching grooves separate the battery primary product to form a plurality of chip primary products;
s3, coating an adhesive layer on the etched battery primary product, so that the adhesive layer covers the front electrode layer, the solar functional layer and part of the side surface of the germanium substrate, and adhering the battery primary product on a temporary substrate through the adhesive layer;
s4, processing the germanium substrate to reduce the thickness of the germanium substrate until the adhesive layer in the etching groove is exposed, so that the etching groove divides the battery primary finished product into a plurality of chip primary finished products;
s5, removing part of the adhesive layer on the battery primary product from the side where the germanium substrate is arranged, so that the germanium substrate protrudes out of the surface of the adhesive layer;
s6, evaporating a back electrode layer on the primary battery finished product from the side where the germanium substrate is arranged, so that the back electrode layer covers the exposed surface of the germanium substrate;
s7, removing the bonding layer and the temporary substrate;
and S8, breaking the back electrode layer at the etching grooves to form a plurality of solar cell chips.
The manufacturing method of the solar cell chip according to the embodiment of the invention at least has the following beneficial effects:
the invention relates to a method for manufacturing a solar cell chip, which is based on the reduction of the thickness of a germanium substrate and the improvement of the mass production efficiency, a solar functional layer and a front electrode layer are sequentially generated on the germanium substrate, a plurality of etching grooves are formed by etching from the surface provided with the front electrode layer to the surface provided with the germanium substrate, a plurality of areas of a plurality of chip primary finished products can be divided and defined on a cell primary finished product through the etching grooves, a bonding layer covers partial side surfaces of the front electrode layer, the solar functional layer and the germanium substrate and is connected with a temporary substrate, the temporary substrate plays a supporting role on the cell primary finished product in the subsequent step, the bonding layer plays a protecting role on the front electrode layer, the solar functional layer and partial side surfaces of the germanium substrate, then the germanium substrate can be reduced until the bonding layer in the etching grooves is exposed, and then the bonding layer can be processed according to the height of the required back electrode layer covering the side surfaces, the method comprises the steps of removing part of a bonding layer, evaporating a back electrode layer, coating the bottom surface of a germanium substrate and the side surface of the germanium substrate by the back electrode layer, removing the bonding layer and a temporary substrate, and cutting off the back electrode layer from a position located in an etching groove to obtain a plurality of solar cell chips.
According to some embodiments of the invention, further comprising the step of: and S9, annealing the solar cell chip to enable the front electrode layer to be in fusion contact with the solar functional layer to form an ohmic contact layer.
According to some embodiments of the present invention, in S8, the back electrode layer located at the etch groove is ground to break the back electrode layer, and the back electrode layer is formed with an upper edge portion at an edge of the germanium substrate, and a first arc-shaped transition surface is formed between a bottom surface of the back electrode and an outer surface of the upper edge portion by grinding.
According to some embodiments of the invention, in S5, the germanium substrate protruding from the surface of the adhesion layer is etched by using a mixed solution of nitric acid, hydrofluoric acid and glacial acetic acid, so that a second arc-shaped transition surface is disposed between the bottom surface of the germanium substrate and the side surface of the germanium substrate.
According to some embodiments of the invention, the adhesive layer is a paraffin material, and the adhesive layer and the temporary substrate are removed using a paraffin removal solution in S7.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a schematic cross-sectional view of a solar cell chip according to an embodiment of the present invention;
FIG. 2 is a flow chart of a process for fabricating a solar cell chip according to an embodiment of the invention;
FIG. 3 is a cross-sectional view of the solar cell chip at step S1 in the manufacturing process according to the embodiment of the invention;
fig. 4 is a schematic diagram of a state of the solar cell chip in step S2 in the manufacturing process according to the embodiment of the invention;
fig. 5 is a schematic view of another state of the solar cell chip in step S2 in the manufacturing process according to the embodiment of the invention;
fig. 6 is a schematic cross-sectional view of the solar cell chip of step S4 in the manufacturing process according to the embodiment of the invention;
fig. 7 is a schematic cross-sectional view of the solar cell chip of step S5 in the manufacturing process according to the embodiment of the invention;
fig. 8 is a schematic cross-sectional view illustrating the state of the solar cell chip of step S6 in the manufacturing process according to the embodiment of the invention;
fig. 9 is a cross-sectional view illustrating the state of the solar cell chip in step S8 in the manufacturing process according to the embodiment of the invention.
Reference numerals:
the solar cell comprises a front electrode layer 100, a solar functional layer 200, a GaInP sub-cell 210, a first tunnel junction 220, an InGaAs sub-cell 230, a second tunnel junction 240, an n-type germanium semiconductor layer 250, a germanium substrate 300, a second arc transition surface 310, a back electrode layer 400, an upper edge portion 410, a first arc transition surface 420, an antireflection dielectric layer 500, an ohmic contact layer 600, an etching groove 700, an adhesive layer 800 and a temporary substrate 900.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, it is to be understood that the positional or orientational descriptions referred to, for example, the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., are based on the positional or orientational relationships shown in the drawings and are for convenience of description and simplicity of description only, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention.
In the description of the present invention, the meaning of a plurality of means is one or more, the meaning of a plurality of means is two or more, and larger, smaller, larger, etc. are understood as excluding the number, and larger, smaller, inner, etc. are understood as including the number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, it should be noted that unless otherwise explicitly stated or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
As shown in fig. 1 to 9, a solar cell chip according to an embodiment of the first aspect of the invention includes a front electrode layer 100, a solar functional layer 200, a germanium substrate 300, and a back electrode layer 400 stacked in this order, where the back electrode layer 400 is provided with an upper edge portion 410 at an edge of the germanium substrate 300, and the upper edge portion 410 extends to a side surface of the germanium substrate 300 and wraps a side surface of the germanium substrate 300.
The top edge portion 410 and the back electrode layer 400 may be integrally provided, the top edge portion 410 may be annularly formed to cover each side surface of the germanium substrate 300, the top edge portion 410 may cover the side surface of the germanium substrate 300 completely or at a certain height, and the front electrode layer 100 and the back electrode layer 400 may be made of a metal material such as Pd, Ag, or Au or an alloy made of a plurality of metal materials, and have higher mechanical strength than the germanium substrate 300.
According to the solar cell chip, the upper edge part 410 extends from the back electrode layer 400, and the side surface of the germanium substrate 300 is covered by the upper edge part 410, so that the thickness of the germanium substrate 300 can be reduced, the weight is reduced, the back electrode layer 400 can compensate the mechanical strength which is lost due to the reduction of the thickness of the germanium substrate 300, the germanium substrate 300 can be protected, the germanium substrate 300 is not easy to directly collide with external articles, the germanium substrate 300 is not easy to wear, and the breakage rate of the germanium substrate 300 is reduced.
In some embodiments of the present invention, the solar cell chip further includes an anti-reflection dielectric layer 500 and an ohmic contact layer 600, the anti-reflection dielectric layer 500 is disposed on the solar functional layer 200, the front electrode is disposed on the anti-reflection dielectric layer 500, an opening is disposed on the anti-reflection dielectric layer 500, and the ohmic contact layer 600 is disposed at the opening to be respectively electrically connected to the front electrode and the solar functional layer 200.
The antireflection dielectric layer 500 can reduce the light reflection capability of the solar functional layer 200, thereby improving the light conversion efficiency.
Specifically, as shown in fig. 1, the solar functional layer 200 includes a GaInP subcell 210, a first tunnel junction 220, an InGaAs subcell 230, a second tunnel junction 240, and an n-type germanium semiconductor layer 250, which are sequentially stacked, the n-type germanium semiconductor layer 250 is stacked on a germanium substrate 300, and an anti-reflection dielectric layer 500 and an ohmic contact layer 600 are stacked on the GaInP subcell 210.
In some embodiments of the present invention, a first arc-shaped transition surface 420 is disposed between the bottom surface of the back electrode and the outer surface of the upper edge portion 410, the first arc-shaped transition surface 420 can reduce stress applied after an external object contacts the solar cell chip, and further, the arc radius of the first arc-shaped transition surface 420 is not less than 2 μm, which can reduce abrasion of the germanium substrate 300 caused by the stress.
In some embodiments of the present invention, a second arc-shaped transition surface 310 is disposed between the bottom surface of the germanium substrate 300 and the side surface of the germanium substrate 300, and likewise, the second arc-shaped transition surface 310 can reduce the stress applied to the germanium substrate 300 by the back electrode, and reduce the wear of the germanium substrate 300 itself.
The method for manufacturing the solar cell chip according to the embodiment of the second aspect of the invention, as shown in fig. 1 to 9, includes the following steps:
s1, sequentially generating a solar functional layer 200 and a front electrode layer 100 on the germanium substrate 300 to form a primary battery finished product;
s2, etching the front electrode layer 100 on the primary battery product to the germanium substrate 300 to form a plurality of etching grooves 700, the etching grooves 700 extending to the germanium substrate 300 and forming a predetermined depth on the germanium substrate 300, the etching grooves 700 dividing the primary battery product into a plurality of primary chip products;
s3, coating the adhesive layer 800 on the etched cell primary product, so that the adhesive layer 800 covers the front electrode layer 100, the solar functional layer 200 and a part of the side surface of the germanium substrate 300, and adhering the cell primary product on the temporary substrate 900 through the adhesive layer 800;
s4, processing the germanium substrate 300 to reduce the thickness of the germanium substrate 300 until the adhesive layer 800 in the etching bath 700 is exposed, so that the etching bath 700 separates the cell primary product into a plurality of chip primary products;
s5, removing part of the adhesive layer 800 from one side of the battery primary finished product, where the germanium substrate 300 is arranged, so that the germanium substrate 300 protrudes out of the surface of the adhesive layer 800;
s6, evaporating a back electrode layer 400 on the primary battery finished product from the side where the germanium substrate 300 is arranged, so that the back electrode layer 400 covers the exposed surface of the germanium substrate 300;
s7, removing the adhesive layer 800 and the temporary substrate 900;
s8, the back electrode layer 400 at the etch bath 700 is cut off to form a plurality of solar cell chips.
The manufacturing method of the solar cell chip is based on the reduction of the thickness of the germanium substrate 300 and the improvement of the mass production efficiency;
in step S1, as shown in fig. 3, the solar functional layer 200 and the front electrode layer 100 are sequentially formed on the germanium substrate 300, and the germanium substrate 300 has a certain thickness at this time due to the preparation requirement, specifically, the solar functional layer 200 sequentially includes an n-type germanium semiconductor layer 250, a first tunnel junction 220, an InGaAs sub-cell 230, a second tunnel junction 240 and a GaInP sub-cell 210 from the germanium substrate 300 to the front electrode layer 100.
In step S2, as shown in fig. 4, etching is performed from the side where the front electrode layer 100 is disposed toward the side where the germanium substrate 300 is disposed to form a plurality of etch grooves 700, the regions defining the plurality of chip preforms may be divided on the battery preform by the etching grooves 700, and, in particular, the etch bath 700 may be formed using an ICP dry etching method, and further, as shown in fig. 5, after the depth of the etch bath 700 reaches the germanium substrate 300, the width of the etch bath 700 may be narrowed and continue to extend toward the germanium substrate 300 to a predetermined depth, which may be, for example, after the depth of the etching groove 700 reaches the germanium substrate 300, the etching groove 700 can be cut to extend towards the germanium substrate 300, at this time, the battery primary product can be divided into different areas, thereby facilitating the formation of a plurality of chip preforms at a later stage, and making the distance between the edge of the germanium substrate 300 and the edge of the solar functional layer 200 to be 3 μm-50 μm by narrowing the etch bath 700.
In step S3, as shown in fig. 6, an adhesive layer 800 is coated on a surface of the cell blank provided with the etching grooves 700, so that the adhesive layer 800 covers partial side surfaces of the front electrode layer 100, the solar functional layer 200, and the germanium substrate 300, and is connected to the temporary substrate 900, in the subsequent step, the temporary substrate 900 supports the cell blank for processing, and the adhesive layer 800 protects the front electrode layer 100, the solar functional layer 200, and a partial side surface of the germanium substrate 300, specifically, the adhesive layer 800 may be a paraffin material, which has certain flexibility and is not easily damaged by the front electrode layer 100, the solar functional layer 200, and the germanium substrate 300, and the paraffin material is easily removed at a later stage, and the temporary substrate 900 may be a glass plate.
In step S4, as shown in fig. 6, the germanium substrate 300 is then disposed on the side of the cell blank, and the plane of the germanium substrate 300 may be thinned by grinding until the adhesive layer 800 in the etching bath 700 is exposed.
In step S5, as shown in fig. 7, the adhesion layer 800 may be processed according to the height of the back electrode layer 400 covering the side of the germanium substrate 300, and a portion of the adhesion layer 800 may be removed, so that the germanium substrate 300 protrudes from the surface of the adhesion layer 800, where the adhesion layer 800 may be very easily removed by grinding or the like, since the adhesion layer 800 may be a paraffin material.
In some embodiments of the present invention, in step S5, the germanium substrate 300 protruding from the surface of the adhesion layer 800 is etched using a mixed solution of nitric acid, hydrofluoric acid and glacial acetic acid to further reduce the thickness of the germanium substrate 300, and at the same time, due to the anisotropy of the wet etching, the right-angled portion between the bottom surface of the germanium substrate 300 and the side surface of the germanium substrate 300 is also etched to form the second arc-shaped transition surface 310.
In step S6, as shown in fig. 8, the back electrode layer 400 is deposited, the back electrode layer 400 may be made of a metal material selected from Pd, Ag, and Au, or an alloy of multiple metal materials, and the germanium substrate 300 protrudes from the surface of the adhesion layer 800, so that the back electrode layer 400 covers both the bottom surface of the germanium substrate 300 and the side surface of the germanium substrate 300, specifically the height of the side surface, and is determined by the height of the adhesion layer 800 protruding from the surface of the germanium substrate 300 after removing part of the adhesion layer 800 in step S5.
In step S7, the adhesive layer 800 and the temporary substrate 900 are removed, in some embodiments of the present invention, the adhesive layer 800 is a paraffin material, and in S7, the adhesive layer 800 and the temporary substrate 900 can be removed by using a wax removing solution, and since the temporary substrate 900 is adhered to the solar cell chip through the adhesive layer 800, the temporary substrate 900 may be peeled off while the adhesive layer 800 is removed.
In step S8, as shown in fig. 9, after step S7, every two adjacent solar cell chips are connected to each other only by the back surface electrode layer 400, and the back surface electrode layer 400 is cut from the etching groove 700, so as to obtain a plurality of solar cell chips, meanwhile, in some embodiments of the present invention, the back surface electrode layer 400 located at the etching groove 700 may be cut by grinding, and the back surface electrode layer 400 is formed with an upper edge portion 410 at the edge of the germanium substrate 300, and a first arc-shaped transition surface 420 is formed between the bottom surface of the back surface electrode and the outer surface of the upper edge portion 410 by grinding.
The design can be used for producing solar cell chips in batches, the back electrodes are wrapped on the bottom surface and the side surfaces of the germanium substrate 300, the germanium substrate 300 with a certain thickness is required when the solar functional layer 200 is generated, the germanium substrate 300 can be thinned in the process, the back electrode layer 400 can compensate the mechanical strength lost due to the thinning of the thickness of the germanium substrate 300, the germanium substrate 300 can be protected, and the production efficiency and the yield are improved.
In some embodiments of the invention, further comprising the step of: s9, annealing the solar cell chip at a high temperature of 300-400 ℃ to enable the front electrode layer 100 to be in fusion contact with the solar functional layer 200 to form an ohmic contact layer 600, and further covering the surface of the solar functional layer 200 with an antireflection medium layer 500.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
While embodiments of the invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
Claims (10)
1. The solar cell chip is characterized by comprising a front electrode layer, a solar functional layer, a germanium substrate and a back electrode layer which are sequentially stacked, wherein an upper edge part is arranged on the edge of the germanium substrate of the back electrode layer, and the upper edge part extends to the side face of the germanium substrate and wraps the side face of the germanium substrate.
2. The solar cell chip according to claim 1, wherein: a first arc-shaped transition surface is arranged between the bottom surface of the back electrode and the outer surface of the upper edge portion.
3. The solar cell chip according to claim 1, wherein: and a second arc-shaped transition surface is arranged between the bottom surface of the germanium substrate and the side surface of the germanium substrate.
4. The solar cell chip according to claim 1, wherein: still include and subtract reflection dielectric layer and ohmic contact layer, it sets up to subtract reflection dielectric layer on the solar energy functional layer, the front electrode sets up on subtracting reflection dielectric layer, be provided with the opening on subtracting reflection dielectric layer, ohmic contact layer sets up opening department respectively with front electrode and solar energy functional layer conductive connection.
5. The solar cell chip according to claim 4, wherein: the solar energy functional layer comprises a GaInP sub-cell, a first tunneling junction, an InGaAs sub-cell, a second tunneling junction and an n-type germanium semiconductor layer which are sequentially stacked, the n-type germanium semiconductor layer is stacked on the germanium substrate, and the antireflection dielectric layer and the ohmic contact layer are stacked on the GaInP sub-cell.
6. A manufacturing method of a solar cell chip is characterized by comprising the following steps:
s1, sequentially generating a solar functional layer and a front electrode layer on the germanium substrate to form a primary battery finished product;
s2, etching the battery primary product from the side provided with the front electrode layer to the side provided with the germanium substrate to form a plurality of etching grooves, wherein the etching grooves extend to the germanium substrate and form a preset depth on the germanium substrate, and the etching grooves divide the battery primary product to form a plurality of chip primary products;
s3, coating an adhesive layer on the etched battery primary product, so that the adhesive layer covers the front electrode layer, the solar functional layer and part of the side surface of the germanium substrate, and adhering the battery primary product on a temporary substrate through the adhesive layer;
s4, processing the germanium substrate to reduce the thickness of the germanium substrate until the adhesive layer in the etching groove is exposed, so that the etching groove separates the battery primary finished product into a plurality of chip primary finished products;
s5, removing part of the adhesive layer on the battery primary product from the side where the germanium substrate is arranged, so that the germanium substrate protrudes out of the surface of the adhesive layer;
s6, evaporating a back electrode layer on the primary battery finished product from the side where the germanium substrate is arranged, so that the back electrode layer covers the exposed surface of the germanium substrate;
s7, removing the bonding layer and the temporary substrate;
and S8, breaking the back electrode layer at the etching grooves to form a plurality of solar cell chips.
7. The solar cell chip according to claim 6, further comprising the steps of: and S9, annealing the solar cell chip to enable the front electrode layer to be in fusion contact with the solar functional layer to form an ohmic contact layer.
8. The method of claim 7, wherein the method comprises: in S8, the back electrode layer at the etching groove is ground to break the back electrode layer, and the back electrode layer is formed with an upper edge part at the edge of the germanium substrate, and a first arc-shaped transition surface is formed between the bottom surface of the back electrode and the outer surface of the upper edge part through grinding.
9. The method of claim 7, wherein the method comprises: and in S5, etching the germanium substrate protruding out of the surface of the bonding layer by using a mixed solution of nitric acid, hydrofluoric acid and glacial acetic acid, so that a second arc-shaped transition surface is arranged between the bottom surface of the germanium substrate and the side surface of the germanium substrate.
10. The method of claim 7, wherein the method comprises: the adhesive layer is a paraffin material, and in S7, the adhesive layer and the temporary substrate are removed with a paraffin removal solution.
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| CN114678447A (en) * | 2022-03-28 | 2022-06-28 | 中锗科技有限公司 | Processing method of ultrathin Ge single crystal substrate for solar cell |
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| CN203434165U (en) * | 2013-02-28 | 2014-02-12 | 宏大中源太阳能股份有限公司 | Solar battery sheet with electrode blocking-free front surface |
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| CN209766439U (en) * | 2019-07-03 | 2019-12-10 | 浙江正泰新能源开发有限公司 | Novel structure of photovoltaic module battery piece |
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| CN203434165U (en) * | 2013-02-28 | 2014-02-12 | 宏大中源太阳能股份有限公司 | Solar battery sheet with electrode blocking-free front surface |
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