CN112820656A - Three-dimensional integrated packaging method for millimeter wave miniature SAR system - Google Patents
Three-dimensional integrated packaging method for millimeter wave miniature SAR system Download PDFInfo
- Publication number
- CN112820656A CN112820656A CN202011642687.0A CN202011642687A CN112820656A CN 112820656 A CN112820656 A CN 112820656A CN 202011642687 A CN202011642687 A CN 202011642687A CN 112820656 A CN112820656 A CN 112820656A
- Authority
- CN
- China
- Prior art keywords
- millimeter wave
- layer
- level
- packaging method
- module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 56
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 51
- 230000008569 process Effects 0.000 claims abstract description 14
- 238000004458 analytical method Methods 0.000 claims abstract description 6
- 230000005672 electromagnetic field Effects 0.000 claims abstract description 6
- 238000012795 verification Methods 0.000 claims abstract description 6
- 239000000919 ceramic Substances 0.000 claims abstract description 5
- 238000012545 processing Methods 0.000 claims description 6
- 230000007704 transition Effects 0.000 claims description 4
- 238000001914 filtration Methods 0.000 claims description 3
- 238000005538 encapsulation Methods 0.000 claims 1
- 230000011664 signaling Effects 0.000 claims 1
- 230000010354 integration Effects 0.000 abstract description 23
- 238000013461 design Methods 0.000 description 25
- 238000005516 engineering process Methods 0.000 description 12
- 230000035882 stress Effects 0.000 description 8
- 238000005457 optimization Methods 0.000 description 6
- 230000008878 coupling Effects 0.000 description 5
- 238000010168 coupling process Methods 0.000 description 5
- 238000005859 coupling reaction Methods 0.000 description 5
- 230000017525 heat dissipation Effects 0.000 description 5
- 238000003780 insertion Methods 0.000 description 4
- 230000037431 insertion Effects 0.000 description 4
- 238000009826 distribution Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000001808 coupling effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000009462 micro packaging Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/12—Supports; Mounting means
- H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
- H01Q1/2283—Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6661—High-frequency adaptations for passive devices
- H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention provides a three-dimensional integrated packaging method for a millimeter wave miniature SAR system, which comprises the following steps: operation S1: respectively carrying out system-level packaging on the millimeter wave module, the radio frequency module and the digital module by adopting an LTCC (low temperature co-fired ceramic) process to obtain each board-level circuit layer; operation S2: stacking and interconnecting board-level circuits of the board-level circuit layers and the transceiving antennas; and operation S3: and performing collaborative modeling analysis and verification on the device subjected to the operation S2 based on the electromagnetic field, the thermal field and the stress field to complete the three-dimensional integrated packaging for the millimeter wave micro SAR system. The three-dimensional integrated packaging method can solve the technical problems of large volume, low integration level, high power consumption, difficulty in effective thermal management and the like in SAR system integration in the prior art.
Description
Technical Field
The present disclosure relates to the field of Radar technologies, and in particular, to a three-dimensional integrated packaging method for a millimeter wave micro SAR (Synthetic Aperture Radar) system design.
Background
Due to the harsh requirements of miniaturization, high performance, low power consumption and the like, the miniaturized SAR system develops towards millimeter wave and chip, and the planar integration difficulty of the SAR system is more and more high.
At present, the SAR system mainly uses a planar integration method based on a PCB process, which is mainly embodied in the following two aspects: firstly, functional units including a frequency source, a receiving and transmitting channel, a linear frequency modulation source and the like are integrated on one or more PCB boards by adopting discrete devices to form board cards or modules with larger areas; secondly, the functional units need to transmit signals, so that a signal motherboard is often needed for integration, and finally a relatively large chassis is formed. Therefore, the planar integration method based on the PCB process is not suitable for the requirements of miniaturization, integration, and low power consumption.
As shown in fig. 1a and 1b, in the conventional SAR system packaging method, each constituent functional module is mainly integrated on one or more PCB boards by using discrete devices, which occupies a large area and consumes a high amount of power. The frequency source, the receiving and transmitting channel, the linear frequency modulation source and other functional units are built by using a traditional PCB process and using discrete devices such as a chip, a resistance-capacitance inductor, a connector and the like, and at most only the front and back surfaces of one PCB can be used, so that the occupied area is large; meanwhile, as the signal transmission links among different modules are long, the loss is high, the required power redundancy is high, and the system power consumption is also high. Secondly, the modules of the conventional SAR system are generally designed and developed according to functions, but external control and power supply are unified, and signal transmission is required among the modules, so that the modules are generally inserted in parallel on a PCB motherboard to transmit and interact signals on the motherboard and then are integrated in a chassis, and thus, the occupied volume is large. Meanwhile, the heat dissipation environments and capacities of the modules are different, the performance of the modules may be affected by the overall heat environment, and heat dissipation methods such as additional fans are often needed. Finally, the design of the conventional scheme is mainly focused on the realization of performance indexes of each functional unit, the influence of electromagnetism, heat and stress is not considered from the system level, and when a passive or active element works, heat is generated to increase the temperature, so that the electric parameters (such as the electric conductivity and the thermal conductivity of a silicon substrate and the like) in the packaging structure are influenced, and the electric field distribution is further influenced; again, the change in the electric field changes the thermal field distribution while also creating the effect of thermal stress. Therefore, the three-dimensional integrated package is always accompanied by the mutual coupling effect among the electric, thermal and force fields, and thus the problems of electromagnetic compatibility, heat dissipation or deformation are easily encountered after the integration.
Therefore, how to improve the integration and perform effective thermal management is a technical problem to be solved urgently.
BRIEF SUMMARY OF THE PRESENT DISCLOSURE
Technical problem to be solved
Based on the above problems, the present disclosure provides a three-dimensional integrated packaging method for a millimeter wave micro SAR system, so as to alleviate technical problems of large volume, low integration level, high power consumption, difficulty in effective thermal management, and the like in the integration of the SAR system in the prior art.
(II) technical scheme
The invention provides a three-dimensional integrated packaging method for a millimeter wave miniature SAR system, which comprises the following steps:
operation S1: respectively carrying out system-level packaging on the millimeter wave module, the radio frequency module and the digital module by adopting an LTCC (low temperature co-fired ceramic) process to obtain each board-level circuit layer;
operation S2: stacking and interconnecting board-level circuits of the board-level circuit layers and the transceiving antennas; and
operation S3: and performing collaborative modeling analysis and verification on the device subjected to the operation S2 based on the electromagnetic field, the thermal field and the stress field to complete the three-dimensional integrated packaging for the millimeter wave micro SAR system.
In the disclosed embodiment, operation S1 includes:
operation S11: carrying out system-level packaging on the millimeter wave module package to obtain a millimeter wave SiP layer;
operation S12: carrying out system-level packaging on the radio frequency module to obtain a radio frequency SiP layer; and
operation S13: and carrying out system-level packaging on the digital module to obtain a digital SiP layer.
In the embodiment of the present disclosure, the millimeter wave SiP layer includes a millimeter wave chip and an antenna element, and is used for generating, receiving, transmitting, and receiving millimeter wave signals.
In the embodiment of the present disclosure, the radio frequency SiP layer includes a frequency modulation source chip and an intermediate frequency chip, and is configured to complete generation and reception of a linear frequency modulation signal, gain control of the intermediate frequency signal, and filtering.
In the embodiment of the present disclosure, the digital SiP layer includes an AD/clock chip and a digital processing chip, and is configured to complete the operations of intermediate frequency signal acquisition, system clock generation, digital signal processing, and the like.
In this embodiment of the present disclosure, in operation S2, the uppermost layer is a system transceiver antenna, the back of the system transceiver antenna is tightly attached to the second millimeter wave SiP layer, the third layer is a radio frequency SiP layer, and the fourth layer is a digital SiP layer.
In the embodiment of the present disclosure, only millimeter wave signals need to be connected between the transceiver antenna layer and the millimeter wave SiP layer of the second layer, and the signal connection is realized by a waveguide-to-microstrip transition circuit and a gold wire bonding manner.
In the embodiment of the disclosure, the millimeter wave SiP layer and the radio frequency SiP layer need to be connected by a high-frequency circuit and a low-frequency circuit, the high frequency is vertically connected by a radio frequency plug-in connector, and the low-frequency connection is vertically connected by a low-frequency blind plug-in connector.
(III) advantageous effects
According to the technical scheme, the three-dimensional integrated packaging method for the millimeter wave miniature SAR system has at least one or part of the following beneficial effects:
(1) coupling effects of electric, magnetic, thermal and other multi-physical fields between circuits can be effectively reduced, effective isolation of functional modules is realized, and performance of the millimeter wave SAR system is further guaranteed;
(2) the integration level of the system is fully improved, and meanwhile, the three-dimensional, miniaturization and low cost of the module circuit are realized;
(3) the risk possibly brought by electromagnetic-thermal-force mutual coupling can be effectively evaluated in the system design stage, and the reliability of the packaging method is guaranteed.
Drawings
Fig. 1a is a schematic diagram of an integrated top view structure of a conventional micro SAR system in the prior art.
Fig. 1b is a schematic structural diagram of the functional module in the template integration in the conventional micro SAR system in the prior art.
Fig. 2 is a schematic view of a package structure of a three-dimensional integrated packaging method for a millimeter wave micro SAR system according to an embodiment of the present disclosure.
Fig. 3 is a schematic view of a package structure of each functional module in the three-dimensional integrated packaging method for the millimeter wave micro SAR system according to the embodiment of the present disclosure.
Fig. 4 is a multilayer stacked three-dimensional integration of a board-level circuit in a three-dimensional integrated packaging method for a millimeter wave micro SAR system according to an embodiment of the present disclosure
Fig. 5 is a schematic flow chart of analysis and verification based on electromagnetic field, thermal field and stress field collaborative modeling in the three-dimensional integrated packaging method for the millimeter wave micro SAR system according to the embodiment of the present disclosure.
Fig. 6 is a schematic flow chart of a three-dimensional integrated packaging method for a millimeter wave micro SAR system according to an embodiment of the present disclosure.
Detailed Description
The invention provides a three-dimensional integrated packaging method for a millimeter wave miniature SAR System, which is based on a three-dimensional integrated packaging method of stacking of a Low Temperature Co-fired Ceramic (LTCC) System In Package (SiP) and a board circuit, breaks through the limitation of SAR System plane integration, solves the problem of multi-physical field coupling caused by high-density integration, and can meet the requirements of miniaturization, Low power consumption and high performance of the SAR System. The disclosure provides a three-dimensional integrated overall architecture and a scheme for millimeter wave miniature SAR system design; the method comprises the following steps of realizing SiP packaging of a millimeter wave front end chip set, an intermediate frequency chip set and a digital chip set based on an LTCC technology, and realizing integration of passive devices by an embedding method; then, through multilayer stacking of board-level circuits, board-level connection is realized among the multiple layers by adopting a low-frequency connector or millimeter wave vertical interconnection method; the electromagnetic-thermal-force integrated simulation process is established through the electromagnetic-thermal-force integrated collaborative design, the problem of multi-physical field coupling of the system is solved, and the system integration optimization design is guided.
In the process of realizing the disclosure, the inventor finds that in order to realize the three-dimensional integration of the SAR system circuit, the millimeter wave signal three-dimensional interconnection technology needs to be broken through, and the SAR system circuit has lower loss and good impedance matching; secondly, more and more advanced functional chips (including digital chips, analog and high frequency chips, power chips, etc.) designed and manufactured based on different process lines must be assembled into functional modules. How to integrate and assemble these multifunctional chips in three dimensions, high density and high performance at the chip level is a major technical bottleneck in the development of a new generation of radar systems. Therefore, millimeter wave signal three-dimensional interconnection and system-in-package integration technology is one of the important contents of millimeter wave micro SAR system research. The three-dimensional integrated overall design architecture and scheme for the millimeter wave micro SAR system design, and the functional module System In Package (SiP) and electromagnetic-thermal-force integrated collaborative design based on the LTCC technology are described below.
For the purpose of promoting a better understanding of the objects, aspects and advantages of the present disclosure, reference is made to the following detailed description taken in conjunction with the accompanying drawings.
In an embodiment of the present disclosure, a three-dimensional integrated packaging method for a millimeter wave micro SAR system is provided, which is shown in fig. 2 to 6, and includes:
operation S1: respectively carrying out system-level packaging on the millimeter wave module, the radio frequency module and the digital module by adopting an LTCC (low temperature co-fired ceramic) process to obtain each board-level circuit layer;
the functional module includes: the device comprises a millimeter wave module, a radio frequency module and a digital module;
in the embodiment of the present disclosure, the millimeter wave module, the radio frequency module, and the digital module are respectively SiP-packaged.
Operation S1 includes:
operation S11: carrying out system-level packaging on the millimeter wave module package to obtain a millimeter wave SiP layer;
the millimeter wave SiP layer mainly comprises a millimeter wave chip, an antenna array element, a related peripheral passive element and a power supply chip, and mainly completes generation, receiving and transmitting and radiation receiving of millimeter wave signals.
Operation S12: performing system-in-package on the radio frequency module to obtain a radio frequency SiP layer,
the radio frequency SiP layer mainly comprises a frequency modulation source chip, an intermediate frequency chip, related peripheral passive elements and a power source chip, and is mainly used for finishing the generation and the receiving of linear frequency modulation signals and the gain control and the filtering of the intermediate frequency signals.
Operation S13: system-in-package the digital module to obtain a digital SiP layer,
the digital SiP layer mainly comprises an AD/clock chip, a digital processing chip, related peripheral passive elements and a power supply chip, and mainly completes the work of intermediate frequency signal acquisition, system clock generation, digital signal processing and the like.
Referring to fig. 3, in operations S11, S12, and S13, the overall layout of the system-in-package is greater than 4 layers (11 layers are described in the embodiment of the present disclosure), the first three layers (L1-L3) are radio frequency parts, and mainly microstrip lines, chips of various types, and necessary surface mount devices are arranged; the fourth layer L4 is paved with a large-area microwave ground for effectively isolating the interference of the radio frequency signals to the lower part; the rest layers (L5-L11) can be provided with internal passive devices, power supply control lines, external connection structures and the like according to requirements.
The functional module system-in-package based on the LTCC technology mainly has the following beneficial effects:
(1) a thermally conductive carrier can be embedded. According to the heat dissipation and heat resistance characteristics of the chip, the chip layout and the heat conduction mode are reasonably designed, the high-power chip is loaded on the heat conduction carrier, the heat conduction diffusion in a high-integration environment is realized, and the influence of the heat conduction characteristic of the SiP package on the chip is reduced;
(2) passive devices such as a filter, a coupler and the like can be designed by adopting the LTCC technology and can be embedded in the inner layer, so that the number of surface-mounted devices is effectively reduced;
(3) reliable electrical connections can be provided for the chip. On one hand, the SiP package is used as a bridge for electrical signal interconnection between chips and has high reliability and signal transmission efficiency, and on the other hand, under the condition of small-size package, the influence of electromagnetic leakage can be isolated in a mode of burying a large number of RF shielding holes, and signal distortion cannot be caused by the influence of electromagnetic mutual coupling.
Operation S2: stacking and interconnecting board-level circuits of the board-level circuit layers and the transmitting and receiving antenna layers;
in the embodiment of the present disclosure, as shown in fig. 4, a four-layer board-level circuit stacking scheme is adopted, where the uppermost layer (the first layer) is a system transceiver antenna layer, the back of the system transceiver antenna layer is close to a millimeter wave SiP layer (the second layer), the third layer is a radio frequency SiP layer, and the fourth layer is a digital SiP layer.
Only millimeter wave signals need to be connected between the receiving and transmitting antenna layer and the millimeter wave SiP layer of the second layer, a waveguide-microstrip transition circuit is designed, and signal connection is realized in a gold wire bonding mode;
the millimeter wave SiP layer and the radio frequency SiP layer need to be connected through a high-frequency circuit and a low-frequency circuit, the high frequency adopts an SMP joint in an opposite insertion mode to realize vertical connection, and the low-frequency connection adopts a blind insertion type LSS joint;
the radio frequency SiP layer and the digital SiP layer need to be connected through a low-frequency circuit, and are connected in a blind insertion type LSS mode.
And a lightweight support structure is designed between layers, so that the stress of the board-level circuit is borne by the support structure.
The multilayer stacking three-dimensional integration scheme of the board-level circuit mainly has the following characteristics:
(1) and (5) three-dimensional transformation. The board-level circuits are stacked in multiple layers, and the traditional two-dimensional planar integrated circuit is subjected to three-dimensional integrated design, so that the circuit area is greatly reduced; the vertical interconnection technology is adopted, so that the lengths of millimeter wave, high-frequency and low-frequency connecting wires are effectively shortened, the signal loss is favorably reduced, and the compact design of a system is realized;
(2) the weight is reduced. After the functional circuit SiP is packaged, each board-level circuit has good multi-physical-field shielding characteristics, the stress bearing among the multiple boards is reasonably designed by adopting a lightweight support structure, and compared with the traditional module-level stacking three-dimensional integration, the weight is greatly reduced;
operation S3: performing collaborative modeling analysis and verification on the device subjected to the operation S2 based on an electromagnetic field, a thermal field and a stress field to complete three-dimensional integrated packaging for the millimeter wave miniature SAR system;
with reference to fig. 5, based on the electromagnetic field, thermal field and stress field collaborative modeling analysis, analyzing the signal integrity, electromagnetic compatibility and thermal effect problem generation mechanism of the three-dimensional integrated system, adopting a multilayer structure layout and wiring optimization method, and improving the electrical and thermal properties of the integrated system by the established signal flow distribution network and power supply network and adopting optimization design measures; judging whether the design result meets the index requirement, and if so, carrying out test verification; if the design scheme is not satisfied, modifying the design scheme, and re-developing a thermal management design, an electromagnetic compatibility design and a structure optimization design aiming at the unsatisfied items; and (4) reapplying the optimization design result to the design of the three-dimensional integrated system to carry out iterative optimization.
The three-dimensional integrated packaging method for the millimeter wave miniature SAR system is different from the traditional miniature SAR integrated method in that: the passive components, the chip bare chip and the packaging modules can be buried in the integrated module, and the packaging modules are vertically interconnected by adopting a silicon-based multilayer composite film technology, so that the low-loss characteristic is realized, and the interconnection length is shortened as much as possible; the planar transition switching structure has the characteristics of low insertion loss and good impedance matching; and thirdly, the different types of packaging modules can be electromagnetically isolated by the metal shielding layer, and signal crosstalk among the different types of packaging modules is effectively inhibited.
So far, the embodiments of the present disclosure have been described in detail with reference to the accompanying drawings. It is to be noted that, in the attached drawings or in the description, the implementation modes not shown or described are all the modes known by the ordinary skilled person in the field of technology, and are not described in detail. Further, the above definitions of the various elements and methods are not limited to the various specific structures, shapes or arrangements of parts mentioned in the examples, which may be easily modified or substituted by those of ordinary skill in the art.
From the above description, those skilled in the art should clearly recognize that the present disclosure is directed to a three-dimensional integrated packaging method of a millimeter wave micro SAR system.
In summary, the present disclosure provides a millimeter wave micro SAR system-oriented three-dimensional integrated packaging method, which integrates SiP integrated functional modules together by a multilayer circuit board stacking method and using a low-loss millimeter wave signal three-dimensional interconnection technology, so as to effectively reduce circuit area, effectively shorten lengths of millimeter wave, high-frequency and low-frequency connecting lines, facilitate reduction of signal loss, and achieve compactness and light weight of the system. A plurality of chips with the same functions and processes are integrated by adopting the LTCC technology in the micro-packaging process, so that the integration level of a system is fully improved, and the three-dimensional, miniaturization and low cost of a module circuit are realized. By adopting an electromagnetic-thermal-force integrated collaborative design method, a quantitative simulation design means is provided for the problems of heat dissipation, electromagnetic compatibility and stress deformation faced by the millimeter wave SAR three-dimensional integrated packaging under the condition of small volume and high density, so that the risk possibly brought by electromagnetic-thermal-force mutual coupling can be effectively evaluated in the system design stage, and the reliability of the three-dimensional integrated packaging method is ensured.
It should also be noted that directional terms, such as "upper", "lower", "front", "rear", "left", "right", and the like, used in the embodiments are only directions referring to the drawings, and are not intended to limit the scope of the present disclosure. Throughout the drawings, like elements are represented by like or similar reference numerals. Conventional structures or constructions will be omitted when they may obscure the understanding of the present disclosure.
And the shapes and sizes of the respective components in the drawings do not reflect actual sizes and proportions, but merely illustrate the contents of the embodiments of the present disclosure. Furthermore, in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim.
Furthermore, the word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements.
The use of ordinal numbers such as "first," "second," "third," etc., in the specification and claims to modify a corresponding element does not by itself connote any ordinal number of the element or any ordering of one element from another or the order of manufacture, and the use of the ordinal numbers is only used to distinguish one element having a certain name from another element having a same name.
In addition, unless steps are specifically described or must occur in sequence, the order of the steps is not limited to that listed above and may be changed or rearranged as desired by the desired design. The embodiments described above may be mixed and matched with each other or with other embodiments based on design and reliability considerations, i.e., technical features in different embodiments may be freely combined to form further embodiments.
Those skilled in the art will appreciate that the modules in the device in an embodiment may be adaptively changed and disposed in one or more devices different from the embodiment. The modules or units or components of the embodiments may be combined into one module or unit or component, and furthermore they may be divided into a plurality of sub-modules or sub-units or sub-components. All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or elements of any method or apparatus so disclosed, may be combined in any combination, except combinations where at least some of such features and/or processes or elements are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Also in the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware.
The above-mentioned embodiments are intended to illustrate the objects, aspects and advantages of the present disclosure in further detail, and it should be understood that the above-mentioned embodiments are only illustrative of the present disclosure and are not intended to limit the present disclosure, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present disclosure should be included in the scope of the present disclosure.
Claims (8)
1. A three-dimensional integrated packaging method for a millimeter wave miniature SAR system comprises the following steps:
operation S1: respectively carrying out system-level packaging on the millimeter wave module, the radio frequency module and the digital module by adopting an LTCC (low temperature co-fired ceramic) process to obtain each board-level circuit layer;
operation S2: stacking and interconnecting board-level circuits of the board-level circuit layers and the transceiving antennas; and
operation S3: and performing collaborative modeling analysis and verification on the device subjected to the operation S2 based on the electromagnetic field, the thermal field and the stress field to complete the three-dimensional integrated packaging for the millimeter wave micro SAR system.
2. The encapsulation method of claim 1, operation S1 comprising:
operation S11: carrying out system-level packaging on the millimeter wave module package to obtain a millimeter wave SiP layer;
operation S12: carrying out system-level packaging on the radio frequency module to obtain a radio frequency SiP layer; and
operation S13: and carrying out system-level packaging on the digital module to obtain a digital SiP layer.
3. The packaging method according to claim 2, wherein the millimeter wave SiP layer comprises a millimeter wave chip and an antenna element, and is used for generating, transceiving and receiving the millimeter wave signals.
4. The packaging method of claim 2, wherein the radio frequency SiP layer comprises a frequency modulation source chip, an intermediate frequency chip, and is used for generating and receiving a linear frequency modulation signal, and controlling and filtering the gain of the intermediate frequency signal.
5. The packaging method according to claim 2, wherein the digital SiP layer comprises an AD/clock chip and a digital processing chip, and is used for performing intermediate frequency signal acquisition, system clock generation, and digital signal processing.
6. The packaging method of claim 1, wherein in operation S2, the top layer is a system transceiver antenna, the back of the top layer is closely attached to the second millimeter wave SiP layer, the third layer is a radio frequency SiP layer, and the fourth layer is a digital SiP layer.
7. The packaging method according to claim 6, wherein only millimeter wave signals need to be connected between the transceiver antenna layer and the millimeter wave SiP layer of the second layer, and the signals are connected by a transition circuit from waveguide to microstrip and in a gold wire bonding manner.
8. The packaging method according to claim 6, wherein the millimeter wave SiP layer and the radio frequency SiP layer need high frequency and low frequency circuit connection, the high frequency is vertically connected by radio frequency plug-in connectors, and the low frequency connection is vertically connected by low frequency blind plug-in connectors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011642687.0A CN112820656A (en) | 2020-12-31 | 2020-12-31 | Three-dimensional integrated packaging method for millimeter wave miniature SAR system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011642687.0A CN112820656A (en) | 2020-12-31 | 2020-12-31 | Three-dimensional integrated packaging method for millimeter wave miniature SAR system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112820656A true CN112820656A (en) | 2021-05-18 |
Family
ID=75856544
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011642687.0A Pending CN112820656A (en) | 2020-12-31 | 2020-12-31 | Three-dimensional integrated packaging method for millimeter wave miniature SAR system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112820656A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115457992A (en) * | 2022-08-25 | 2022-12-09 | 南京新频点电子科技有限公司 | Three-dimensional digital frequency storage device with vertically stacked and interconnected structures |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130050016A1 (en) * | 2011-08-26 | 2013-02-28 | Electronics And Telecommunications Research Institute | Radar package for millimeter waves |
| CN111276787A (en) * | 2019-12-31 | 2020-06-12 | 中国电子科技集团公司第五十五研究所 | Three-dimensional integrated millimeter wave AiP phased array element |
-
2020
- 2020-12-31 CN CN202011642687.0A patent/CN112820656A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130050016A1 (en) * | 2011-08-26 | 2013-02-28 | Electronics And Telecommunications Research Institute | Radar package for millimeter waves |
| CN111276787A (en) * | 2019-12-31 | 2020-06-12 | 中国电子科技集团公司第五十五研究所 | Three-dimensional integrated millimeter wave AiP phased array element |
Non-Patent Citations (1)
| Title |
|---|
| 丁满来 等: "一种W波段无人机微型SAR系统", 《电子与信息学报》 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115457992A (en) * | 2022-08-25 | 2022-12-09 | 南京新频点电子科技有限公司 | Three-dimensional digital frequency storage device with vertically stacked and interconnected structures |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8256685B2 (en) | Compact millimeter wave packages with integrated antennas | |
| Budka | Wide-bandwidth millimeter-wave bond-wire interconnects | |
| JP5526659B2 (en) | Millimeter-wave dielectric transmission device | |
| US6462950B1 (en) | Stacked power amplifier module | |
| CN100585843C (en) | The silicon based package structure that has integrated passive components | |
| CA2650496C (en) | Planar mixed-signal circuit board | |
| He et al. | Additively manufactured mm-wave multichip modules with fully printed “smart” encapsulation structures | |
| CN104332413A (en) | 3D assembling method for integrally integrating chips of T/R assembly | |
| US20080290959A1 (en) | Millimeter wave integrated circuit interconnection scheme | |
| CN105680133A (en) | Inter-board perpendicular interconnection circuit structure for substrate integrated ridge waveguide | |
| CN104124211A (en) | Integrated-circuit module with waveguide transition element | |
| CN111180899B (en) | Micro-system-based light and thin high-density integrated antenna array structure | |
| KR101702717B1 (en) | System and method for a millimeter wave circuit board | |
| US9893428B2 (en) | Direct transition from a waveguide to a buried chip | |
| CN215496704U (en) | Ku wave band integrated packaging microwave assembly based on HTCC | |
| CN111952289A (en) | Apparatus and method for coupling a waveguide structure to an integrated circuit package | |
| CN114025479B (en) | Vertical interconnection structure between circuit boards, packaged device, microsystem and method thereof | |
| CN102201607A (en) | Microstrip and strip line transformation based on low temperature co-fired ceramic (LTCC) technology | |
| CN113540777B (en) | Active AIP unit-based panel phased array antenna architecture | |
| CN112820656A (en) | Three-dimensional integrated packaging method for millimeter wave miniature SAR system | |
| CN117039384A (en) | Low-loss transmission line-waveguide vertical transmission conversion structure | |
| US11335652B2 (en) | Method, system, and apparatus for forming three-dimensional semiconductor device package with waveguide | |
| Gugulothu et al. | Improved package isolation for high gain MMIC packaging using offset port selection technique | |
| CN220527176U (en) | W frequency band transmission line-waveguide vertical transmission conversion structure | |
| Decker et al. | Multichip MMIC package for X and K/sub a/bands |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20210518 |
|
| RJ01 | Rejection of invention patent application after publication |