CN112817746B - CPU power adjusting method, device, equipment and readable storage medium - Google Patents

CPU power adjusting method, device, equipment and readable storage medium Download PDF

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CN112817746B
CN112817746B CN202110057903.3A CN202110057903A CN112817746B CN 112817746 B CN112817746 B CN 112817746B CN 202110057903 A CN202110057903 A CN 202110057903A CN 112817746 B CN112817746 B CN 112817746B
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cpu
state
stage number
power
current actual
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CN112817746A (en
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牛晓勇
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Inspur Electronic Information Industry Co Ltd
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Inspur Electronic Information Industry Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The invention discloses a CPU power adjusting method, which comprises the following steps: detecting the current actual power value of the CPU; acquiring a preset power capping threshold interval; judging whether the current actual power value belongs to a preset power capping threshold interval or not; if not, sending a P-state stage number adjusting instruction to the CPU so that the CPU performs corresponding P-state stage number adjusting operation according to the P-state stage number adjusting instruction. By applying the CPU power adjusting method provided by the invention, power capping is realized, CPU resources are fully utilized, and system performance is improved. The invention also discloses a CPU power adjusting device, equipment and a storage medium, and has corresponding technical effects.

Description

CPU power adjusting method, device, equipment and readable storage medium
Technical Field
The present invention relates to the field of computer application technologies, and in particular, to a method, an apparatus, a device, and a computer-readable storage medium for adjusting CPU power.
Background
A Central Processing Unit (CPU) is a final execution Unit for information Processing and program operation, and serves as an operation and control core of the computer system. Since the production of CPUs, great developments have been made in the extension of logic structures, operation efficiencies, and functions. However, the CPU processor does not have the power capping function, so that the performance of the CPU processor cannot be effectively utilized, and the CPU resource is wasted.
In summary, how to effectively solve the problems that the performance of the CPU processor cannot be effectively exerted, which causes the waste of CPU resources, etc., is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide a CPU power adjusting method, which realizes power capping, makes full use of CPU resources and improves system performance; another object of the present invention is to provide a CPU power adjusting apparatus, device and computer readable storage medium.
In order to solve the technical problems, the invention provides the following technical scheme:
a CPU power adjustment method, comprising:
detecting the current actual power value of the CPU;
acquiring a preset power capping threshold interval;
judging whether the current actual power value belongs to the preset power capping threshold interval or not;
and if not, sending a P-state stage number adjusting instruction to the CPU so that the CPU performs corresponding P-state stage number adjusting operation according to the P-state stage number adjusting instruction.
In one embodiment of the present invention, detecting the current actual power value of the CPU includes:
and obtaining the current actual power value of the CPU by detecting the current PSU power consumption of the server.
In one embodiment of the present invention, the sending a P-state progression adjustment command to the CPU includes:
and when the current actual power value is smaller than the minimum value of the preset power capping threshold interval, sending a P-state series up-regulation instruction to the CPU.
In a specific embodiment of the present invention, sending a P-state level up-regulation instruction to the CPU, so that the CPU performs a corresponding P-state level regulation operation according to the P-state level up-regulation instruction, includes:
and sending a P-state series up-regulation enabling pulse of a first preset duration to the CPU, so that the CPU up-regulates the P-state series according to the P-state series up-regulation enabling pulse.
In one embodiment of the present invention, the sending a P-state progression adjustment command to the CPU includes:
and when the current actual power value is larger than the maximum value of the preset power capping threshold interval, sending a P-state series down-regulation instruction to the CPU.
In a specific embodiment of the present invention, sending a P-state level down-regulation instruction to the CPU, so that the CPU performs a corresponding P-state level regulation operation according to the P-state level regulation instruction, includes:
and sending a P-state series down-regulation enabling pulse of a second preset duration to the CPU, so that the CPU down-regulates the P-state series according to the P-state series down-regulation enabling pulse.
In one embodiment of the present invention, the method further comprises:
and when the P-state progression adjustment is detected to be the edge progression in the adjustable progression range by repeating the preset times, sending a P-state progression adjustment stopping instruction to the CPU so as to stop the P-state progression adjustment operation of the CPU.
A CPU power adjustment apparatus comprising:
the power value detection module is used for detecting the current actual power value of the CPU;
the threshold interval acquisition module is used for acquiring a preset power capping threshold interval;
the judging module is used for judging whether the current actual power value belongs to the preset power capping threshold interval or not;
and the stage number adjusting module is used for sending a P-state stage number adjusting instruction to the CPU when the current actual power value does not belong to the preset power capping threshold interval, so that the CPU performs corresponding P-state stage number adjusting operation according to the P-state stage number adjusting instruction.
A CPU power adjustment device comprising:
a memory for storing a computer program;
a processor for implementing the steps of the CPU power adjustment method as described above when executing the computer program.
A computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the CPU power adjustment method as described above.
The CPU power adjusting method provided by the invention detects the current actual power value of the CPU; acquiring a preset power capping threshold interval; judging whether the current actual power value belongs to a preset power capping threshold interval or not; if not, sending a P-state stage number adjusting instruction to the CPU so that the CPU performs corresponding P-state stage number adjusting operation according to the P-state stage number adjusting instruction. By presetting a power capping threshold interval and presetting the adjustable P-state level of the CPU, when the current actual power value is detected not to belong to the preset power capping threshold interval, the power of the CPU is adjusted by adjusting the P-state level, so that the power capping is realized, the CPU resource is fully utilized, and the system performance is improved.
Correspondingly, the invention also provides a CPU power adjusting device, equipment and a computer readable storage medium corresponding to the CPU power adjusting method, which have the technical effects and are not described herein again.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a flowchart illustrating an embodiment of a method for adjusting CPU power;
FIG. 2 is a flowchart illustrating another embodiment of a CPU power adjustment method according to the present invention;
FIG. 3 is a flowchart of another embodiment of a CPU power adjustment method according to the present invention;
FIG. 4 is a block diagram of a CPU power adjustment apparatus according to an embodiment of the present invention;
fig. 5 is a block diagram of a CPU power adjustment apparatus according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments. It should be apparent that the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The first embodiment is as follows:
referring to fig. 1, fig. 1 is a flowchart of an implementation of a CPU power adjustment method in an embodiment of the present invention, where the method may include the following steps:
s101: and detecting the current actual power value of the CPU.
The Baseboard Management Controller (BMC) may detect the current actual power value of the CPU in real time or at predetermined time intervals. The CPU may be a CPU of a mega-core platform.
It should be noted that the time interval for detecting the actual power value of the CPU by the bmc may be set and adjusted according to actual conditions, which is not limited in this embodiment of the present invention, and may be set to 30s, for example.
S102: and acquiring a preset power capping threshold interval.
Presetting a power capping threshold interval of a CPU, and acquiring the preset power capping threshold interval.
S103: and judging whether the current actual power value belongs to a preset power capping threshold interval, if so, not processing, and if not, executing the step S104.
After detecting the current actual power value of the CPU and acquiring the preset power capping threshold interval, determining whether the current actual power value belongs to the preset power capping threshold interval, if so, indicating that the CPU resource is currently in a well utilized state without any processing, and if not, indicating that the current CPU is in a state where more idle resources are not utilized or in an overload state, and executing step S104.
S104: and sending a P-state stage number adjusting instruction to the CPU so that the CPU performs corresponding P-state stage number adjusting operation according to the P-state stage number adjusting instruction.
After the power-on is started, detecting the current adjustable P-state stage number of the CPU based on an Input/Output System (BIOS), and transmitting the information to a substrate management controller. When the current actual power value is determined not to belong to the preset power capping threshold interval, the current CPU is in a state that more idle resources are not utilized or in an overload state, the base plate management controller sends a P-state stage number adjusting instruction to the CPU, and the CPU performs corresponding P-state stage number adjusting operation according to the P-state stage number adjusting instruction and indirectly executes power consumption adjustment of the CPU. Therefore, the actual power value of the CPU is adjusted to be within the preset power capping threshold interval, idle CPU resources are fully utilized, the loss of the CPU performance caused by the fact that the CPU is in an overload state for a long time is avoided, customer requirements are met, and the functional diversity of products is improved.
For example, the P-state number of the CPU can be set to four stages of 1.2Ghz,1.8Ghz,2.4Ghz and 2.7Ghz, and the P-state number is dynamically adjusted according to the relation between the current actual power value and the preset power capping threshold interval.
The CPU power adjusting method provided by the invention detects the current actual power value of the CPU; acquiring a preset power capping threshold interval; judging whether the current actual power value belongs to a preset power capping threshold interval or not; if not, sending a P-state stage number adjusting instruction to the CPU so that the CPU performs corresponding P-state stage number adjusting operation according to the P-state stage number adjusting instruction. By presetting a power capping threshold interval and presetting the adjustable P-state level of the CPU, when the current actual power value is detected not to belong to the preset power capping threshold interval, the power of the CPU is adjusted by adjusting the P-state level, so that the power capping is realized, the CPU resource is fully utilized, and the system performance is improved.
It should be noted that, based on the first embodiment, the embodiment of the present invention further provides a corresponding improvement scheme. In the following embodiments, steps that are the same as or correspond to those in the first embodiment may be referred to each other, and corresponding advantageous effects may also be referred to each other, which are not described in detail in the following modified embodiments.
Example two:
referring to fig. 2, fig. 2 is a flowchart of another implementation of the CPU power adjustment method in the embodiment of the present invention, where the method may include the following steps:
s201: and the current actual power value of the CPU is obtained by detecting the current PSU overall power consumption of the server.
Because the power consumption of the server is mainly generated by the running of the CPU, the current actual power value of the CPU is obtained by detecting the current PSU overall power consumption (namely the overall power consumption of the whole machine) of the server.
S202: and acquiring a preset power capping threshold interval.
S203: and judging whether the current actual power value belongs to a preset power capping threshold interval, if so, not processing, and if not, executing the step S204.
S204: and when the current actual power value is smaller than the minimum value of the preset power capping threshold interval, sending a P-state series up-regulation enabling pulse with a first preset duration to the CPU, so that the CPU up-regulates the P-state series according to the P-state series up-regulation enabling pulse.
And when the current actual power value is determined to be smaller than the minimum value of the preset power capping threshold interval, sending a P-state series up-regulation enabling pulse with a first preset duration to the CPU, and up-regulating the P-state series by the CPU according to the P-state series up-regulation enabling pulse. If the pre-set substrate management controller is connected to the CPU through a GPIOJ0 signal and set to GPIOJ0 signal low level enable, when the current actual power value is determined to be smaller than the minimum value of the preset power capping threshold interval, the substrate management controller sends a low pulse larger than 30 mu s to the CPU through pulling down the GPIOJ0 signal, and the CPU executes the P-State series of the CPU to be adjusted upwards, so that the power is increased.
It should be noted that the first preset time period may be set and adjusted according to actual situations, which is not limited in the embodiment of the present invention, and may be set to 30us, for example.
S205: and when the preset times are repeated and the P-state stage adjustment is detected to be the edge stage in the adjustable stage range, sending a P-state stage adjustment stopping instruction to the CPU so as to stop the P-state stage adjustment operation of the CPU.
When the preset times are repeated and the P-state stage number is detected to be adjusted to the edge stage number in the adjustable stage number range, namely the P-state stage number is adjusted to the maximum stage number or the minimum stage number in the adjustable stage number range, if the preset power capping threshold interval still cannot be reached, a P-state stage number adjusting stopping instruction is sent to the CPU, and the CPU stops the P-state stage number adjusting operation. Success or failure information of power capping may also be displayed at the baseboard management controller webpage.
It should be noted that the preset number of times may be set and adjusted according to actual situations, which is not limited in the embodiment of the present invention, and may be set to 3 times, for example.
Example three:
referring to fig. 3, fig. 3 is a flowchart of another implementation of the CPU power adjustment method in the embodiment of the present invention, where the method may include the following steps:
s301: and the current actual power value of the CPU is obtained by detecting the current PSU power consumption of the server.
S302: and acquiring a preset power capping threshold interval.
S303: and judging whether the current actual power value belongs to a preset power capping threshold interval, if so, not processing, and if not, executing the step S304.
S304: and when the current actual power value is larger than the maximum value of the preset power capping threshold interval, sending a P-state series down-regulation enabling pulse of a second preset duration to the CPU, so that the CPU down-regulates the P-state series according to the P-state series down-regulation enabling pulse.
And when the current actual power value is determined to be larger than the maximum value of the preset power capping threshold interval, sending a P-state series down-regulation enabling pulse of a second preset duration to the CPU, and enabling the P-state series to be down-regulated by the CPU according to the P-state series down-regulation enabling pulse. If the substrate management controller is preset to be connected to the CPU through a GPIOJ1 signal and set to be enabled by a GPIOJ1 signal low level, when the current actual power value is determined to be larger than the maximum value of the preset power capping threshold interval, the substrate management controller sends a low pulse larger than 30 mu s to the CPU through pulling down the GPIOJ1 signal, and the CPU executes the down-regulation of the P-State series of the CPU, so that the reduction of the power is realized.
It should be noted that the second preset time period may be set and adjusted according to an actual situation, which is not limited in the embodiment of the present invention, and may be set to 30us, for example. The first preset time length and the second preset time length are only used for distinguishing the time lengths of the P-state series up-regulation enabling pulse and the P-state series down-regulation enabling pulse, and the first preset time length and the second preset time length are not sequentially divided, and the first preset time length and the second preset time length can be set to be the same or different.
S305: and when the P-state progression adjustment is detected to be the edge progression in the adjustable progression range after the preset times, sending a P-state progression adjustment stopping instruction to the CPU so as to stop the P-state progression adjustment operation of the CPU.
Corresponding to the above method embodiment, the present invention further provides a CPU power adjustment apparatus, and the CPU power adjustment apparatus described below and the CPU power adjustment method described above may be referred to correspondingly.
Referring to fig. 4, fig. 4 is a block diagram of a CPU power adjustment apparatus according to an embodiment of the present invention, where the apparatus may include:
a power value detection module 41, configured to detect a current actual power value of the CPU;
a threshold interval obtaining module 42, configured to obtain a preset power capping threshold interval;
a judging module 43, configured to judge whether the current actual power value belongs to a preset power capping threshold interval;
and the stage number adjusting module 44 is configured to send a P-state stage number adjusting instruction to the CPU when the current actual power value does not belong to the preset power capping threshold interval, so that the CPU performs a corresponding P-state stage number adjusting operation according to the P-state stage number adjusting instruction.
The CPU power adjusting device provided by the invention detects the current actual power value of the CPU; acquiring a preset power capping threshold interval; judging whether the current actual power value belongs to a preset power capping threshold interval or not; if not, sending a P-state stage number adjusting instruction to the CPU so that the CPU performs corresponding P-state stage number adjusting operation according to the P-state stage number adjusting instruction. By presetting a power capping threshold interval and presetting the adjustable P-state level of the CPU, when the current actual power value is detected not to belong to the preset power capping threshold interval, the power of the CPU is adjusted by adjusting the P-state level, so that the power capping is realized, the CPU resource is fully utilized, and the system performance is improved.
In an embodiment of the present invention, the power value detecting module 41 is specifically a module for obtaining a current actual power value of the CPU by detecting a current PSU overall power consumption of the server.
In an embodiment of the present invention, the stage number adjusting module 44 is specifically a module that sends a P-state stage number up-regulating instruction to the CPU when the current actual power value is smaller than the minimum value of the preset power capping threshold interval.
In an embodiment of the present invention, the stage number adjusting module 44 is specifically a module that sends a P-state stage number up-regulation enabling pulse of a first preset duration to the CPU, so that the CPU up-regulates the P-state stage number according to the P-state stage number up-regulation enabling pulse.
In a specific embodiment of the present invention, the stage number adjusting module 44 is specifically a module that sends a P-state stage number down-regulation instruction to the CPU when the current actual power value is greater than the maximum value of the preset power capping threshold interval.
In a specific embodiment of the present invention, the stage number adjusting module 44 is a module that sends a P-state stage number down-regulation enabling pulse of a second preset duration to the CPU, so that the CPU down-regulates the P-state stage number according to the P-state stage number down-regulation enabling pulse.
In one embodiment of the present invention, the apparatus may further include:
and the stage number adjustment stopping module is used for sending a P-state stage number adjustment stopping instruction to the CPU when the P-state stage number is detected to be adjusted to the edge stage number in the adjustable stage number range by repeating the preset times, so that the CPU stops the P-state stage number adjustment operation.
Corresponding to the above method embodiment, referring to fig. 5, fig. 5 is a schematic diagram of a CPU power adjustment apparatus provided in the present invention, where the apparatus may include:
a memory 51 for storing a computer program;
the processor 52, when executing the computer program stored in the memory 51, may implement the following steps:
detecting the current actual power value of the CPU; acquiring a preset power capping threshold interval; judging whether the current actual power value belongs to a preset power capping threshold interval or not; if not, sending a P-state stage number adjusting instruction to the CPU so that the CPU performs corresponding P-state stage number adjusting operation according to the P-state stage number adjusting instruction.
For the introduction of the device provided by the present invention, please refer to the above method embodiment, which is not described herein again.
Corresponding to the above method embodiment, the present invention further provides a computer-readable storage medium having a computer program stored thereon, the computer program, when executed by a processor, implementing the steps of:
detecting the current actual power value of the CPU; acquiring a preset power capping threshold interval; judging whether the current actual power value belongs to a preset power capping threshold interval or not; if not, sending a P-state stage number adjusting instruction to the CPU so that the CPU performs corresponding P-state stage number adjusting operation according to the P-state stage number adjusting instruction.
The computer-readable storage medium may include: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, an optical disk, or other various media capable of storing program codes.
For the introduction of the computer-readable storage medium provided by the present invention, please refer to the above method embodiments, which are not described herein again.
In the present specification, the embodiments are described in a progressive manner, and each embodiment focuses on differences from other embodiments, and the same or similar parts between the embodiments are referred to each other. The device, the apparatus and the computer-readable storage medium disclosed in the embodiments correspond to the method disclosed in the embodiments, so that the description is simple, and the relevant points can be referred to the description of the method.
The principle and the implementation of the present invention are explained in the present application by using specific examples, and the above description of the embodiments is only used to help understanding the technical solution and the core idea of the present invention. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.

Claims (8)

1. A method for adjusting CPU power, comprising:
detecting the current actual power value of the CPU;
acquiring a preset power capping threshold interval;
judging whether the current actual power value belongs to the preset power capping threshold interval or not;
if not, sending a P-state stage number adjusting instruction to the CPU so that the CPU performs corresponding P-state stage number adjusting operation according to the P-state stage number adjusting instruction;
sending a P-state progression adjustment instruction to the CPU, wherein the P-state progression adjustment instruction comprises the following steps:
when the current actual power value is smaller than the minimum value of the preset power capping threshold interval, sending a P-state series up-regulation instruction to the CPU;
and when the current actual power value is larger than the maximum value of the preset power capping threshold interval, sending a P-state stage number down-regulation instruction to the CPU.
2. The method for adjusting the CPU power according to claim 1, wherein detecting the current actual power value of the CPU comprises:
and obtaining the current actual power value of the CPU by detecting the current PSU power consumption of the server.
3. The method according to claim 1, wherein sending a P-state level up-regulation instruction to the CPU to make the CPU perform a corresponding P-state level regulation operation according to the P-state level up-regulation instruction comprises:
and sending a P-state series up-regulation enabling pulse of a first preset time length to the CPU, so that the CPU up-regulates the P-state series according to the P-state series up-regulation enabling pulse.
4. The method according to claim 1, wherein sending a P-state level down-regulation instruction to the CPU to make the CPU perform a corresponding P-state level regulation operation according to the P-state level down-regulation instruction comprises:
and sending a P-state series down-regulation enabling pulse of a second preset duration to the CPU, so that the CPU down-regulates the P-state series according to the P-state series down-regulation enabling pulse.
5. The CPU power adjustment method according to any one of claims 1 to 4, further comprising:
and when the P-state progression adjustment is detected to be the edge progression in the adjustable progression range by repeating the preset times, sending a P-state progression adjustment stopping instruction to the CPU so as to stop the P-state progression adjustment operation of the CPU.
6. A CPU power adjustment apparatus, comprising:
the power value detection module is used for detecting the current actual power value of the CPU;
a threshold interval obtaining module, configured to obtain a preset power capping threshold interval;
the judging module is used for judging whether the current actual power value belongs to the preset power capping threshold interval or not;
the stage number adjusting module is used for sending a P-state stage number adjusting instruction to the CPU when the current actual power value does not belong to the preset power capping threshold interval, so that the CPU performs corresponding P-state stage number adjusting operation according to the P-state stage number adjusting instruction;
the stage number adjusting module is specifically configured to send a P-state stage number up-adjusting instruction to the CPU when the current actual power value is smaller than the minimum value of the preset power capping threshold interval; and when the current actual power value is larger than the maximum value of the preset power capping threshold interval, sending a P-state stage number down-regulation instruction to the CPU.
7. A CPU power adjustment apparatus, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the CPU power adjustment method according to any one of claims 1 to 5 when executing the computer program.
8. A computer-readable storage medium, having stored thereon a computer program which, when being executed by a processor, carries out the steps of the CPU power adjustment method according to any one of claims 1 to 5.
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CN104661290A (en) * 2013-11-19 2015-05-27 中兴通讯股份有限公司 Terminal power control method and device and equipment
CN108983946A (en) * 2018-06-13 2018-12-11 烽火通信科技股份有限公司 A kind of server energy consumption control method, system and equipment
CN111007937A (en) * 2019-11-30 2020-04-14 浪潮电子信息产业股份有限公司 Server power consumption control method and device and related components

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