CN115686863A - Hybrid polling method, device, equipment and readable storage medium - Google Patents
Hybrid polling method, device, equipment and readable storage medium Download PDFInfo
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Abstract
The application discloses a hybrid polling method, a hybrid polling device, equipment and a readable storage medium, wherein the method comprises the steps of obtaining the number of instructions to be sent from a host machine; judging whether the instruction quantity is larger than a polling threshold value; if yes, entering a polling mode and processing an instruction generated by the host machine; if not, entering an interrupt mode and processing the instruction. In the method and the device, the change situation of the system load is judged by acquiring the number of the instructions waiting to be processed on the I/O path, so that the interruption time of hybrid polling switching is more accurate, and the energy consumption of the system is reduced under the condition of keeping the performance advantage.
Description
Technical Field
The present application relates to the field of computer technologies, and in particular, to a hybrid polling method, apparatus, device, and readable storage medium.
Background
With the rapid development and progress of hardware technologies such as computer storage and network, the bottleneck of a computer system is gradually shifted from hardware to CPU. The primary purpose of interrupt technology was designed and used initially to conserve CPU computing resources. However, as the throughput of the external device increases and the corresponding delay decreases, the overhead of the CPU caused by processing the interrupt itself is also becoming one of the factors affecting the high performance system.
While polling mode does not have the overhead of processing the interrupt itself to the CPU. However, the speed of the external devices such as storage or network is lower than the processing speed of the CPU, and the polling mode occupies 100% of the CPU time slice, so that the CPU generates a large amount of round-robin operations during polling, which wastes CPU resources and brings more hardware heat dissipation problems.
In the hybrid polling mode, the system adopts an efficient polling mode in a high-load mode so as to obtain higher system performance, and in a low-load period, computing hardware such as a CPU (central processing unit), an FPGA (field programmable gate array) and the like is allowed to adopt an interrupt mode or sleep for a period of time. The hybrid polling mode switching algorithm determines the efficiency of the hybrid polling algorithm.
In the existing algorithm, the hybrid polling algorithm is suitable for the ultra-low delay storage equipment, and mainly aims to obtain lower I/O delay time but cannot meet the requirement of the equipment on high throughput; hybrid polling interrupts used in the network predict, based on the packet rate that has been received, that a device will remain in a high load operating state for some future period of time, and may not be able to achieve good results in certain bursty traffic contexts.
In summary, how to effectively solve the problems of hybrid polling switching and the like is a technical problem that needs to be solved urgently by those skilled in the art.
Disclosure of Invention
The application aims to provide a hybrid polling method, a device, equipment and a readable storage medium, which judge the change situation of system load by acquiring the number of instructions to be processed in a host machine, so that the interrupt and polling time of hybrid polling switching is more accurate, and the energy consumption of the system is reduced under the condition of keeping the performance advantage.
In order to solve the technical problem, the application provides the following technical scheme:
a hybrid polling method, comprising:
acquiring the number of instructions to be sent from a host machine;
judging whether the instruction quantity is larger than a polling threshold value;
if yes, entering a polling mode and processing an instruction generated by the host machine;
if not, entering an interrupt mode and processing the instruction.
Preferably, said entering into polling mode, processing the instruction generated by said host, includes:
processing the instruction in the polling mode;
counting a processing number of the instructions processed in a current polling period;
after the current polling period is finished, judging whether the processing quantity is greater than an interrupt threshold value;
if yes, continuing to maintain the polling mode and processing the instruction;
if not, entering the interrupt mode and processing the instruction.
Preferably, the counting the processing number of the instructions processed in the current polling cycle includes:
counting the recovery quantity of recovery instructions sent to the host machine in the current polling period;
determining the recycle quantity as the process quantity.
Preferably, the method further comprises the following steps:
the number of polling times or polling time is adjusted to adjust the length of time of the polling period.
Preferably, the obtaining the number of instructions to be sent from the host includes:
and acquiring the instruction quantity in the polling mode or the interrupt mode.
Preferably, the entering an interrupt mode, processing the instruction, includes:
acquiring an instruction sent by the host machine, and switching context;
and processing the instruction after the context switching is completed.
Preferably, said entering into polling mode, processing the instruction generated by said host, includes:
and polling the host machine, acquiring the instruction generated by the host machine, and processing the instruction.
A hybrid polling device, comprising:
the instruction quantity acquisition module is used for acquiring the quantity of instructions to be sent from the host machine;
the judging module is used for judging whether the instruction quantity is larger than a polling threshold value or not;
the instruction processing module is used for entering a polling mode and processing the instruction generated by the host machine if the instruction is positive; if not, entering an interrupt mode and processing the instruction.
An electronic device, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the hybrid polling method described above when executing the computer program.
A readable storage medium having stored thereon a computer program which, when executed by a processor, carries out the steps of the hybrid polling method described above.
By applying the method provided by the embodiment of the application, the number of instructions to be sent is obtained from the host machine; judging whether the instruction quantity is larger than a polling threshold value or not; if yes, entering a polling mode and processing an instruction generated by the host machine; if not, entering an interrupt mode and processing the instruction.
In the application, the number of instructions to be sent is first acquired from a host. Because the instruction to be sent is the instruction to be processed, the system load change condition can be more accurately judged based on the instruction number. Specifically, a polling threshold value can be set, when the number of instructions is greater than the polling threshold value, the polling mode is determined to be entered, and the instructions generated by the host machine are processed in the polling mode; and when the number of the instructions is not greater than the polling threshold value, determining to enter an interrupt mode, and processing the instructions generated by the host machine in the interrupt mode. Namely, in the application, the system load change situation is judged by acquiring the number of the instructions waiting to be processed on the I/O path, so that the interruption time of the hybrid polling switching is more accurate, and the system energy consumption is reduced under the condition of keeping the performance advantage.
Accordingly, embodiments of the present application further provide a hybrid polling apparatus, a device, and a readable storage medium corresponding to the hybrid polling method, which have the above technical effects and are not described herein again.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or related technologies of the present application, the drawings needed to be used in the description of the embodiments or related technologies are briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a flowchart of an implementation of a hybrid polling method in an embodiment of the present application;
FIG. 2 is a schematic diagram of hybrid polling for low latency devices;
FIG. 3 is a schematic diagram of a hybrid interrupt polling mode;
FIG. 4 is a system architecture diagram according to an embodiment of the present application;
fig. 5 is a schematic diagram illustrating an implementation of a hybrid polling method in an embodiment of the present application;
fig. 6 is a schematic structural diagram of a hybrid polling device in an embodiment of the present application;
fig. 7 is a schematic structural diagram of an electronic device in an embodiment of the present application;
fig. 8 is a schematic structural diagram of an electronic device in an embodiment of the present application.
Detailed Description
In order that those skilled in the art will better understand the disclosure, the following detailed description will be given with reference to the accompanying drawings. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, fig. 1 is a flowchart illustrating a hybrid polling method according to an embodiment of the present invention, where the method can be applied to a peripheral system of a host, such as an embedded system. The method is described in detail below by taking an application to an embedded system as an example, and reference may be made to the application in other peripheral systems, which are not listed here. Specifically, the implementation of the method comprises the following steps:
s101, obtaining the number of instructions to be sent from a host machine.
The host storage system generates an instruction needing to be processed by the embedded system, such as a storage instruction, and inserts the instruction into the tail of the transmission instruction queue to wait for processing.
The embedded system can obtain the number of instructions to be sent from the host machine. It should be noted that the number of instructions refers to the number of instructions generated in the host that need to be processed by the embedded system but are not yet sent to the embedded system or not yet actively pulled by the embedded system.
That is to say, the number of instructions in the embodiment of the present application refers to the number of instructions that will need to be processed by the embedded system, and is not the number of instructions currently being processed, nor the number corresponding to the processed instructions.
Specifically, in a specific embodiment of the present application, the obtaining of the number of instructions to be sent from a host includes: in the polling mode or interrupt mode, the number of instructions is acquired. That is, in the present application, in the polling mode or in the interrupt mode, the number of instructions to be sent in the host may be obtained.
S102, judging whether the number of the instructions is larger than a polling threshold value.
Since the number of instructions corresponds to the instructions to be processed, the number of instructions can be evaluated to determine whether the load to be faced is a high load. Specifically, in the embodiment of the present application, a polling threshold is set to measure the load condition represented by the number of instructions. The specific value of the polling threshold may be determined according to the instruction condition corresponding to high load. The minimum number of instructions to be processed under the condition of high load can be counted as the polling threshold, or the energy consumption condition of the interrupt mode can be counted to obtain a corresponding relation curve between the number of instructions and the energy consumption, the number of instructions corresponding to the energy consumption turning points or the energy consumption high turning points is found out based on the curve, and the number is determined as the polling threshold. For example, the value may be between 30 and 50, although the size of the polling threshold may also be set and adjusted according to the actual system processing performance and requirements.
After the judgment result is obtained, different processing strategies can be correspondingly adopted to process the instruction according to different judgment results. Specifically, if the determination result is yes, step S103 is executed; if the judgment result is no, step S104 is executed.
And S103, entering a polling mode and processing the instruction generated by the host machine.
When it is determined that the number of the instructions is greater than the polling threshold, it indicates that the amount of the instructions to be processed belongs to a high load, and under the high load condition, the instructions cannot be rapidly processed by adopting the interrupt mode, and extra consumption is also brought by repeatedly switching context information, so that the polling mode can be entered to process the instructions generated by the host.
It should be noted that the polling mode can be divided into two cases, one of which is to enter the polling mode when the current mode is the interrupt mode, that is, to switch from the interrupt mode to the polling mode; secondly, if the current mode is the polling mode, the polling mode is entered, that is, the current mode is kept as the polling mode.
In one embodiment of the present application, entering the polling mode and processing the command generated by the host includes: and polling the host machine, acquiring the instruction generated by the host machine, and processing the instruction. In the polling mode, the embedded system actively polls the host machine so as to acquire the instruction generated by the host machine and then processes the instruction. In polling mode, no context switch is required.
Specifically, for how to process the instruction generated by the host after entering the polling mode, specific definition and implementation of the polling mode and a processing procedure corresponding to the instruction may be specifically referred to, and details are not repeated here.
And S104, entering an interrupt mode and processing the instruction.
When it is clear that the number of instructions is not greater than the polling threshold, this indicates that the amount of instructions that will need to be processed is not of high load. If the polling mode is adopted, the problems of high idle operation, CPU resource waste and system heat dissipation are caused, so that the polling mode can be entered into to process the instruction generated by the host machine.
It should be noted that the entering of the interrupt mode can be divided into two cases, one of which is that the current mode is the polling mode, and then the polling mode is entered, that is, the polling mode is switched to the interrupt mode; secondly, if the current mode is the interrupt mode, the interrupt mode is entered, that is, the interrupt mode is continuously maintained.
In an embodiment of the present application, entering an interrupt mode and processing an instruction includes:
step one, acquiring an instruction sent by a host machine, and switching context;
and step two, processing the instruction after completing the context switching.
For convenience of description, the above two steps will be described in combination.
In the interrupt mode, the embedded system acquires an instruction sent by a host machine, and after the instruction is acquired, the embedded CPU is informed to switch context, an interrupt processing program is called, and the instruction is processed.
Specifically, for how to process the instruction generated by the host after entering the interrupt mode, specific definition and implementation of the interrupt mode and a processing procedure corresponding to the instruction may be specifically referred to, and details are not repeated here.
By applying the method provided by the embodiment of the application, the number of instructions to be sent is obtained from a host machine; judging whether the instruction quantity is larger than a polling threshold value or not; if yes, entering a polling mode and processing an instruction generated by the host machine; if not, entering an interrupt mode and processing the instruction.
In the application, the number of instructions to be sent is first acquired from a host. Because the instruction to be sent is the instruction to be processed, the system load change condition can be more accurately judged based on the instruction number. Specifically, by setting a polling threshold, when the number of instructions is greater than the polling threshold, it is determined to enter a polling mode, and the instructions generated by the host are processed in the polling mode; and when the number of the instructions is not greater than the polling threshold value, determining to enter an interrupt mode, and processing the instructions generated by the host machine in the interrupt mode. Namely, in the application, the change situation of the system load is judged by acquiring the number of the instructions waiting to be processed on the I/O path, so that the interruption time of the hybrid polling switching is more accurate, and the energy consumption of the system is reduced under the condition of keeping the performance advantage.
It should be noted that, based on the foregoing embodiments, the embodiments of the present application also provide corresponding improvements. In the preferred/improved embodiment, the same steps as those in the above embodiment or corresponding steps may be referred to each other, and corresponding advantageous effects may also be referred to each other, which are not described in detail in the preferred/improved embodiment herein.
In one embodiment of the present application, the processed instructions may be counted in the polling mode to determine whether to exit the polling mode. Specifically, the entering of the polling mode in the step S103 to process the instruction generated by the host may specifically include:
step one, processing an instruction in a polling mode;
step two, counting the processing quantity of the instructions processed in the current polling cycle;
step three, after the current polling cycle is finished, judging whether the processing quantity is greater than an interruption threshold value;
if yes, continuing to maintain the polling mode and processing the instruction;
and step five, if not, entering an interrupt mode and processing the instruction.
For convenience of description, the above five steps will be described in combination.
In the polling mode, the specific process of processing the instruction may refer to the above description. The number of processes of the instructions processed may be counted during the current polling period. Due to the polling mode, there may be a round robin operation, and thus statistics are taken of the number of processes of the instructions processed, based on which it can be inferred whether the current polling mode does not generate additional waste of resources.
Specifically, after the current polling cycle is ended, whether the processing number is greater than an interrupt threshold value or not can be judged, if yes, the current round-robin operation is less, the current round-robin operation belongs to a high-load state, at this time, the polling mode processing instruction can be continuously kept without being switched to the interrupt mode; if not, the current idle running operation is more, the current idle running operation does not belong to a high load state, the polling mode does not need to be kept continuously at the moment, and the current idle running operation is switched to the interrupt mode to process the instruction, so that the resource waste is reduced.
The interruption threshold may be set and adjusted according to actual requirements, for example, the interruption threshold may be set to 10.
Wherein, the polling times or polling time is adjusted to adjust the time length of the polling period. I.e., one polling period corresponds to the number of polling times and the polling time, based on adjusting the number of polling times or the polling time, the time length of the polling period may be adjusted (time length = the product of the number of polling times and the polling time). The specific time length that needs to be adjusted is set and adjusted according to actual requirements, which is not limited in this embodiment.
Step two, counting the processing number of the instructions processed in the current polling cycle, wherein the step two comprises the following steps:
step 1, counting the recovery quantity of recovery instructions sent to a host machine in the current polling period;
and 2, determining the recycling quantity as the processing quantity.
That is, the embedded device (embedded system) may interact with the host through the PCIe protocol. The host computer allows to store the application program, the storage instruction is inserted into a queue to be processed (a sending queue), and the embedded system obtains the instruction to be processed from the host computer through the FPGA preprocessing module and sends the instruction to the embedded CPU polling processing module for processing. And after the storage instruction is processed, generating a recovery instruction and sending the recovery instruction to a host recovery queue through the FPGA for recovery processing.
That is, the recycle instruction set is a processed instruction, and based on the number of recycle instructions, it may indicate whether the current system load is appropriate to continue to remain polled.
In order to facilitate those skilled in the art to better understand the hybrid polling method provided in the embodiments of the present application, the following describes the hybrid polling method in detail with reference to specific application scenarios and related technologies as examples.
And predicting whether a polling mode is started or not by acquiring the speed of the CPU for processing the data packet. If the throughput speed of the equipment is judged to be low in the future period of time, an interrupt mode or a sleep period is carried out; if the predicted future throughput reaches a certain threshold, then polling is turned on to obtain a higher performance advantage.
The specific implementation scheme is as follows:
scheme a: referring to fig. 2, fig. 2 is a schematic diagram of hybrid polling of low latency devices. With the development of NVMe SSD hardware technology, ultra-low latency of storage hardware becomes one of the very important indicators for delay-sensitive applications. The efficient hybrid polling algorithm on the ultra-delay device performs a sleep interval of the pre-qualified hybrid polling algorithm based on the average delay time of the storage device, so as to start polling operation before the I/O returns, as shown in FIG. 2. The algorithm can reduce CPU utilization by 5% -40% and provide faster I/O latency up to 10%.
The scheme a has the characteristics that: ultra-low latency devices are primarily designed to achieve lower I/O latency times and do not meet the high throughput requirements of the device.
Scheme b: referring to fig. 3, fig. 3 is a schematic diagram illustrating a hybrid interrupt polling mode. The use of hybrid polling mode in network devices is a common way of performance optimization. In this mode, the network system processes packets using an interrupt mode during low network load conditions and a polling mode during high load conditions. The method for determining the load level is to determine the load level by the number of packets processed by an Interrupt Service Routine (ISR), as shown in fig. 3. If greater than a certain threshold, the system switches to polling mode, otherwise the interrupt mode is maintained.
The scheme b has the characteristics that: hybrid polling interrupts used in the network predict, based on the rate of packets already received, that the device will remain in a high load operating state for some future period of time, and may not achieve a good effect in some bursty traffic contexts.
In power consumption sensitive hardware, the power consumption loss or heat dissipation problems associated with using polling mode are very serious. For example, in embedded chips, the use of polling mode software to process data requires more powerful computing devices and higher-end heat sinks. Hybrid polling can solve the heat dissipation and energy loss problems of energy sensitive devices, but the switching polling algorithm determines the overall efficiency of the system.
From the above, in order to solve the above problems, the present application provides an adaptive hybrid polling algorithm based on data waiting for processing, which can effectively reduce the problem of energy waste caused by polling of computing hardware on an embedded storage device, thereby reducing the cost and improving the efficiency.
In the present application, the embedded device interacts with the host through the PCIe protocol. Allowing the application program to be stored in the host machine, inserting the storage instruction into a queue to be processed (shown in a figure transmission queue), and obtaining the instruction to be processed from the host machine by an FPGA (Field-programmable gate array) preprocessing module through the embedded system, and sending the instruction to be processed to a CPU polling processing module for processing. And after the storage instruction is processed, generating a recovery instruction and sending the recovery instruction to a host recovery queue through the FPGA for recovery processing.
Unlike the network I/O processing path, the store path's recycle queue commands are all from the transmit queue (pending queue) in the system, so the number of transmit queue commands or flight commands on the store I/O processing path can be used to determine whether the system load is suitable for polling.
Specifically, please refer to fig. 4 and 5, in which fig. 4 is a schematic diagram of a system architecture in an embodiment of the present application, and fig. 5 is a schematic diagram of an embodiment of a hybrid polling method in the embodiment of the present application. The specific steps are described as follows:
1. the host computer storage system generates a storage instruction, and inserts the storage instruction into the tail of a transmission instruction queue to wait for processing;
2, pulling the instructions to be processed in the HOSTQ by the FPGA hardware and acquiring the number of the waiting commands (same instructions);
3. if the number of waiting commands is less than a threshold a (polling threshold), the embedded system still maintains the interrupt mode, and the instruction is also processed by the interrupt thread;
4. if the number of the waiting commands is larger than or equal to the threshold value a, the system is switched to a polling mode to perform polling processing on the command;
5. the system will poll and process the transmission queue command in the polling cycle; and the time length thereof can be changed by configuring the polling times (loop _ count) or setting the polling time (loop _ time);
6. after each polling period is finished, judging whether the current mode is in a high-load mode or not by judging the number of the current processing instructions;
7. if the number of the processing instructions is larger than the threshold b (interrupt threshold), the system considers that the system is in a high-load mode at present, and the system continues the polling mode, otherwise, the system returns to the step 2;
8. the system exits.
Namely, in the application, the system load change condition is judged by acquiring the number of the waiting queues on the I/O path, so that the interrupt switching time of the hybrid polling algorithm is more accurate, and the system energy consumption is reduced under the condition of keeping the performance advantage.
Experiments prove that the hybrid polling method provided by the embodiment of the application is implemented in the embedded chip system, so that the energy consumption problem of the computing equipment in a low-load mode is effectively reduced, the heat dissipation of the computing equipment is obviously reduced, and high throughput and low delay performance close to those in a polling mode can be obtained in a high-load mode.
Corresponding to the above method embodiments, the present application further provides a hybrid polling device, and the hybrid polling device described below and the hybrid polling method described above may be referred to in correspondence with each other.
Referring to fig. 6, the apparatus includes the following modules:
an instruction quantity obtaining module 101, configured to obtain a quantity of instructions to be sent from a host;
a judging module 102, configured to judge whether the instruction number is greater than a polling threshold;
the instruction processing module 103 is used for entering a polling mode and processing an instruction generated by a host machine if the instruction is positive; if not, entering an interrupt mode and processing the instruction.
By applying the device provided by the embodiment of the application, the number of instructions to be sent is obtained from a host machine; judging whether the instruction quantity is larger than a polling threshold value; if yes, entering a polling mode and processing an instruction generated by the host machine; if not, entering an interrupt mode and processing the instruction.
In the application, the number of instructions to be sent is first obtained from a host machine. Because the instruction to be sent is the instruction to be processed, the system load change condition can be more accurately judged based on the instruction number. Specifically, by setting a polling threshold, when the number of instructions is greater than the polling threshold, it is determined to enter a polling mode, and the instructions generated by the host are processed in the polling mode; and when the number of the instructions is not greater than the polling threshold value, determining to enter an interrupt mode, and processing the instructions generated by the host machine in the interrupt mode. Namely, in the application, the change situation of the system load is judged by acquiring the number of the instructions waiting to be processed on the I/O path, so that the interruption time of the hybrid polling switching is more accurate, and the energy consumption of the system is reduced under the condition of keeping the performance advantage.
In a specific embodiment of the present application, the instruction processing module 103 is specifically configured to process an instruction in a polling mode;
counting the processing number of the instructions processed in the current polling period;
after the current polling period is finished, judging whether the processing quantity is greater than an interrupt threshold value;
if yes, continuing to maintain the polling mode and processing the instruction;
if not, entering an interrupt mode and processing the instruction.
In a specific embodiment of the present application, the instruction processing module 103 is specifically configured to count a recovery number of recovery instructions sent to a host in a current polling period;
the recycle number is determined as the process number.
In a specific embodiment of the present application, the method further includes:
and the polling adjusting module is used for adjusting the polling times or the polling time so as to adjust the time length of the polling period.
In a specific embodiment of the present application, the instruction quantity obtaining module 101 is specifically configured to obtain the instruction quantity in a polling mode or an interrupt mode.
In a specific embodiment of the present application, the instruction processing module 103 is specifically configured to obtain an instruction sent by a host, and switch contexts;
and processing the instruction after the context switching is completed.
In a specific embodiment of the present application, the instruction processing module 103 is specifically configured to poll a host, obtain an instruction generated by the host, and process the instruction.
Corresponding to the above method embodiment, the present application further provides an electronic device, and the electronic device described below and the hybrid polling method described above may be referred to in correspondence.
Referring to fig. 7, the electronic device includes:
a memory 332 for storing a computer program;
a processor 322 for implementing the steps of the hybrid polling method of the above-described method embodiments when executing a computer program.
Specifically, referring to fig. 8, fig. 8 is a schematic structural diagram of an electronic device provided in this embodiment, which may generate relatively large differences due to different configurations or performances, and may include one or more processors (CPUs) 322 (e.g., one or more processors) and a memory 332, where the memory 332 stores one or more computer applications 342 or data 344. Memory 332 may be, among other things, transient or persistent storage. The program stored in memory 332 may include one or more modules (not shown), each of which may include a sequence of instructions operating on a data processing device. Still further, the central processor 322 may be configured to communicate with the memory 332 to execute a sequence of instruction operations in the memory 332 on the electronic device 301.
The electronic device 301 may also include one or more power sources 326, one or more wired or wireless network interfaces 350, one or more input-output interfaces 358, and/or one or more operating systems 341.
The steps in the hybrid polling method described above may be implemented by the structure of the electronic device.
Corresponding to the above method embodiment, this application embodiment further provides a readable storage medium, and a readable storage medium described below and a hybrid polling method described above may be correspondingly referred to with each other.
A readable storage medium, having stored thereon a computer program which, when executed by a processor, carries out the steps of the hybrid polling method of the above-described method embodiments.
The readable storage medium may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and various other readable storage media capable of storing program codes.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. The device disclosed in the embodiment corresponds to the method disclosed in the embodiment, so that the description is simple, and the relevant points can be referred to the description of the method part.
Those of skill would further appreciate that the various illustrative components and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
Finally, it should also be noted that, herein, relationships such as first and second, etc., are intended only to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms include, or any other variation is intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
The principle and the embodiment of the present application are explained by applying specific examples, and the above description of the embodiments is only used to help understand the method and the core idea of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A hybrid polling method, comprising:
acquiring the number of instructions to be sent from a host machine;
judging whether the instruction quantity is larger than a polling threshold value;
if yes, entering a polling mode and processing an instruction generated by the host machine;
if not, entering an interrupt mode and processing the instruction.
2. The hybrid polling method of claim 1, wherein the entering into the polling mode and processing the command generated by the host comprises:
processing the instruction in the polling mode;
counting a processing number of the instructions processed in a current polling period;
after the current polling cycle is finished, judging whether the processing quantity is greater than an interruption threshold value;
if yes, continuing to maintain the polling mode and processing the instruction;
if not, entering the interrupt mode and processing the instruction.
3. The hybrid polling method of claim 2, wherein the counting the number of processes of the instruction processed in a current polling cycle comprises:
counting the recovery quantity of recovery instructions sent to the host machine in the current polling period;
determining the recycle quantity as the process quantity.
4. The hybrid polling method of claim 2, further comprising:
the number of polls or the polling time is adjusted to adjust the length of the polling period.
5. The hybrid polling method of claim 1, wherein the obtaining the number of commands to be sent from the host comprises:
and acquiring the instruction quantity in the polling mode or the interrupt mode.
6. The hybrid polling method of any of claims 1 to 5, wherein entering an interrupt mode, processing the instruction, comprises:
acquiring an instruction sent by the host machine, and switching context;
and processing the instruction after the context switching is completed.
7. The hybrid polling method of any one of claims 1 to 5, wherein the entering into the polling mode and processing the command generated by the host comprise:
and polling the host machine, acquiring the instruction generated by the host machine, and processing the instruction.
8. A hybrid polling device, comprising:
the instruction quantity acquisition module is used for acquiring the quantity of instructions to be sent from the host machine;
the judging module is used for judging whether the instruction quantity is larger than a polling threshold value or not;
the instruction processing module is used for entering a polling mode and processing an instruction generated by the host machine if the host machine is in the polling mode; if not, entering an interrupt mode and processing the instruction.
9. An electronic device, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the hybrid polling method according to any one of claims 1 to 7 when executing the computer program.
10. A readable storage medium, having stored thereon a computer program which, when executed by a processor, carries out the steps of the hybrid polling method according to any one of claims 1 to 7.
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