CN112817527A - Power failure data storage method, single chip microcomputer and computer readable storage medium - Google Patents
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Abstract
The application discloses a power failure data storage method, a single chip microcomputer and a computer readable storage medium, wherein the power failure data storage method comprises the following steps: dividing a storage module to obtain a first sector and a second sector; dividing the first sector and the second sector into a plurality of data areas; each data area comprises a writing area for writing data and a full area written with data; receiving a power-down signal; determining a target write data area from the write area according to the power-down signal; wherein the target write data area is one of the write areas; writing the backup data into the target write-in data area, modifying the zone bit of the target write-in data area, erasing the sector once without storing data once, and erasing the sector until all the data areas in the sector are fully stored, thereby prolonging the service life of the F l ash memory of the singlechip.
Description
Technical Field
The application relates to the technical field of data reading and writing, in particular to a power failure data storage method, a single chip microcomputer and a computer readable storage medium.
Background
In the single chip microcomputer system, user data may change at different time along with different application scenes, and the single chip microcomputer system is required to be capable of storing the changed data in time. At present, when a single chip microcomputer uses a Flash nonvolatile medium for data storage, the power supply condition of equipment can be judged by monitoring the power supply state, when power failure occurs, the power consumption of the single chip microcomputer equipment is reduced to the minimum, the next short-time work of a microcontroller is maintained by means of a capacitor, and the single chip microcomputer is used for storing user data in an RAM into Flash. Storing data into Flash generally comprises the following steps of reading data in a RAM memory to search a sector stored in Flash, erasing the sector stored in Flash, and writing the data to be stored into the sector stored in Flash from the RAM. When writing data, all original data of a target sector to which the data needs to be written must be erased before the data can be written. Therefore, when only a few bytes of data need to be written, the whole sector can be erased, the size of the sector is different from 16KB to 128KB, but the erasing times of the FLASH are limited, generally more than ten thousand times, and the service life of the FLASH memory of the singlechip is reduced due to repeated erasing.
Disclosure of Invention
The present application is directed to solving at least one of the problems in the prior art. Therefore, the application provides a power-down data storage method, a single chip microcomputer and a computer readable storage medium, and the service life of a Flash memory of the single chip microcomputer is prolonged.
In a first aspect, an embodiment of the present application provides a method for storing power failure data, including:
dividing a storage module to obtain a first sector and a second sector;
dividing the first sector and the second sector into a plurality of data areas; each data area comprises a writing area for writing data and a full area written with data;
receiving a power-down signal;
determining a target write data area from the write area according to the power-down signal; wherein the target write data area is one of the write areas;
and writing the backup data into the target write data area, and modifying the zone bit of the target write data area.
According to the power-down data storage method in the embodiment of the first aspect of the application, at least the following beneficial effects are achieved: the Flash memory is divided into a first sector and a second sector for data storage, a plurality of data areas are divided for the first sector and the second sector, when the two sectors are used for erasing data, the other sector can be ensured to be reserved with a piece of correct data, the two sectors can play a role of backup protection, the error deletion of the correct data when the sectors are erased is avoided, each data area has marks of written data and unwritten data, the backup data is only written into the unwritten data area in the first sector or the second sector when power failure occurs each time, the marks of the written data areas are changed, one sector can store a plurality of data in different data areas, the Flash space utilization rate is improved, meanwhile, the sectors are erased once without storing data once, and the sectors are erased until all the data areas in the sectors are fully stored, the service life of the Flash memory of the singlechip is prolonged.
According to some embodiments of the first aspect of the present application, the determining a target write data area from the write area according to the power down signal comprises: determining a first lowest data area in the writing area of the first sector and a second lowest data area in the writing area of the second sector according to the power-down signal; and determining the target writing data area according to the first lowest data area and the second lowest data.
According to some embodiments of the first aspect of the present application, said determining the target write data area from the first minimum data area and the second minimum data area comprises: judging the size relationship between the first lowest data area and the second lowest data, and if the first lowest data area is lower than or equal to the second lowest data area, setting the first lowest data area as the target write data area; and if the first lowest data area is higher than the second lowest data area, setting the second lowest data area as the target writing data area.
According to some embodiments of the first aspect of the present application, the determining a target write data area from the write area according to the power down signal further comprises: determining a storage state of the first sector and the second sector; the storage states include a full state and an unfilled state; if the first sector and the second sector are both in a full state and the second sector includes correct data, erasing the first sector and setting the lowest data area of the first sector as the target write data area; and if the first sector and the second sector are in a full-storage state and the second sector does not contain correct data, erasing the second sector, and setting the highest data area of the second sector as the target write data area and the non-highest data area of the second sector as a full area.
According to some embodiments of the first aspect of the present application, the determining a target write data area from the write area according to the power down signal further comprises: if the second sector is in a full state and the first sector is in an unfilled state and the first sector comprises correct data, erasing the second sector and setting the lowest data area of the second sector as the target write data area; if the second sector is not full and the first sector does not include correct data, the first sector is erased and the lowest data area of the first sector is set as the target write data area.
Some embodiments according to the first aspect of the present application further comprise: inquiring a latest correct data area in the full areas of the first sector and the second sector; and updating the data of the latest correct data area into the memory.
According to some embodiments of the first aspect of the present application, the querying a latest correct data area in the full area of the first sector and the second sector comprises: inquiring and checking all full areas of the first sector with correct data, and determining a first highest data area in the full areas of the first sector; and inquiring and checking all full areas of the second sector with correct data, and determining the second highest data area in the full areas of the second sector.
According to some embodiments of the first aspect of the present application, the updating the data of the latest correct data area to the memory includes: judging the size relationship between the first highest data area and the second highest data, and if the second highest data area is higher than or equal to the first highest data area, updating the data of the second highest data area into a memory; and if the second highest data area is lower than the first highest data area, updating the data of the first highest data area into the memory.
In a second aspect, an embodiment of the present application provides a single chip microcomputer, including: the storage device comprises a processor, a memory and a computer program which is stored on the memory and can run on the processor, wherein the processor executes the computer program to realize the power failure data storage method in any embodiment of the first aspect of the application.
In a third aspect, an embodiment of the present application provides a computer-readable storage medium, where computer-executable instructions are stored in the computer-readable storage medium, and the computer-executable instructions are configured to cause a computer to execute a power-down data storage method described in any one embodiment of the first aspect of the present application.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
Additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a flow chart of a method for storing power-down data according to an embodiment of the present application;
FIG. 2 is a flow chart of a method for storing power-down data according to another embodiment of the present application;
FIG. 3 is a flow chart of a method for storing powered-down data provided by another embodiment of the present application;
FIG. 4 is a flow chart of a method for storing powered-down data provided by another embodiment of the present application;
FIG. 5 is a flow chart of a method for storing powered-down data provided by another embodiment of the present application;
FIG. 6 is a flow chart of a method for storing powered-down data provided by another embodiment of the present application;
FIG. 7 is a flow chart of a method for storing powered-down data provided by another embodiment of the present application;
FIG. 8 is a flow chart of a method for storing powered-down data provided by another embodiment of the present application;
fig. 9 is a schematic structural diagram of a single chip microcomputer provided in the embodiment of the present application.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.
In the description of the present application, if there are first and second described only for the purpose of distinguishing technical features, it is not understood that relative importance is indicated or implied or that the number of indicated technical features or the precedence of the indicated technical features is implicitly indicated or implied.
The embodiments of the present invention will be further explained with reference to the drawings.
Referring to fig. 1, fig. 1 is a flowchart of a method for storing power-down data according to an embodiment of the present application. The power-down data storage method includes, but is not limited to, step S110, step S120, step S130, step S140, and step S150.
Step S110, dividing the storage module to obtain a first sector and a second sector;
step S120, dividing the first sector and the second sector into a plurality of data areas; each data area includes a write area for writing data and a full area where data has been written;
step S130, receiving a power-down signal;
step S140, determining a target write data area from the write area according to the power-down signal; wherein the target write data area is one of the write areas.
Step S150, writing the backup data into the target write data area, and modifying the flag bit of the target write data area.
It should be noted that, when the backup data is written in the write area, so that the data area has the backup data, the area is a full data area in which the data has been written.
It can be understood that the Flash memory is reserved with a first sector and a second sector for data storage, the first sector and the second sector are divided into a plurality of data areas, when two sectors are used for erasing data from one sector, the other sector can be ensured to be reserved with a correct data, the two sectors can play a role of backup protection, the error deletion of the correct data when the sectors are erased is avoided, each data area has an identification of written data and unwritten data, the backup data is only written into the unwritten data area in the first sector or the second sector when power failure occurs, the identification change is made to the written data area, one sector can store a plurality of data in different data areas, the Flash space utilization rate is improved, meanwhile, the sectors are erased once without storing data once, the sectors are erased until all the data areas in the sectors are fully stored, the service life of the Flash memory of the singlechip is prolonged.
Specifically, for example, the Flash memory is provided with a first sector and a second sector for power-down backup data storage, the first sector and the second sector have a storage size of 128KB, the first sector and the second sector are equally divided into 8 data areas, the storage size of each data area is 16KB, a specific byte is used as a data flag bit in each data area, a "1" represents unwritten, "a" 0 "represents written data, each data area can store data smaller than 16KB, when a power-down signal is received, the single chip microcomputer system detects the data area with the flag bit of" 1 "in the first sector and the second sector and determines the data area as a determination target writing data area, the data is written into the determination target writing data area, after the data is written into the determination target writing data area, the flag bit is rewritten from" 1 "to" 0 "to indicate written, only one data bit of one sector is selected for each writing, when 8 data bits of a sector are fully written, the Flash memory is erased, the space utilization rate of the Flash is improved, the erasing frequency of the sector is reduced, and the service life of the Flash memory of the single chip microcomputer is prolonged.
Referring to fig. 2, fig. 2 is a flowchart of a power-down data storage method according to another embodiment of the present application, and step S140 may include, but is not limited to, the following steps:
step S210: a first lowest data area in the write area of the first sector and a second lowest data area in the write area of the second sector are determined based on the power down signal.
Specifically, for example, when it is detected that the flag bit of the first sector is written in binary "11111100", the third to eighth data areas in the first sector are data areas to which data is not written, wherein the third data area is the first lowest data area, and for example, when it is detected that the flag bit of the second sector is written in binary "11111111110", the second to eighth data areas in the second sector are data areas to which data is not written, wherein the second data area is the second lowest data area.
Step S220: a target write data area is determined based on the first minimum data area and the second minimum data area.
Referring to fig. 3, fig. 3 is a flowchart of a power-down data storage method according to another embodiment of the present application, and step S220 may include, but is not limited to, the following steps:
in step S310, the size relationship between the first minimum data area and the second minimum data area is determined.
In step S320, if the first minimum data area is lower than or equal to the second minimum data area, the first minimum data area is set as the target write data area.
Specifically, for example, when the first minimum data area is the third data area, the second minimum data area is also the third data area, and the first minimum data area is equal to the second minimum data area, the target write data area is the third data area of the first sector, that is, the position where data is written next time is the third data area of the first sector.
In step S330, if the first minimum data area is higher than the second minimum data area, the second minimum data area is set as the target write data area.
Specifically, for example, when the first minimum data area is the third data area, the second minimum data area is also the second data area, and the first minimum data area is higher than the second minimum data area, the target write data area is the second data area of the second sector, that is, the position where data is written next time is the second data area of the second sector.
It will be appreciated that the target write data area is always written from the lower order data area and always written preferentially to the first sector, thus enabling the two sectors to start writing with the data area of the lowest order of alternation.
Referring to fig. 4, fig. 4 is a flowchart of a power-down data storage method according to another embodiment of the present application, and step S220 may include, but is not limited to, the following steps:
step S410: determining the storage states of the first sector and the second sector; the storage states include a full state and an unfilled state.
Step S420: if the first sector and the second sector are both in a full state and the second sector includes correct data, the first sector is erased and the lowest data area of the first sector is set as the target write data area.
Step S430: and if the first sector and the second sector are in a full state and the second sector does not contain correct data, erasing the second sector, setting the highest data area of the second sector as a target write data area and setting the non-highest data area of the second sector as a full area.
When it is required to be described, the full state means that all data are full areas, that is, full data is stored.
Specifically, the first sector is preferentially written in the writing process, and after 16 times of writing, the flag bit of the first sector becomes binary "00000000", and similarly, the flag bit of the second sector also becomes binary "00000000", at this time, it is necessary to check whether there is at least one piece of correct data in the second sector, and if there is correct data, the first sector is erased, and the lowest data area of the first sector is set as the target writing data area, that is, the first data area of the first sector is set as the target writing data area, and the flag bit of the first sector becomes binary "11111111111"; if the second sector does not have correct data, the second sector is erased, the highest data area of the second sector is set as a write area, other data areas are set as full areas, the highest data area of the second sector is set as a target write data area, namely, the eighth data area of the second sector is a target write data area, the flag bit of the second sector is changed into binary '10000000', the next data is ensured to be written into the eighth data area of the second sector, and the binary of the first sector and the second sector is '00000000' when the flag bit is detected next time.
Referring to fig. 5, fig. 5 is a flowchart of a power-down data storage method according to another embodiment of the present application, and step S220 may include, but is not limited to, the following steps:
in step S510, if the second sector is in a full state and the first sector is in an unfilled state and the first sector includes correct data, the second sector is erased and the lowest data area of the second sector is set as the target write data area.
In step S520, if the second sector is not in the full state and the first sector is in the full state and the first sector does not include correct data, the first sector is erased and the lowest data area of the first sector is set as the target write data area.
Specifically, after 16 times of data writing, the flag bit of the first sector becomes binary "00000000", and similarly, the flag bit of the second sector also becomes binary "00000000", and at least one copy of correct data exists in the second sector, the first sector is erased, and the lowest data area of the first sector is set as the target write data area, that is, the first data area of the first sector is set as the target write data area, after the data is written in the first data area of the first sector, the flag bit of the first sector becomes binary "11110", the flag bit of the second sector is binary "00000000", and when the data is written in Flash next time, when the second sector is detected and the write area of the first sector exists, and the data of the lowest data area of the first sector is correct, the second sector is erased, the lowest data area of the second sector is set as the target write data area, that is, the first data area of the second sector is the target write data area, the flag bit of the second sector is changed into binary '11111111' so as to achieve the purpose of alternately writing data into the lowest bits of the first sector and the second sector; when the data areas of the second sector are all full areas and the first sector is detected to have a write area and the data error of the lowest data area of the first sector is detected, the first sector is erased, the lowest data area of the first sector is set as a target write data area, namely the first data area of the first sector is set as the target write data area, the flag bit of the first sector is changed into binary '11111111', and the Flash memory is ensured to have at least one correct data to be kept in the second sector.
It is understood that when all data areas of a sector are full, the erase operation cannot always be performed directly, and it needs to be considered whether at least one correct data is retained in another sector.
The power failure data storage method can further comprise, but is not limited to, the following steps: and after time interval protection is carried out on the written data, power failure signal detection is carried out.
Specifically, erasing and writing of Flash needs to consume a long time, and the number of times of erasing and writing is limited, so a period of time guard interval is added in the process, loss of written data due to too frequent erasing and writing operations is prevented, the guard interval can be set to 40s, 60s and the like, and of course, other different time intervals can be set, which is not limited in the present application.
Referring to fig. 6, fig. 6 is a flowchart of a method for storing power-down data according to another embodiment of the present application. The power failure data storage method further comprises but is not limited to the following steps:
step S610: inquiring the latest correct data area in the full areas of the first sector and the second sector;
step S620: and updating the data of the latest correct data area into the memory.
It can be understood that, after the system is powered on, the system will restore the latest data backed up when the system was powered down last time, query the latest correct data from the first sector and the second sector, and restore the latest correct data to the memory, for example, query that the latest correct data is in the seventh data area of the first sector, and restore the backup data in the seventh data area of the first sector.
It should be noted that a common method for checking the data correctness in the single chip microcomputer is crc (Cyclic Redundancy Check). For example, the crc code and the length may always be placed at the beginning of the data area, and then it is calculated whether the data stored in the data area is consistent with the crc code at the beginning, and if so, the data is correct.
Referring to fig. 7, fig. 7 is a flowchart of a power-down data storage method according to another embodiment of the present application, and step S610 may include, but is not limited to, the following steps:
step S710: inquiring and checking all full areas of the first sector with correct data, and determining a first highest data area in the full areas of the first sector;
specifically, all data areas of the first sector with correct data written thereto are detected and verified, for example, the binary system of the flag bit of the first sector is "11100000", the data areas with the correct data written thereto include the first data area to the fifth data area, and then the data of the fifth data area is verified, and if the data of the fifth data area is correct, the fifth data area of the first sector is the first highest data area.
Step S720: and inquiring and checking all full areas of the second sector with correct data, and determining the second highest data area in the full areas of the second sector.
Specifically, all data areas of the first sector, in which data is correct, are detected and verified, for example, the binary system of the flag bit of the second sector is "11111000", the data areas, in which data is written, have the first data area to the third data area, and then the data of the third data area is verified, if the data of the third data area is incorrect, the data of the second data area continues to be verified, and if the data of the second data area is correct, the second data area of the second sector is the second highest data area.
Referring to fig. 8, fig. 8 is a flowchart of a power-down data storage method according to another embodiment of the present application, and step S620 may include, but is not limited to, the following steps:
step S810: and judging the size relationship between the first highest data area and the second highest data.
Step S820: and if the second highest data area is higher than or equal to the first highest data area, updating the data in the second highest data area into the memory.
Specifically, for example, if the second highest data area is the seventh data area of the second sector, the first highest data area is the seventh data area of the first sector, and the second highest data area is equal to the first highest data area, the data in the second highest data area is restored to the memory, that is, the data in the seventh data area of the second sector is restored.
Step S830: and if the second highest data area is lower than the first highest data area, recovering the data in the first highest data area to the memory.
Specifically, for example, if the second highest data area is the seventh data area of the second sector, the first highest data area is the eighth data area of the first sector, and the second highest data area is lower than the first highest data area, the data in the first highest data area is restored to the memory, that is, the data in the eighth data area of the first sector is restored.
It should be understood that the flag bit is the last byte of the data area, and may also be a byte elsewhere in the data area, which is not limited in this application.
In a second aspect, referring to fig. 9, the present application further provides a single chip microcomputer, which includes a processor, a memory, and a computer program stored in the memory and executable on the processor, and when the processor executes the computer program, the power failure data storage method according to any one of the embodiments of the first aspect is implemented.
The processor and memory may be connected by a bus or other means.
The memory, which is a non-transitory computer readable storage medium, may be used to store non-transitory software programs, non-transitory computer executable programs, and signals, such as program instructions/signals corresponding to the enterprise research and development investment potential evaluation system in the embodiments of the present application. The processor executes various functional applications and data processing by running the non-transitory software programs, instructions and signals stored in the memory, so as to realize the enterprise research and development investment potential evaluation method of the above method embodiment.
The memory may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area can store the related data of the enterprise research and development input potential evaluation method and the like. Further, the memory may include high speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory optionally includes memory remotely located from the processor, and the remote memory may be connected to the enterprise development investment potential evaluation system via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The one or more signals are stored in a memory and, when executed by the one or more processors, perform the power down data storage method of any of the method embodiments described above. For example, the above-described method steps S110 to S150 in fig. 1, method steps S210 to S220 in fig. 2, method steps S310 to S330 in fig. 3, method steps S410 to S430 in fig. 4, method steps S510 to S520 in fig. 5, method steps S610 to S620 in fig. 6, method steps S710 to S720 in fig. 7, and method steps S810 to S830 in fig. 8 are performed.
In a third aspect, another embodiment of the present application further provides a computer-readable storage medium, where the computer-readable storage medium stores computer-executable instructions, which are executed by a processor or a controller, for example, by a processor in the foregoing single-chip microcomputer embodiment, and enable the processor to execute the power-down data storage method in the foregoing embodiment, for example, execute the method steps S110 to S150 in fig. 1, the method steps S210 to S220 in fig. 2, the method steps S310 to S330 in fig. 3, the method steps S410 to S430 in fig. 4, the method steps S510 to S520 in fig. 5, the method steps S610 to S620 in fig. 6, the method steps S710 to S720 in fig. 7, and the method steps S810 to S830 in fig. 8, which are described above.
One of ordinary skill in the art will appreciate that all or some of the steps, systems, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.
The embodiments of the present application have been described in detail with reference to the drawings, but the present application is not limited to the embodiments, and various changes can be made without departing from the spirit of the present application within the knowledge of those skilled in the art.
Claims (10)
1. A method for storing power-down data is characterized by comprising the following steps:
dividing a storage module to obtain a first sector and a second sector;
dividing the first sector and the second sector into a plurality of data areas; each data area comprises a writing area for writing data and a full area written with data;
receiving a power-down signal;
determining a target write data area from the write area according to the power down signal; wherein the target write data area is one of the write areas;
and writing the backup data into the target write data area, and modifying the zone bit of the target write data area.
2. The method for storing power-down data according to claim 1, wherein the determining a target write data area from the write area according to the power-down signal comprises:
determining a first lowest data area in the writing area of the first sector and a second lowest data area in the writing area of the second sector according to the power-down signal;
and determining the target writing data area according to the first lowest data area and the second lowest data.
3. The method for storing power-down data according to claim 2, wherein the determining the target write data area according to the first minimum data area and the second minimum data area comprises:
judging the size relationship between the first lowest data area and the second lowest data area,
if the first lowest data area is lower than or equal to the second lowest data area, setting the first lowest data area as the target write data area;
and if the first lowest data area is higher than the second lowest data area, setting the second lowest data area as the target writing data area.
4. The method for storing power-down data according to claim 2, wherein the determining a target write data area from the write area according to the power-down signal further comprises:
determining a storage state of the first sector and the second sector; the storage states include a full state and an unfilled state;
if the first sector and the second sector are both in a full state and the second sector includes correct data, erasing the first sector and setting the lowest data area of the first sector as the target write data area;
and if the first sector and the second sector are in a full-storage state and the second sector does not contain correct data, erasing the second sector, and setting the highest data area of the second sector as the target write data area and the non-highest data area of the second sector as a full area.
5. The method for storing power-down data according to claim 4, wherein the determining a target write data area from the write area according to the power-down signal further comprises:
if the second sector is in a full state and the first sector is in an unfilled state and the first sector comprises correct data, erasing the second sector and setting the lowest data area of the second sector as the target write data area;
if the second sector is not full and the first sector does not include correct data, the first sector is erased and the lowest data area of the first sector is set as the target write data area.
6. The method for storing power-down data according to claim 1, further comprising:
inquiring a latest correct data area in the full areas of the first sector and the second sector;
and updating the data of the latest correct data area into the memory.
7. The method for storing power-down data according to claim 6, wherein said querying the latest correct data area in the full area of the first sector and the second sector comprises:
inquiring and checking all full areas of the first sector with correct data, and determining a first highest data area in the full areas of the first sector;
and inquiring and checking all full areas of the second sector with correct data, and determining the second highest data area in the full areas of the second sector.
8. The method for storing power-down data according to claim 7, wherein the updating the data in the latest correct data area into a memory comprises:
judging the size relationship between the first highest data area and the second highest data area,
if the second highest data area is higher than or equal to the first highest data area, updating the data of the second highest data area into the memory;
and if the second highest data area is lower than the first highest data area, updating the data of the first highest data area into the memory.
9. A single chip microcomputer is characterized by comprising: a processor, a memory and a computer program stored on the memory and executable on the processor, the processor implementing the power loss data storage method according to any one of claims 1 to 8 when executing the computer program.
10. A computer-readable storage medium storing computer-executable instructions for causing a computer to perform the method for storing power-lost data according to any one of claims 1 to 8.
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