CN102890657A - Method for reducing data read-write errors of EEPROM (electrically erasable programmable read-only memory) - Google Patents
Method for reducing data read-write errors of EEPROM (electrically erasable programmable read-only memory) Download PDFInfo
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Abstract
The invention provides a method for reducing data read-write errors of an EEPROM. The method comprises the following steps: an array defining step for defining a buffer array in an SRAM (static random access memory) and defining a data area array and a backup area array in the EEPROM, wherein both the data area array and the backup area array include CRC (cyclic redundancy check) data; a data writing step for writing data in the EEPROM; a check data computation step for writing the computed CRC data in check data areas of the data area array and the backup area array; a data checking step for checking validity of the data area array and the backup area array by the CRC data; a data restoring step; and a default overriding step. The method for reducing data read-write errors of the EEPROM can effectively reduce the data read-write error probability of the EEPROM under abnormal conditions including read-write power-down, strong interference, strong electrostatic and the like, can not occupy more space of the EEPROM, is less in software overhead, and is stable and reliable in program.
Description
Technical field
The present invention relates to a kind of data guard method, relate in particular to the method that a kind of reading and writing data that reduces cheaply EEPROM is made mistakes.
Background technology
EEPROM belongs to " non-volatile data memory ", and it can not participate in the ALU computing directly, is the storage for the significant data of not losing after the power down; Read these data after re-powering, to keep the state of system before shutdown, as needing to remember some functional statuses after automobile audio and the air conditioning for automobiles shutdown.
EEPROM and ram in slice are similar, also belong to data-carrier store, and its feature is that the data power down can keep, and program storage refers generally to ROM, are used for storage user program code.
FLASH is for program code stored, some occasion also may be come save data with it, certainly prerequisite is that the FLASH technique of this single-chip microcomputer is (in service erasable) that can certainly write, and the erasable number of times of FLASH is usually less than 10,000 times, and FLASH can only wipe by piece usually.
The erasable number of times of EEPROM can reach 1,000,000 times, and can be erasable by byte.FLSAH then must be erased into first BLANK, and then writes, and the function that does not generally have byte to wipe, at least one sector erasing.
But EEPROM fashionablely may be subjected to external interference (radiation writing, static, forceful electric power, hot and humid etc.) or internal system design defect (software, the address of hardware etc.) causing the error in data that writes or program fleet to write wrong EEPROM, and then cause when reading EEPROM, having read in invalid or wrong data, may cause action even the collapse of system mistake.
Below 4 kinds of factors may cause the data of EEPROM to make mistakes.
If 1 supply voltage is excessively low, it is undesired that CPU and EEPROM might work, and causes the damage of EEPROM data or lose.Because brownout causes the EEPROM corrupted data that two kinds of possibilities are arranged: the one, voltage is lower than the needed minimum voltage of EEPROM write operation; The 2nd, CPU itself can't work.
2, device interrupts when read-write unusually.
3, high temperature, high humidity, radiation, static, strong-electromagnetic field environment may cause the electric charge partial loss of the storage unit of EEPROM, cause loss of data or holding time to shorten.
4, EEPROM writes indegree too much (this problem frequently write fashionable meeting run into), causes to write.
Therefore, the write error of how evading and recovering EEPROM just seems and has been even more important, although the way of the write error of setting about reducing EEPROM from the software and hardware aspect is also arranged at present, and what existing scheme all was difficult to avoid is exactly that ubiquity needs larger storage space, software overhead are large, program is unstable and the high in cost of production drawback.
Summary of the invention
Technical matters to be solved by this invention be need to provide a kind of and need not to take that larger EEPROM space, software overhead are little, method that the reading and writing data of minimizing EEPROM that Procedure Haleness and cost are low is made mistakes.
To this, the invention provides the method that the reading and writing data of a kind of EEPROM of minimizing is made mistakes, may further comprise the steps:
The array define step, in a buffering of SRAM definition array, two arrays of definition in EEPROM, the two number groups that define among the described EEPROM are respectively data field array and backup area array, include the CRC check data in described data field array and the backup area array;
The data write step when writing data in the EEPROM, is put into data in the buffering array first, and calls and write data that function will cushion array in order data writing district array and backup area array;
The checking data calculation procedure is called the CRC check data that the verification function calculation goes out current backup, and this CRC check data is write the checking data zone of data field array and backup area array;
The data check step is carried out verification by the CRC check data to the validity of data field array and backup area array behind the system power-on reset, if all effectively then normally read the data of EEPROM, if not, then jumps to data and repairs step;
Data are repaired step, if having the data in a district effective in data field array and the backup area array, then the data of damaging are repaired, otherwise jump to the acquiescence re-writing step; And,
The acquiescence re-writing step writes the value of normal demarcation of acquiescence again to the data field array in the EEPROM and backup area array.
Wherein, EEPROM(electrically erasable programmable read-only memory), full name is the ROM (read-only memory) (being called for short E side) of electric erasable and reprogramming, the present invention has backup when data write EEPROM, checking is arranged during data reading, and there is a data recovery measure, write the data of EEPROM at every turn, all do a backup, the data of data field array and backup area array are all done CRC check, be preferably CRC16 check, as long as system is in service to make mistakes, will bug patch the data of EEPROM, which be modified with regard to the data of knowing backup according to the check byte in the checking data so, then cover the backup that makes mistakes with correct backup, the purpose of recovering to reach data, and then so that the error rate that writes with sense data drops to minimum.
The write error problem of EEPROM is difficult to avoid, therefore just the relevant measure of keeping away and the recovery measure of returning should be arranged: from hardware aspect, it is necessary adding the BOD detection method, namely add the low-voltage detection method, this mode of prior art can realize by the power-fail detection circuit BOD that enables chip, it is low keeping the RESET signal when the MCU brownout, restarts and rewrite the data of EEPROM with the reliable reset that guarantees system; Can use the external reset circuit if the BOD level can't meet the demands, if occured to reset in the middle of the write operation process, as long as voltage is enough high, write operation will normal termination.But the mode defective by this hardware is exactly power filter to chip to have higher requirements, the frequency of operation that position and single-chip microcomputer are set for reset circuit, the crystal oscillator chip crystal oscillator of chip also should carefully be processed, anti-interference to improve, so, will certainly cause the increase on the cost.
From the software aspect, can have following mode to control: (1) needs to carry out the checking measure to the EEPROM data that write before writing EEPROM, if undesiredly then do not write; (2) owing to being interfered, hardware causes program fleet writing in the subroutine to EEPROM, because failing to carry out correct sequential, the certain mistake of parameter transmission, the certain mistake of program writing address of namely setting, if then the specified EEPROM entry address of discovery procedure person is not right in writing subroutine, then think illegal writing, it also is the same reading, if the initial writing address of software is not predefined address, then think wrong; (3) read again after EEPROM writes, carry out data after writing relatively, should be consistent, otherwise EEPROM can't write again, at this moment changes possibly the address, memory block; But realize so still existing problems such as accounting for very much the EERPOM storage space, and because the EEROM district of AVR inside is limited, if exist in the situation of a large amount of storage data, then can cause because the chip of high-order selected by needs the rising of cost.
The present invention is divided into two districts with EEPROM: data field and backup area, and corresponding data field array and the backup area array that defines respectively, need not to increase EEPROM or external memory space, when MCU powers on for the first time or when normal operation, after powering on, program reads the data field array of EEPROM and the data of backup area array; If the data of the data of data field array and backup area array are all normal, illustrate that then whole data are all normal, then the data Replica in arbitrary district is done computing to SRAM, the data of SRAM, data field array and backup area array all have the address of setting separately; If the data of the error in data of data field array, backup area array are normal, illustrate that the data field array of EEPROM has been subject to interference, then the data with the backup area array are written back to the data field array again, and the data Replica of backup area array is done computing to SRAM; If the data of the error in data of backup area array, data field array are normal, illustrate that the backup area array has been subject to interference, then the data with the data field array are written back to the backup area array again, and the data Replica of data field array is done computing to SRAM; If the data of read data district array and backup area array are mistake all, the value of the normal demarcation that then will give tacit consent to is write again to the data field array in the EEPROM and backup area array, carries out other operation again, so that the error rate that writes with sense data drops to minimum.
The present invention is in a buffering of SRAM definition array, definition data field array and backup area array in EEPROM, include the CRC check data in described data field array and the backup area array, when in EEPROM, writing data, first data are put in the buffering array, and call and write data that function will cushion array in order in data writing district array and the backup area array, and the checking data zone of the CRC check data that calculates being write data field array and backup area array; So, pass through the validity of CRC check data difference checking data district's array and backup area array behind the system power-on reset, just the data that can know which district are effective, be equivalent to except the data of data field array, also have two parts of independently Backup Datas, backup goes also to have comprised in the array CRC check data, has guaranteed that with this error rate that writes with sense data drops to minimum.
Compared with prior art, the present invention can reduce EEPROM effectively at the reading and writing data of the abnormal conditions probability of makeing mistakes, wherein, abnormal conditions comprise the situations such as read-write power down, strong jamming and strong static, and do not need to take more EEPROM space, software overhead is little, Procedure Haleness is better, reliable and stable, and successfully be used in the batch production of automobile electronics such as automobile audio, radar for backing car and air-conditioner controller etc., realized that on the basis that does not increase cost the error rate that will write with sense data drops to minimum purpose.
Further improvement of the present invention is, comprises that also data write determining step, after the checking data calculation procedure, judges whether data write effective, if then skip to the data check step, and setting writes effective sign; If not, the write error sign then is set, termination routine.Before the data check step, the validity that first data is write is judged, like this can be in the situation that the data write error mistake, pinpoint the problems as early as possible, termination routine, in order to carry out other operation or again write, and setting writes effective sign or write error sign after judging, be convenient in time pinpoint the problems, avoided last and need to find that just data do not write successful drawback, have also improved the accuracy rate that writes with sense data from another aspect in the time of this data writing of use.
Further improvement of the present invention is, in the described data check step, if the data of data field array and backup area array are all effective, then the data Replica of arbitrary district array is done computing to SRAM.The benefit of doing like this is, at data writing and/or when reading and writing data comparatively frequently, can carry out in real time the selection of hommization according to the read-write call number of data field array and backup area array, the data field array of selection mode free time or the data Replica of backup area array are done computing to SRAM, have avoided the possibility of makeing mistakes of bringing because reading and writing data undue concentration.
Further improvement of the present invention is, in described data field array and the backup area array latter two byte be used for depositing the CRC check data.Preferably, described CRC check data realizes the check of data by CRC16.
Further improvement of the present invention is, described data are repaired in the step, if the error in data of data field array, the data of backup area array are effective, then the data with the backup area array write back the data field array again, and the data Replica of backup area array is done computing to SRAM; If the error in data of backup area array, the data of data field array are effective, and then the data with the data field array write back the backup area array again, and the data Replica of data field array is done computing to SRAM.
Compared with prior art, beneficial effect of the present invention is, can effectively reduce EEPROM at the reading and writing data of the abnormal conditions such as read-write power down, strong jamming and the strong static probability of makeing mistakes, and do not need to take more EEPROM space, software overhead is little, program is reliable and stable, realized that on the basis that does not increase cost the error rate that will write with sense data drops to minimum purpose, the present invention successfully is used in the batch production of automobile electronics such as automobile audio, radar for backing car and air-conditioner controller etc.
Description of drawings
Fig. 1 is that the EEPROM data of an embodiment of the present invention write process flow diagram;
Fig. 2 is the EEPROM data reading process flow diagram of an embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, more excellent embodiment of the present invention is described in further detail.
Embodiment 1:
The method that this example provides the reading and writing data of a kind of EEPROM of minimizing to make mistakes may further comprise the steps:
The array define step, in a buffering of SRAM definition array, two arrays of definition in EEPROM, the two number groups that define among the described EEPROM are respectively data field array and backup area array, include the CRC check data in described data field array and the backup area array;
The data write step when writing data in the EEPROM, is put into data in the buffering array first, and calls and write data that function will cushion array in order data writing district array and backup area array;
The checking data calculation procedure is called the CRC check data that the verification function calculation goes out current backup, and this CRC check data is write the checking data zone of data field array and backup area array;
The data check step is carried out verification by the CRC check data to the validity of data field array and backup area array behind the system power-on reset, if all effectively then normally read the data of EEPROM, if not, then jumps to data and repairs step;
Data are repaired step, if having the data in a district effective in data field array and the backup area array, then the data of damaging are repaired, otherwise jump to the acquiescence re-writing step; And,
The acquiescence re-writing step writes the value of normal demarcation of acquiescence again to the data field array in the EEPROM and backup area array.
Wherein, EEPROM(electrically erasable programmable read-only memory), full name is the ROM (read-only memory) (being called for short E side) of electric erasable and reprogramming, this example has backup when data write EEPROM, checking is arranged during data reading, and there is a data recovery measure, write the data of EEPROM at every turn, all do a backup, the data of data field array and backup area array are all done CRC check, be preferably CRC16 check, as long as system is in service to make mistakes, will bug patch the data of EEPROM, which be modified with regard to the data of knowing backup according to the check byte in the checking data so, then cover the backup that makes mistakes with correct backup, the purpose of recovering to reach data, and then so that the error rate that writes with sense data drops to minimum.
This example is divided into two districts with EEPROM: data field and backup area, and corresponding data field array and the backup area array that defines respectively, need not to increase EEPROM or external memory space, when MCU powers on for the first time or when normal operation, after powering on, program reads the data field array of EEPROM and the data of backup area array; If the data of the data of data field array and backup area array are all normal, illustrate that then whole data are all normal, then the data Replica in arbitrary district is done computing to SRAM, the data of SRAM, data field array and backup area array all have the address of setting separately; If the data of the error in data of data field array, backup area array are normal, illustrate that the data field array of EEPROM has been subject to interference, then the data with the backup area array are written back to the data field array again, and the data Replica of backup area array is done computing to SRAM; If the data of the error in data of backup area array, data field array are normal, illustrate that the backup area array has been subject to interference, then the data with the data field array are written back to the backup area array again, and the data Replica of data field array is done computing to SRAM; If the data of read data district array and backup area array are mistake all, the value of the normal demarcation that then will give tacit consent to is write again to the data field array in the EEPROM and backup area array, carries out other operation again, so that the error rate that writes with sense data drops to minimum.
This example is in a buffering of SRAM definition array, definition data field array and backup area array in EEPROM, include the CRC check data in described data field array and the backup area array, when in EEPROM, writing data, first data are put in the buffering array, and call and write data that function will cushion array in order in data writing district array and the backup area array, and the checking data zone of the CRC check data that calculates being write data field array and backup area array; So, pass through the validity of CRC check data difference checking data district's array and backup area array behind the system power-on reset, just the data that can know which district are effective, be equivalent to except the data of data field array, also have two parts of independently Backup Datas, backup goes also to have comprised in the array CRC check data, has guaranteed that with this error rate that writes with sense data drops to minimum.
As depicted in figs. 1 and 2, this example comprises ablation process and the readout of EEPROM data, and corresponding EEPROM data write process flow diagram and EEPROM data reading flow process respectively.The further improvement of this example is, comprises that also data write determining step, after the checking data calculation procedure, judges whether data write effective, if then skip to the data check step, and setting writes effective sign; If not, the write error sign then is set, termination routine.Before the data check step, the validity that first data is write is judged, like this can be in the situation that the data write error mistake, pinpoint the problems as early as possible, termination routine, in order to carry out other operation or again write, and setting writes effective sign or write error sign after judging, be convenient in time pinpoint the problems, avoided last and need to find that just data do not write successful drawback, have also improved the accuracy rate that writes with sense data from another aspect in the time of this data writing of use.
The further improvement of this example is, in the described data check step, if the data of data field array and backup area array are all effective, then the data Replica of arbitrary district array is done computing to SRAM.The benefit of doing like this is, at data writing and/or when reading and writing data comparatively frequently, can carry out in real time the selection of hommization according to the call number of data field array and backup area array, avoid the possibility of makeing mistakes of bringing because reading and writing data undue concentration.
The further improvement of this example is, in described data field array and the backup area array latter two byte be used for depositing the CRC check data.Preferably, described CRC check data realizes the check of data by CRC16.
The further improvement of this example is, described data are repaired in the step, if the error in data of data field array, the data of backup area array are effective, then the data with the backup area array write back the data field array again, and the data Replica of backup area array is done computing to SRAM; If the error in data of backup area array, the data of data field array are effective, and then the data with the data field array write back the backup area array again, and the data Replica of data field array is done computing to SRAM.
Compared with prior art, this routine beneficial effect is, can effectively reduce EEPROM at the reading and writing data of the abnormal conditions such as read-write power down, strong jamming and the strong static probability of makeing mistakes, and do not need to take more EEPROM space, software overhead is little, program is reliable and stable, realized that on the basis that does not increase cost the error rate that will write with sense data drops to minimum purpose, this example successfully has been used in the batch production of automobile electronics such as automobile audio, radar for backing car and air-conditioner controller etc., and is effective.
Embodiment 2:
On the basis of embodiment 1, this example is at array: EEPROMBufferData[EepromPageSize-2 of SRAM definition], two arrays of definition in EEPROM, this two numbers group is corresponding data district array EEPROMPagerAddr0[EepromPageSize respectively] and backup array EEPROMPagerAddr1[EepromPageSize], data field array and back up in the array that latter two byte is to deposit the data of CRC check.
In the time of will writing data in the EEPROM, first data are put into EEPROMBufferData[EepromPageSize-2] in the array, call EepromWriteBlockData () function, n data of this array are write in order the appointed area of EEPROM, i.e. data field array EEPROMPagerAddr0[EepromPageSize] and/or backup area EEPROMPagerAddr1[EepromPageSize]).
Write after the data that are over, call CheckWriteDataCRC () function, this function can calculate the CRC check data of current backup and write two bytes of afterbody of EEPROM corresponding data field array and backup area array, and described CRC check data is preferably the CRC16 checking data.So far the back-up job of data is finished.
Checking data is carried out in operation behind the system power-on reset, carry out CheckAllPageData () function, check the validity of data of data field array and backup area array, adopt the CRC16 calibration technology, respectively checking data district array and backup area array acquiescence latter two byte be check code, if passed through, then the EEPROM data are no problem, and program can normally down be carried out; Otherwise move PageDataRecover () function, data field array or the backup area array damaged are repaired.
If the error in data of data field array, the data of backup area array are normal, illustrate that the data of data field array have been subject to interference, and then the data with the backup area array write back in the array of data field again, and the data Replica of backup area array is done computing to SRAM; If the error in data of backup area array, the data of data field array are normal, illustrate that the data of backup area array have been subject to interference, and then the data with the data field array write back in the backup area array again, and the data Replica of data field array is done computing to SRAM.
If the data CRC check of the data field array of EEPROM and backup area array is mistake all, the value of the normal demarcation that then will give tacit consent to is write again to the data field array in the EEPROM and backup area array, carries out other operation again.
The SRAM that this is routine and EEPROM data partition schematic diagram example can be as follows, wherein, and shown in the data of EEPROM data field array and address assignment thereof are schematically as follows shown:
Shown in the data of EEPROM backup area array and address assignment thereof are schematically as follows shown:
Shown in the data of SRAM_Buffer district buffering array and address assignment thereof are schematically as follows shown:
Above content is in conjunction with concrete preferred implementation further description made for the present invention, can not assert that implementation of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deduction or replace, all should be considered as belonging to protection scope of the present invention.
Claims (8)
1. the method that the reading and writing data that reduces EEPROM is made mistakes is characterized in that, may further comprise the steps:
The array define step, in a buffering of SRAM definition array, two arrays of definition in EEPROM, the two number groups that define among the described EEPROM are respectively data field array and backup area array, include the CRC check data in described data field array and the backup area array;
The data write step when writing data in the EEPROM, is put into data in the buffering array first, and calls and write data that function will cushion array in order data writing district array and backup area array;
The checking data calculation procedure is called the CRC check data that the verification function calculation goes out current backup, and this CRC check data is write the checking data zone of data field array and backup area array;
The data check step is carried out verification by the CRC check data to the validity of data field array and backup area array behind the system power-on reset, if all effectively then normally read the data of EEPROM, if not, then jumps to data and repairs step;
Data are repaired step, if having the data in a district effective in data field array and the backup area array, then the data of damaging are repaired, otherwise jump to the acquiescence re-writing step; And,
The acquiescence re-writing step writes the value of normal demarcation of acquiescence again to the data field array in the EEPROM and backup area array.
2. the reading and writing data of the minimizing according to claim 1 EEPROM method of makeing mistakes is characterized in that, comprises that also data write determining step, after the checking data calculation procedure, judge whether data write effective, if then skip to the data check step, and setting writes effective sign; If not, the write error sign then is set, termination routine.
3. the reading and writing data of the minimizing according to claim 1 EEPROM method of makeing mistakes is characterized in that, in the described data check step, if the data of data field array and backup area array are all effective, then the data Replica of arbitrary district array is done computing to SRAM.
4. the method for makeing mistakes to the reading and writing data of the described minimizing of 3 any one EEPROM according to claim 1 is characterized in that, in described data field array and the backup area array latter two byte be used for depositing the CRC check data.
5. the reading and writing data of the minimizing according to claim 4 EEPROM method of makeing mistakes is characterized in that, described CRC check data realizes the check of data by CRC16.
6. the method for makeing mistakes to the reading and writing data of the described minimizing of 3 any one EEPROM according to claim 1, it is characterized in that, described data are repaired in the step, if the error in data of data field array, the data of backup area array are effective, then the data with the backup area array write back the data field array again, and the data Replica of backup area array is done computing to SRAM; If the error in data of backup area array, the data of data field array are effective, and then the data with the data field array write back the backup area array again, and the data Replica of data field array is done computing to SRAM.
7. the reading and writing data of the minimizing according to claim 6 EEPROM method of makeing mistakes is characterized in that, in described data field array and the backup area array latter two byte be used for depositing the CRC check data.
8. the reading and writing data of the minimizing according to claim 7 EEPROM method of makeing mistakes is characterized in that, described CRC check data realizes the check of data by CRC16.
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