CN112816772A

CN112816772A - Safe analog voltage acquisition implementation circuit

Info

Publication number: CN112816772A
Application number: CN202110001942.1A
Authority: CN
Inventors: 丁欢; 沈俊远; 张志辉; 任喜国; 肖毅平
Original assignee: CRSC Research and Design Institute Group Co Ltd
Current assignee: CRSC Research and Design Institute Group Co Ltd
Priority date: 2021-01-04
Filing date: 2021-01-04
Publication date: 2021-05-18
Anticipated expiration: 2041-01-04
Also published as: CN112816772B

Abstract

A safety analog voltage acquisition circuit comprises a hardware heterogeneous circuit, an A-series hardware circuit, a B-series hardware circuit, a reverse circuit and a series spacing unit, wherein the A-series hardware circuit and the B-series hardware circuit are symmetrical to each other and form a two-out-of-two structure; the system A hardware circuit and the system B hardware circuit are also connected through a system spacing unit; the system A hardware circuit and the system B hardware circuit respectively comprise a protection circuit, a differential filter circuit, a differential amplification circuit, a low-pass filter circuit, an AD acquisition circuit, an acquisition circuit power supply unit, a safety part power supply unit, a safety circuit and acquisition circuit isolation unit and a logic processing unit which are sequentially arranged. And the two-out-of-two design is used for analog voltage acquisition, so that the analog voltage can be safely acquired. The hardware heterogeneous design is used for analog voltage acquisition, so that the analog voltage is safely acquired, and multi-path alternating current and direct current differential and single-ended voltage signals are safely acquired.

Description

Safe analog voltage acquisition implementation circuit

Technical Field

The invention belongs to the technical field of track circuits, and particularly relates to a safety analog voltage acquisition implementation circuit.

Background

The voltage acquisition device is a common device in industrial application, the existing voltage acquisition method mainly emphasizes on the performance of realizing multipath voltage acquisition, improving the sampling precision, improving the sampling rate, reducing the cost, reducing the volume and the like, at present, a safe voltage acquisition method which can be used in the safety fields of railways and the like is not found, and a non-safe voltage acquisition device cannot be used in the safety fields of railways and the like.

The analog voltage acquisition device is an analog quantity acquisition device commonly used in an industrial field, and a user can use the voltage acquisition device for acquiring the actual voltage waveform and sending a control instruction to various field execution units according to the voltage acquisition result. In the safety field of railways and the like, the voltage acquisition device has safety requirements, namely the voltage acquisition device needs to reach the safety certification level in the safety field.

The existing voltage acquisition device mainly puts an optimization point on the aspects of realizing multipath voltage acquisition, reducing the volume, reducing the cost and the like, such as a multichannel voltage acquisition module 201810683126.1, mainly emphasizes the performances of realizing multipath voltage acquisition, easy expansion, simple circuit structure and the like, and does not find a voltage acquisition implementation method capable of meeting the safety requirement at present.

Disclosure of Invention

In view of the above problems, the present invention

A secure analog voltage acquisition circuit comprising:

the hardware heterogeneous circuit comprises an A-series hardware circuit, a B-series hardware circuit, a reverse circuit and an inter-series spacing unit which form a symmetrical two-out-of-two structure, wherein the input end is connected with the A-series hardware circuit and is connected with the B-series hardware circuit after passing through the reverse circuit; the system A hardware circuit and the system B hardware circuit are also connected through a system spacing unit;

the system A hardware circuit and the system B hardware circuit respectively comprise a protection circuit, a differential filter circuit, a differential amplification circuit, a low-pass filter circuit, an AD acquisition circuit, an acquisition circuit power supply unit, a safety part power supply unit, a safety circuit and acquisition circuit isolation unit and a logic processing unit which are sequentially arranged.

Specifically, the input end of the power supply unit of the safety part is 24V direct current.

Specifically, the working steps are as follows:

s1, connecting a circuit;

s2, carrying out clock synchronization between the FPGA in the A-series hardware circuit and the FPGA in the B-series hardware circuit and the CPU embedded in the FPGA once per period T; the CPU carries out interactive comparison on M sampling data in the previous period every period T, the standard whether the comparison of a single sampling point passes or not is whether the absolute value of the difference of the absolute values of the voltages of the corresponding sampling points of the A-system hardware circuit and the B-system hardware circuit is smaller than a threshold value N or not, the voltage of the first sampling point of the A-system hardware circuit is VA1, the voltage of the first sampling point of the B-system hardware circuit is VB1, when | (| VA1- | VB1|) | < N, the comparison passes, when | (| VA1| - | VB1|) is not larger than N, the comparison does not pass, wherein N is a natural number; if the comparison is passed, taking the average value of the voltages of the two corresponding sampling points as the final sampling voltage value of the corresponding sampling point, namely V (| VA1| + | VB1|)/2, and considering that the period data acquisition is successful when all the sampling points of the period are passed, otherwise, considering that the acquisition is failed.

Specifically, when the input voltage V of the hardware circuit A is negative V, the input voltage of the hardware circuit B is negative V, and the absolute value of the two voltages is taken when the CPU processes the input voltage; when the differential amplification circuits of the hardware circuit A and the hardware circuit B have the same temperature drift due to the same fault, the single-ended voltage signals output by the two differential amplification circuits have the same acquisition offset F compared with the actually input voltage signals, and the single-ended voltages output by the two differential amplification circuits are V + F and-V + F respectively.

Compared with the prior art, the invention can: 1. and the two-out-of-two design is used for analog voltage acquisition, so that the analog voltage can be safely acquired. 2. The hardware heterogeneous design is used for analog voltage acquisition, and the safe acquisition of the analog voltage is realized. 3. The safe acquisition of multi-path alternating current-direct current differential and single-ended voltage signals is realized.

The invention provides a safe voltage acquisition method, which adopts a mode of two-out-of-two, hardware circuit heterogeneous design and the like, realizes the safe acquisition of multi-path alternating current-direct current differential and single-ended voltage signals on the premise of achieving multi-path acquisition, small volume and the like of the existing voltage acquisition method, and can be used in the field with safety requirements of railways and the like. The invention designs two series of voltage acquisition circuits with symmetrical structures, which respectively acquire mutually-reversed homologous input signals, and the two series of logic processing units interactively compare voltage data to realize the safe acquisition of analog voltage.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.

FIG. 1 is a block diagram of the hardware design architecture of the present invention;

FIG. 2 is a CPU software process flow diagram of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The method for realizing the safe analog voltage acquisition is shown in figure 1. The method adopts design methods of two-out-of-two, hardware isomerism and the like to realize the safe acquisition of the multi-path analog differential and single-ended voltage signals. Two is selected, namely A, B two-series hardware circuits with symmetrical structures are designed, and acquisition errors caused by hardware faults are prevented by comparing A, B two-series voltage acquisition results; the hardware isomerism comprises two modes of using integrated chips with different models and inverting input signals, and the hardware isomerism design can prevent failure of two-out due to common cause failure of hardware. In fig. 1, the device includes an a-series protection circuit 1, an a-series differential filter circuit 2, an a-series differential amplifier circuit 3, an a-series low-pass filter circuit 4, an a-series AD acquisition circuit 5, an a-series acquisition circuit power supply unit 6, an a-series safety part power supply unit 7, an a-series logic processing unit 8, a series isolation unit 9, a safety circuit and acquisition circuit isolation unit 10, a B-series logic processing unit 11, a B-series safety part power supply unit 12, a B-series acquisition circuit power supply unit 13, a B-series AD acquisition circuit 14, a B-series low-pass filter circuit 15, a B-series differential amplifier circuit 16, a B-series differential filter circuit 17, a B-series protection circuit 18, and an inverter circuit 19. A, B is two systems to form a symmetrical two-to-two structure, the protection circuit realizes overvoltage protection to the module, the differential filter circuit realizes filtering of differential voltage input signals, the differential amplifier circuit converts the differential signals into single-ended signals, the low pass filter circuit filters high frequency harmonics of the single-ended signals, the AD acquisition circuit realizes acquisition of the single-ended voltage signals, the acquisition circuit power supply unit provides a working power supply for the acquisition circuit, the safety circuit power supply unit provides a working power supply for the logic processing unit, the logic processing unit receives the AD acquisition data and carries out logic processing, the system separation unit carries out magnetic isolation on the logic processing circuits of the two systems, the safety circuit is isolated from the acquisition circuit to carry out magnetic isolation on the acquisition circuit and the logic processing unit, and the inverter circuit carries out inversion conversion on the input voltage of the A system to realize the heterogeneous design of the circuit.

The invention adopts design methods of two-out-of-two, hardware isomerism and the like to realize the safe acquisition of the analog voltage, which are respectively explained as follows:

1. two-out-of-two for analog voltage safety acquisition

And the second is a classical design method adopted by railway safety products, namely, two hardware circuits with symmetrical structures are adopted to simultaneously process and compare homologous input signals so as to ensure the correct acquisition of the input signals. The two-out-of-two design comprises a hardware design and a software design, namely, the two-out-of-two comparison can be completed only by carrying out the two-out-of-two software design on the basis of the two-out-of-two hardware design. The invention uses the two-out-of-two design method for analog voltage acquisition to realize the safe acquisition of the analog voltage. As shown in fig. 1, which is a block diagram of a hardware design structure of the present invention, for each voltage acquisition circuit, a voltage signal sequentially passes through a protection circuit, a differential filter circuit, a differential amplifier circuit, a low-pass filter circuit, and an AD acquisition circuit, the AD acquisition circuit transmits acquired voltage data to an FPGA through an SPI bus, and finally, a CPU embedded in the two FPGAs interactively compares the acquired voltage data to ensure safe acquisition. FIG. 2 is a CPU software process flow diagram of the present invention. A. B, performing clock synchronization once per period T by the two CPU systems and the FPGA to ensure that the error of sampling time of the two CPU systems and the FPGA is less than one sampling period; A. the two CPUs in the B line can perform interactive comparison on M sampled data in the previous period per period T, and whether the absolute value of the difference between the absolute values of voltages of two corresponding sampled points in the A, B line (since A, B line input voltage is inverted, which will be described in detail below) is smaller than the threshold N is the standard, for example, the voltage of the first sampled point in the a line is VA1, and the voltage of the first sampled point in the B line is VB1, when | (| VA1| -VB 1|) | < N, the comparison is considered to be passed, when | (| VA1| -VB 1|) is |, the comparison is considered to be not passed, if the comparison is passed, the average value of the voltages of the two corresponding sampled points is taken as the final sampled voltage value of the corresponding sampled point, that is, V | + | VA1| + | VB1 |)/2. And considering that the voltage acquisition of the period is successful only when all the comparison of the sampling points in the period is passed, and considering that the voltage acquisition is failed otherwise. And returning the collected voltage value to the user when the periodic voltage collection is successful, and returning the collection failure to the user when the periodic voltage collection fails.

2. Hardware heterogeneous design for analog voltage safety acquisition

When the hardware circuit has common cause failure, the two-out two-comparison cannot guarantee safe acquisition, for example, when the A, B two-series differential amplification circuits have the same temperature drift due to the same fault, the single-ended voltage signals output by the two-series differential amplification circuits have an acquisition offset and the offsets are equal compared with the actually input voltage signals, at this time, the CPU takes the two-out two-comparison to consider that the acquisition is correct (because the absolute values of the two-series acquisition voltages are equal), and actually, the acquisition voltage value is deviated from the actual voltage. The hardware heterogeneous design can prevent the failure of two-out caused by hardware common cause failure. The invention adopts a hardware heterogeneous design method to prevent voltage mis-acquisition caused by hardware common cause failure. The hardware heterogeneous design comprises A, B series chip heterogeneous and input inverting parts. Firstly, when a A, B series hardware circuit is designed, components with the same function use different types of products, and because the design concept, the manufacturing process and the like of different products are different, the probability of the failure of the hardware caused by the failure can be reduced. In the invention, the differential amplifier, the AD sampling chip and other devices are respectively made of products of different manufacturers, so that the probability of failure of hardware work reasons can be reduced, and the safety of voltage acquisition is improved; then, the input voltage signals of A and B are processed in reverse phase, i.e. when A is input voltage V, B is input voltage-V, and CPU processes the two voltages to take the absolute value. When A, B two series of differential amplifying circuits have the same temperature drift due to the same fault, the single-ended voltage signals output by the two series of differential amplifying circuits have the same acquisition offset F compared with the actually input voltage signals, and because the input voltage is inverted, the single-ended voltages output by the two series of differential amplifying circuits are respectively V + F, -V + F, and at this time, two comparisons are taken to identify the acquisition error (because the absolute values of the single-ended voltage signals output by the two series of differential amplifying circuits are not equal) caused by the failure of hardware.

Although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims

1. The utility model provides a safe type analog voltage acquisition circuit which characterized in that includes:

the hardware heterogeneous circuit comprises an A-series hardware circuit, a B-series hardware circuit, a reverse circuit (19) and an inter-series spacing unit (9), wherein the A-series hardware circuit and the B-series hardware circuit are symmetrical and have two-out-of-two structures, and the input end is connected with the A-series hardware circuit and is connected with the B-series hardware circuit after passing through the reverse circuit (19); the hardware circuit A and the hardware circuit B are also connected through a tie spacing unit (9);

2. The safety analog voltage acquisition circuit of claim 1 wherein the input of the safety portion power supply unit is 24 vdc.

3. The safety analog voltage acquisition circuit of claim 1, wherein the operating steps are as follows:

s1, connecting a circuit;

4. The safety analog voltage acquisition circuit of claim 3, wherein when the input voltage of the hardware circuit A is V, the input voltage of the hardware circuit B is-V, and the CPU takes the absolute values of the two voltages when processing; when the differential amplification circuits of the hardware circuit A and the hardware circuit B have the same temperature drift due to the same fault, the single-ended voltage signals output by the two differential amplification circuits have the same acquisition offset F compared with the actually input voltage signals, and the single-ended voltages output by the two differential amplification circuits are V + F and-V + F respectively.