CN112797887B - Depth test structure and method for back drilling hole layer of high-rise multilayer board - Google Patents
Depth test structure and method for back drilling hole layer of high-rise multilayer board Download PDFInfo
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- CN112797887B CN112797887B CN202011290947.2A CN202011290947A CN112797887B CN 112797887 B CN112797887 B CN 112797887B CN 202011290947 A CN202011290947 A CN 202011290947A CN 112797887 B CN112797887 B CN 112797887B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B7/00—Measuring arrangements characterised by the use of electric or magnetic techniques
- G01B7/26—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring depth
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0268—Marks, test patterns or identification means for electrical inspection or testing
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0008—Apparatus or processes for manufacturing printed circuits for aligning or positioning of tools relative to the circuit board
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention provides a depth test structure and a method for a back drilling hole interlayer of a high multi-layer board, wherein the test structure comprises the following components: at least one first test line with the height being flush with the height of the target layer; and a second test line flush with the first adjoining layer adjacent to the target layer on the side of the electrical performance requiring layer. According to the invention, the drilling depth is tested by setting the test line and testing the on-off of the test line, so that the back drilling depth is accurately controlled.
Description
Technical Field
The invention relates to the technical field of circuit boards, in particular to a structure and a method for testing interlayer depth of a back drilling hole of a high-rise multilayer board.
Background
Along with the continuous progress of modern communication technology, the PCB is continuously developed towards the directions of high multi-layer, high thickness and large size, namely, towards the high multi-layer circuit board, the high multi-layer circuit board needs to realize mutual conduction among different layers in order to transmit signals at high speed and meet the problems of impedance matching and the like, and the high multi-layer board cannot be used for manufacturing metallized blind holes by a method of laser blind holes and electroplating filling holes due to thick board thickness, however, with the progress of the numerical control drilling machine technology, the back drilling process capable of controlling the depth can well meet the requirement. Backdrilling refers to the process of removing a copper layer from the wall of a hole at one end of a metallized through hole with a drill to make one end of the wall of the through hole free of copper and the other end of the wall of the through hole have copper, and is called backdrilling. Because the common drilling machine takes the table top as a zero point, controls the drilling depth by setting the height Z value between the tool tip of the drill bit and the table top, and does not have the depth control function of drilling from the plate surface, the requirement of drilling to a specified target layer is difficult to accurately control, and the depth after drilling cannot be directly observed because the back drilling hole is not through drilled, and the back drilling hole and the position between the back drilling hole and the target layer can only be detected in a mode that a PCB (printed circuit board) is damaged by slicing.
Disclosure of Invention
In view of this, the invention provides a structure and a method for testing the depth between back drilling layers of a high-rise multilayer board, which test the drilling depth by arranging a first test line and a second test line, thereby realizing accurate control of the back drilling depth.
In order to solve the technical problems, the invention adopts the technical scheme that: the utility model provides a high multiply wood back drilling hole interlayer degree of depth test structure, this test structure includes:
at least one first test line with the height level with the height of the target layer; and
and a second test line flush with the first adjacent layer adjacent to the target layer on the side of the electrical performance requirement layer.
Preferably, the first test line and the second test line are conductive wires, and two ends of the first test line and the second test line are respectively provided with a detection point.
Preferably, the first testing line and the second testing line are arranged in a crossed manner, and a testing hole is formed at the crossed position of the first testing line and the second testing line.
Preferably, a third test line is further provided, the third test line is arranged on one side of the non-electrical performance requirement layer and is flush with the adjacent second adjacent layer of the target layer.
Preferably, the third test line is respectively crossed with the first test line and the second test line, and is crossed at a point.
Preferably, the third test line is a conductive line, and the two ends are respectively provided with a detection point.
A method for testing interlayer depth of a back drilling hole of a high-rise multilayer board comprises the following steps:
and arranging a test structure at the non-working area of the high multilayer board, and testing the drilling depth at the test structure.
Preferably, the method of testing the depth of the borehole at the test structure comprises:
and drilling from the surface layer corresponding to the intersection point of the first test line and the second test line until the first test line is drilled off, wherein the second test line is communicated.
Preferably, the first test line and the second test line are conductive wires, and detection points are respectively arranged at two ends of each of the first test line and the second test line, so that whether the first test line and the second test line are drilled or not is judged by measuring the conductivity of the first test line and the second test line.
Preferably, a third test line is provided flush with the adjacent second adjacent layer of the target layer on the side of the non-electrical requiring layer, and the depth of the drilled hole is adjusted by the third test line.
The invention has the advantages and positive effects that: according to the invention, the drilling depth is tested by setting the test line and switching on/off the test line, so that the back drilling depth is accurately controlled.
Drawings
FIG. 1 is a schematic diagram of the construction of a high multi-layer board of the present invention;
FIG. 2 is a schematic diagram of the structure of the test structure of the present invention;
FIG. 3 is a schematic perspective view of a first test line and a second test line according to the present invention;
fig. 4 is a schematic top view of the first, second and third test lines according to the present invention.
Detailed Description
For a better understanding of the present invention, reference is made to the following detailed description and accompanying drawings that illustrate the invention.
The invention provides a depth test structure between back drilling holes of a high multi-layer board, which comprises:
at least one first test line with the height being flush with the height of the target layer; and
a second test line flush with the first adjacent layer adjacent to the target layer on one side of the electrical property requirement layer;
the first test lines and the second test lines are arranged in a crossed mode.
As shown in fig. 1, in a specific embodiment of the present invention, a high multi-layer board 10 includes a plurality of metal layers 101 and a metal hole 102, wherein a copper layer 103 is formed on the wall of the metal hole 102 during a copper deposition process; a part of the copper layer 103 is used for realizing the conduction between the metal layers 101, and the part needs to be reserved and is called an electrical performance requirement layer; a part of the copper layer 103 does not have the function of conducting between the metal layers 101, and is equivalent to a copper pillar antenna, which causes loss and interference to the transmission of high-frequency signals, and needs to be drilled away in a back drilling manner, the part needing to be drilled away is called a non-electrical property requirement layer, and the last layer needing to be drilled away in the non-electrical property requirement layer is called a target layer.
Specifically, in this embodiment, the high-definition multilayer board 10 includes 12 metal layers 101, specifically L1 to L12, where the electrical performance requirement layer of the high-definition multilayer board 10 is the L1 th to L6 th layer, the non-electrical performance requirement layer is the L7 th to L12 th layer, and the target layer is the L7 layer; in the drilling process, drilling is carried out on a non-electrical property requirement layer except for the electrical property requirement layer, namely drilling downwards from the L12 surface of the bottom surface, the L7-L12 layer of hole wall copper is drilled, and the L1-L6 layer of hole wall copper is reserved.
As shown in fig. 2 to 4, the test lines 20 are arranged in the non-working area of the high-rise multilayer board 10, the depth of the drilled hole is tested by switching on and off the test lines 20, and formal drilling is performed after the test is qualified; specifically, a first test line 201 is disposed flush with a target layer, and a second test line 202 is disposed flush with an adjacent first adjoining layer of the target layer on the electrical property requiring layer side.
In this embodiment, the target layer is the 7 th layer, the adjacent first adjacent layer to the target layer on the electrical performance requirement layer side is the 6 th layer, the first test line 201 is flush with the target layer, i.e., the 7 th layer, and the second test line 202 is flush with the first adjacent layer, i.e., the 6 th layer; in a specific working process, drilling is carried out from the bottom surface, the Z value depth of drilling equipment is adjusted according to the thickness of an interlayer medium, a line of a target layer, namely a 7 th layer, needs to be drilled off, and a line of a first adjacent layer, namely a 6 th layer, cannot be drilled, namely the test is qualified.
In the specific process of testing, the drilling is carried out from the surface layer on one side of the non-electrical property requirement layer, namely the L12 layer, the depth of the Z value of the drilling equipment is adjusted according to the thickness of the interlayer medium, the drilling is carried out until the first test line is drilled off, the second test line is communicated, and the depth of the drilled hole is tested by judging the connection and disconnection of the first test line and the second test line.
Further, in a specific embodiment of the present invention, in order to complete the testing process at one time, the first testing line and the second testing line are arranged in an intersecting manner, and during the drilling process, the drill is only required to be drilled from the intersection of the first testing line and the second testing line, so that the alignment of the first testing line and the second testing line can be achieved.
Further, a testing hole 203 is formed at the intersection of the first testing line 201 and the second testing line 202, the testing hole 203 is a through hole, in a preferred embodiment, the intersection of the first testing line 201 and the second testing line 202 is located at the axis of the through hole, and when testing is needed, only the testing hole 203 needs to be drilled.
Further, in order to conveniently determine the on/off of the first test line and the second test line, the first test line and the second test line may adopt a conductive line (e.g., a metal line) and a transparent line (e.g., an optical fiber), when the first test line and the second test line adopt a transparent line, whether the first test line and the second test line are transparent or not may be used to determine the on/off of the first test line and the second test line, and when the first test line and the second test line adopt a conductive line, whether the first test line and the second test line are transparent or not may be used to determine the on/off of the first test line and the second test line; in one embodiment of the present invention, the first test line and the second test line are conductive copper lines for convenience of processing.
Due to the adoption of the copper wire, the forming process is the same as the processing process of each metal layer of the high-rise multilayer board, and the test wire is formed while each metal layer of the high-rise multilayer board is formed, namely, the processing can be realized together with each metal layer of the high-rise multilayer board, for example, the first test wire is formed while the target layer is formed.
Further, in an embodiment of the present invention, the detecting points 205 are respectively disposed at two ends of the first testing line 201 and the second testing line 202, the detecting points 205 are electrically connected to the remaining first testing line 201 and the remaining second testing line 202, and the detecting points 205 are exposed outside the high-density multilayer board 10, so that the conductivity of the first testing line 201 and the second testing line 202 can be measured by a simple tool, such as a multimeter.
In a specific embodiment of the present invention, the detecting points 205 are pillars, and the pillars detecting points 205 penetrate through the height of the high multi-layer board 10 and are exposed on the upper surface layer and/or the lower surface layer of the high multi-layer board 10.
Further, in a specific embodiment of the present invention, a third test line 206 is further disposed, and the third test line is flush with the adjacent second adjacent layer of the target layer on the side of the non-electrical requiring layer; the third test line 206 is disposed to intersect the first test line 201 and the second test line 202, and intersects at a point.
In this embodiment, a third test line 206 is provided, the third test line 206 is provided on one side of the non-electrical property requirement layer and is flush with the adjacent second adjacent layer, i.e., the L8 layer, of the target layer, in the back drilling process, the third test line 306, i.e., the L8 layer, is drilled first, and when the third test line 306 is drilled, the drilling depth can be adjusted again according to the thickness of the medium between the metal layers, so as to avoid the situation that the second test line 202 is drilled due to too deep drilling depth, or the drilling depth is too shallow, and the first test line 201 is not drilled.
Similarly, the third test line 206 is a conductive line, and two ends of the third test line are respectively provided with a detection point.
The second invention of the invention provides a method for testing interlayer depth of a back drilling hole of a high-rise multilayer board, which comprises the following steps: the test structure is arranged in a non-working area of the high multi-layer board, and the drilling depth is tested at the test structure.
Further, a method of testing the depth of a borehole at the test structure includes:
and drilling from the surface layer corresponding to the intersection point of the first test line and the second test line until the first test line is drilled off, wherein the second test line is communicated.
The first test line and the second test line are conductive wires, detection points are arranged at two ends of the first test line and the second test line respectively, and whether the first test line and the second test line are drilled off or not is judged by measuring the conductivity of the first test line and the second test line.
And further, arranging a third test line to enable the third test line to be flush with the adjacent second adjacent layer of the target layer on one side of the non-electrical property requirement layer, and adjusting the drilling depth through the third test line.
The embodiments of the present invention have been described in detail, but the description is only for the preferred embodiments of the present invention and should not be construed as limiting the scope of the present invention. All equivalent changes and modifications made within the scope of the present invention should be covered by the present patent.
Claims (3)
1. A method for testing interlayer depth of a back drilling hole of a high-rise multilayer board is characterized in that;
the method comprises the following steps: the depth test structure is used for testing the depth of the drilled hole between the back drilled holes of the high-rise multilayer board;
the test structure includes: at least one first test line with the height being flush with the height of the target layer; the first test line and the second test line are conductive wires, and detection points are arranged at two ends of the first test line and the second test line respectively;
the first test line and the second test line are arranged in a crossed manner, and a test hole is formed in the crossed position of the first test line and the second test line;
the third testing line is arranged on one side of the non-electrical property requirement layer and is flush with the adjacent second adjacent layer of the target layer, and the third testing line is respectively crossed with the first testing line and the second testing line and is crossed at one point, so that the drilling depth of the drilling machine is adjusted again according to the thickness of the medium between the metal layers when the drilling machine breaks the third testing line;
the method further comprises the following steps: and drilling from the surface layer corresponding to the intersection point of the first test line and the second test line until the first test line is drilled off, wherein the second test line is communicated.
2. The high multi-layer board back-drilled hole interlayer depth test method of claim 1, wherein; the first test line and the second test line are conductive wires, detection points are arranged at two ends of the first test line and the second test line respectively, and whether the first test line and the second test line are drilled off or not is judged by measuring the conductivity of the first test line and the second test line.
3. The high multi-layer board back-drilled hole interlayer depth test method of claim 2, characterized in that; the third test line is a conductive wire, and two ends of the third test line are respectively provided with a detection point.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011290947.2A CN112797887B (en) | 2020-11-17 | 2020-11-17 | Depth test structure and method for back drilling hole layer of high-rise multilayer board |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202011290947.2A CN112797887B (en) | 2020-11-17 | 2020-11-17 | Depth test structure and method for back drilling hole layer of high-rise multilayer board |
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| CN112797887A CN112797887A (en) | 2021-05-14 |
| CN112797887B true CN112797887B (en) | 2023-01-24 |
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