CN112788832B - PCB differential via hole arrangement optimization method - Google Patents
PCB differential via hole arrangement optimization method Download PDFInfo
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- CN112788832B CN112788832B CN202110032496.0A CN202110032496A CN112788832B CN 112788832 B CN112788832 B CN 112788832B CN 202110032496 A CN202110032496 A CN 202110032496A CN 112788832 B CN112788832 B CN 112788832B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
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- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
The invention discloses a PCB differential via hole arrangement optimization method, which comprises the following steps: presetting a differential via hole radius, a differential via hole pitch and an anti-pad radius, and carrying out physical modeling to obtain a triangular via hole arrangement model; constructing a first pair of differential via holes, a second pair of differential via holes, a third pair of differential via holes and a fourth pair of differential via holes according to a preset rule based on a triangular via hole arrangement model; and forming a prismatic structure by the first pair of differential via holes, the second pair of differential via holes, the third pair of differential via holes and the fourth pair of differential via holes, and expanding the prismatic structure to obtain a complete differential via hole arrangement structure. The invention effectively inhibits differential crosstalk, improves the integrity of signals and can also obviously improve the signal-to-ground ratio of a differential via hole arrangement model. The PCB differential via hole arrangement optimization method can be widely applied to the field of PCB differential via hole arrangement design.
Description
Technical Field
The invention belongs to the field of PCB differential via hole arrangement design, and particularly relates to a PCB differential via hole arrangement optimization method.
Background
With the rapid development of electronic technology, crosstalk has become one of the key issues that must be faced in high-speed electronic design. Linear passive systems are known to satisfy the superposition theorem. If there is signal transmission on the victim wire, noise can be superimposed on the signal on the victim wire, resulting in signal distortion and signal integrity problems. Compared with single-ended signaling, differential signaling has stronger anti-interference capability, higher signal-to-noise ratio, lower radiation and larger bandwidth capacity. Differential signaling has become the preferred method of data transmission in order to achieve high speed applications and reduce noise.
For the arrangement of the differential via holes of the PCB in the high-speed digital circuit, the integrity of the signals transmitted by the via holes of the differential pairs is often influenced by the crosstalk of adjacent signal networks, and the integrity of the signals is damaged. At present, the analysis and research on PCB differential vias focus on the suppression of differential crosstalk in differential pairs, and the research on how to suppress differential crosstalk and improve the signal-to-ground ratio is deficient.
Disclosure of Invention
In order to solve the above technical problems, an object of the present invention is to provide a PCB differential via arrangement optimization method, which effectively suppresses differential crosstalk, improves signal integrity, and can significantly improve the signal-to-ground ratio of a differential via arrangement model.
The technical scheme adopted by the invention is as follows: a PCB differential via hole arrangement optimization method comprises the following steps:
presetting a differential via hole radius, a differential via hole pitch and a reverse pad radius, and carrying out physical modeling to obtain a triangular via hole arrangement model;
constructing a first pair of differential via holes, a second pair of differential via holes, a third pair of differential via holes and a fourth pair of differential via holes according to a preset rule based on a triangular via hole arrangement model;
and forming a prismatic structure by the first pair of differential via holes, the second pair of differential via holes, the third pair of differential via holes and the fourth pair of differential via holes, and expanding the prismatic structure to obtain a complete differential via hole arrangement model.
Further, the step of presetting the radius of the differential via holes, the distance between the differential via holes and the radius of the anti-pad and performing physical modeling to obtain a triangular via hole arrangement model specifically comprises the following steps:
establishing a two-dimensional model of the differential via holes based on a Q2D simulation tool, firstly setting the radius of the differential via holes, setting the characteristic impedance of the differential via holes to be 100 ohms, finding the parameters of the model by a parameter traversal method, and determining the distance between the differential via holes;
constructing a laminated two-dimensional model of the differential via holes according to the radius of the differential via holes and the distance of the differential via holes, and obtaining the radius of the anti-bonding pad under the characteristic impedance close to 100 ohms;
and carrying out physical modeling according to the radius of the differential via holes, the distance between the differential via holes and the radius of the reverse bonding pad to obtain a triangular via hole arrangement model.
Further, the anti-pad includes two circular anti-pads and one rectangular anti-pad.
Further, the parameters of the model comprise the number of ground vias, the dielectric material, and the dielectric constant and the tangent loss angle corresponding to the dielectric material.
Further, the number of the ground vias is 8, the dielectric material is Megtron7, the dielectric constant corresponding to Megtron7 is 3.3, and the tangent loss angle is 0.02.
Further, the step of constructing a first pair of differential via holes, a second pair of differential via holes, a third pair of differential via holes and a fourth pair of differential via holes according to a preset rule based on the triangular via hole arrangement model specifically includes:
based on a triangular via hole arrangement model, a first pair of differential via holes are arranged in the horizontal direction on the basis of triangular via hole arrangement;
a second pair of differential through holes are obliquely arranged at an angle of 60 degrees right above the first pair of differential through holes;
translating the distance between the two via holes to the right in the second pair of differential via holes to obtain a third pair of differential via holes;
a fourth pair of differential vias is horizontally disposed above the third pair of differential vias.
The method has the beneficial effects that: according to the invention, on the basis of the triangular via holes, the vertically symmetrical differential pair arrangement is constructed, the arrangement structure is expanded, and a plurality of differential via hole arrangement models in the PCB stack are established, so that reference is provided for the optimal design of the high-speed PCB differential via hole arrangement.
Drawings
FIG. 1 is a flow chart of steps of a method for optimizing PCB differential via arrangement in accordance with an embodiment of the present invention;
FIG. 2 is a vertically symmetric differential via arrangement in accordance with an embodiment of the present invention;
FIG. 3 illustrates the Dermax results of the optimized layout of differential vias according to an embodiment of the present invention;
FIG. 4 is a top view of a complete differential via arrangement in accordance with an embodiment of the present invention;
FIG. 5 is a graphical comparison of the insertion to loss crosstalk ratio (ICR) for a conventional differential via structure versus a complete differential via arrangement in accordance with an embodiment of the present invention;
fig. 6 is a comparison of a conventional differential via structure diagram and a complete differential via arrangement Integrated Crosstalk Noise (ICN) of an embodiment of the invention.
Reference numerals: 1. a via hole; 2. and an anti-pad.
Detailed Description
The invention is described in further detail below with reference to the figures and the specific embodiments. The step numbers in the following embodiments are provided only for convenience of illustration, the order between the steps is not limited at all, and the execution order of each step in the embodiments can be adapted according to the understanding of those skilled in the art.
As shown in fig. 1, the present invention provides a PCB differential via arrangement optimization method, which includes the following steps:
s1, presetting a differential via hole radius, a differential via hole pitch and an inverse pad radius, and carrying out physical modeling to obtain a triangular via hole arrangement model;
s2, constructing a first pair of differential via holes, a second pair of differential via holes, a third pair of differential via holes and a fourth pair of differential via holes according to a preset rule based on the triangular via hole arrangement model;
specifically, a plurality of differential via arrangements are constructed in a triangular via arrangement. First, two adjacent via holes are selected in the horizontal direction to form a first pair of differential via holes, and then two adjacent via holes are selected right above the differential via holes to serve as a second pair of differential via holes, wherein the second pair of differential via holes are placed at an angle of 60 degrees with the horizontal direction, so that a vertical symmetrical structure is formed between the two pairs of differential via holes, as shown in fig. 2. The second differential via hole is horizontally moved to the right by the distance of the distance between the two via holes to form a third pair of differential via holes, and the differential via holes are also placed at 60 degrees with the horizontal direction, so that the second pair of differential via holes and the third pair of differential via holes are parallel. Two via holes are selected right above the third pair of differential via holes to form a fourth pair of differential via holes, and the two pairs of differential via holes are also arranged in a vertical symmetrical structure. After the differential via holes form a vertical symmetrical structure, the crosstalk of the adjacent differential via holes on the two differential via holes is different, so for better distinction, the differential via holes arranged transversely are defined as differential via holes A, and the differential via holes arranged at 60 degrees with the horizontal direction are defined as differential via holes B. Crosstalk of signals is generally caused by both inductive and capacitive coupling, where inductive coupling is the primary cause of crosstalk. According to the symmetry principle, the reason that the structure can effectively suppress the differential crosstalk is that the distance between any one signal line of the first pair of differential vias and two signals of the second pair of differential vias is equal, and because the polarities of the signals transmitted by the first differential via are opposite, the differential mutual inductance received by the second pair of differential vias can cancel out a part of each other, that is, the inductive coupling between the differential pairs is reduced, and the differential crosstalk received by the differential vias will be reduced. The invention reconstructs the differential via hole arrangement pattern by utilizing the vertical symmetry principle, and has better crosstalk inhibition effect and higher signal-to-ground ratio compared with the traditional arrangement. Fig. 2 is a vertical symmetrical differential via hole arrangement structure established by the present invention, and fig. 3 is a prismatic structure of the differential via hole optimized arrangement established by the present invention.
S3, forming a prismatic structure by the first pair of differential via holes, the second pair of differential via holes, the third pair of differential via holes and the fourth pair of differential via holes, and expanding the prismatic structure to obtain a complete differential via hole arrangement structure.
Specifically, the four pairs of differential via arrangement structures in step S2 are viewed from one basic unit, and the basic unit is expanded up, down, left and right to form a periodic structure. In practical engineering, the number of differential vias can be determined according to the size of the circuit design. The model of the optimized arrangement has a signal-to-ground ratio of 1:1.11, which is improved by 51.8% compared with the traditional differential via hole arrangement with a signal-to-ground ratio of 1: 1.5. Compared with the traditional differential via hole arrangement model, the differential via hole model which is vertically and symmetrically arranged has a better simulation result. Fig. 4 is a top view of the overall structure of the optimized arrangement of differential vias created by the present invention.
As a further preferred embodiment of the method, the step of presetting the radius of the differential via holes, the distance between the differential via holes and the radius of the reverse pad and performing physical modeling to obtain a triangular via hole arrangement model specifically comprises:
establishing a two-dimensional model of the differential via holes based on a Q2D simulation tool, firstly setting the radius of the differential via holes, setting the characteristic impedance of the differential via holes to be 100 ohms, finding out the parameters of the model by a parameter traversal method, and determining the distance between the differential via holes;
constructing a laminated two-dimensional model of the differential via holes according to the radius of the differential via holes and the distance between the differential via holes, and obtaining the radius of an anti-bonding pad close to the impedance of 100 ohms;
and carrying out physical modeling according to the radius of the differential via holes, the distance between the differential via holes and the radius of the reverse bonding pad to obtain a triangular via hole arrangement model.
Specifically, in order to achieve good electrical characteristics of the differential vias, the via radii of the differential vias, the spacing between the vias, and the size of the anti-pad radii are designed. 1 is a via, 2 is an anti-pad of the model, d is the pitch between vias, and the pitch length between each adjacent via is d. To achieve good electrical performance, appropriate parameters are chosen to bring the port impedance close to 100 ohms.
Further as a preferred embodiment of the method, the anti-pad includes two circular anti-pads and one rectangular anti-pad.
Further as a preferred embodiment of the present invention, the parameters of the model include the number of ground vias, the dielectric material, and the dielectric constant and the tangent loss angle corresponding to the dielectric material.
As a further preferred embodiment of the present invention, the number of the ground vias is 8, the dielectric material is Megtron7, the dielectric constant corresponding to Megtron7 is 3.3, and the tangent loss angle is 0.02.
In particular, via radius and via pitch are the most important parameters in determining differential via impedance, followed by the size of the differential via antipad. A triangular via hole arrangement model is established in Q2D simulation, a pair of differential via holes is arranged, 8 ground via holes are arranged around the differential via holes, a dielectric material is selected to be Megtron7, the dielectric constant of the dielectric material is 3.3, and the tangent loss angle of the dielectric material is 0.02. Simulation results show that the differential impedance is close to 100 ohms when the radius of the via holes is 5mil and the distance between the via holes is 0.9 mm. Then using the via radius and via pitch obtained in the previous step, the anti-pad radius at a characteristic impedance close to 100 ohms was obtained using a Q2D simulation tool, with the anti-pad radius being 15 mils and the differential impedance being approximately 100 ohms. In general, the impedance of the differential via can be made close to 100 ohms by parametric simulation of Q2D, achieving good electrical characteristics of the differential via.
As a further preferred embodiment of the present invention, the step of constructing the first pair of differential vias, the second pair of differential vias, the third pair of differential vias, and the fourth pair of differential vias according to a preset rule based on the triangular via hole arrangement model specifically includes:
based on the triangular via hole arrangement model, a first pair of differential via holes are arranged in the horizontal direction on the basis of the triangular via hole arrangement;
a second pair of differential through holes are obliquely arranged at an angle of 60 degrees right above the first pair of differential through holes;
translating the distance between the two via holes to the right in the second pair of differential via holes to obtain a third pair of differential via holes;
a fourth pair of differential vias is horizontally disposed above the third pair of differential vias.
As shown in fig. 5, the insertion-to-loss-to-crosstalk ratio (ICR) of the conventional differential via pattern is compared in the frequency domain with the new differential via optimized pattern proposed by the present invention. According to the results in the figure, compared with the traditional differential via arrangement, the differential via arrangement based on the symmetry principle provided by the invention has a larger insertion-loss-to-interference ratio (ICR) value in the frequency band range of 30GHz, which shows that the differential via optimized arrangement model has better performance.
Further, as shown in fig. 6, the new differential via hole optimized arrangement pattern proposed by the present invention is compared with the conventional differential via hole arrangement pattern in time domain according to the calculation standard of the Integrated Crosstalk Noise (ICN). In the frequency band range of 30GHz, the integrated crosstalk noise ICN of the differential via hole model 2A optimally distributed by the differential via holes is 3.14mV, and the integrated crosstalk noise ICN of the differential via hole model 2B is 2.82mV, which is smaller than the traditional differential via hole distribution with the integrated crosstalk noise of 4.61 mV. Compared with the traditional differential via hole arrangement model, the Integrated Crosstalk Noise (ICN) of the differential via hole model 2A and the differential via hole model 2B in the differential via hole optimal arrangement model is respectively reduced by 31.89% and 38.82%.
In summary, the optimized arrangement of the pattern differential via holes provided in the present invention has better signal integrity characteristics. Compared with the traditional differential via hole arrangement pattern, the optimized arrangement of the invention has higher signal-to-ground ratio, can effectively inhibit differential crosstalk, and can provide technical guidance for a PCB differential porous structure.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (5)
1. A PCB differential via hole arrangement optimization method is characterized by comprising the following steps:
establishing a two-dimensional model of the differential via holes based on a Q2D simulation tool, firstly setting the radius of the differential via holes, setting the characteristic impedance of the differential via holes to be 100 ohms, finding the parameters of the model by a parameter traversal method, and determining the distance between the differential via holes;
constructing a laminated two-dimensional model of the differential via holes according to the radius of the differential via holes and the distance of the differential via holes, and obtaining the radius of the anti-bonding pad under the characteristic impedance close to 100 ohms;
performing physical modeling according to the radius of the differential via holes, the distance between the differential via holes and the radius of the reverse bonding pad to obtain a triangular via hole arrangement model;
constructing a first pair of differential via holes, a second pair of differential via holes, a third pair of differential via holes and a fourth pair of differential via holes according to a preset rule based on a triangular via hole arrangement model;
and forming a prismatic structure by the first pair of differential via holes, the second pair of differential via holes, the third pair of differential via holes and the fourth pair of differential via holes, and expanding the prismatic structure to obtain a complete differential via hole arrangement structure.
2. The PCB differential via layout optimization method of claim 1, wherein the anti-pad comprises two circular anti-pads and one rectangular anti-pad.
3. The PCB differential via arrangement optimization method of claim 2, wherein the parameters of the model comprise the number of ground vias, the dielectric material, and the dielectric constant and the tangent loss angle corresponding to the dielectric material.
4. The PCB differential via arrangement optimization method of claim 3, wherein the number of the ground vias is 8, the dielectric material is Megtron7, the dielectric constant corresponding to Megtron7 is 3.3, and the tangent loss angle is 0.02.
5. The PCB differential via hole arrangement optimization method according to claim 4, wherein the step of constructing the first pair of differential via holes, the second pair of differential via holes, the third pair of differential via holes and the fourth pair of differential via holes according to a preset rule based on the triangular via hole arrangement model specifically comprises:
based on the triangular via hole arrangement model, a first pair of differential via holes are arranged in the horizontal direction on the basis of the triangular via hole arrangement;
a second pair of differential through holes are obliquely arranged at an angle of 60 degrees right above the first pair of differential through holes;
translating the distance between the two via holes to the right in the second pair of differential via holes to obtain a third pair of differential via holes;
a fourth pair of differential vias is horizontally disposed above the third pair of differential vias.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1615067A (en) * | 2003-11-08 | 2005-05-11 | 鸿富锦精密工业（深圳）有限公司 | Differential wire assembling method for eliminating high speed board interferes |
| CN1870852A (en) * | 2005-05-28 | 2006-11-29 | 鸿富锦精密工业（深圳）有限公司 | Printed circuit board with improved differential via |
| JP2011170251A (en) * | 2010-02-22 | 2011-09-01 | Sumitomo Bakelite Co Ltd | Optical element-mounting substrate, opto-electric hybrid substrate, and electronic equipment |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10103054B2 (en) * | 2013-03-13 | 2018-10-16 | Intel Corporation | Coupled vias for channel cross-talk reduction |
| CN105764232A (en) * | 2014-12-17 | 2016-07-13 | 鸿富锦精密工业(武汉)有限公司 | Printed circuit board and electronic device with application of printed circuit board |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1615067A (en) * | 2003-11-08 | 2005-05-11 | 鸿富锦精密工业（深圳）有限公司 | Differential wire assembling method for eliminating high speed board interferes |
| CN1870852A (en) * | 2005-05-28 | 2006-11-29 | 鸿富锦精密工业（深圳）有限公司 | Printed circuit board with improved differential via |
| JP2011170251A (en) * | 2010-02-22 | 2011-09-01 | Sumitomo Bakelite Co Ltd | Optical element-mounting substrate, opto-electric hybrid substrate, and electronic equipment |
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