CN112788641A - Power control group pcg sequence position detection method and device - Google Patents
Power control group pcg sequence position detection method and device Download PDFInfo
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Abstract
The embodiment of the invention provides a method and a device for detecting the position of a pcg sequence of a power control group, wherein the method comprises the following steps: receiving a sequence to be detected sent by a mobile station, wherein the sequence to be detected comprises a power control group pcg sequence; acquiring a pre-generated pseudo-random sequence PN sequence, wherein the PN sequence comprises X scrambling code sequence sets, one scrambling code sequence set comprises N scrambling codes, and X, N is a positive integer; determining self-correlation power accumulation sum information of each scrambling code sequence set and a sequence to be detected according to M scrambling codes in each scrambling code sequence set and the sequence to be detected, wherein M is smaller than N and is a positive integer; determining the starting position of the pcg sequence and the starting position of the scrambling code in the sequence to be detected according to the autocorrelation power accumulation sum information; the comprehensive tester and the mobile station are synchronized, so that the comprehensive tester can measure parameters of a sequence to be detected, the method can detect the correct pcg initial position when receiving the pcg sequence with incomplete length, and the detection speed can be improved.
Description
Technical Field
The invention relates to the technical field of mobile communication, in particular to a method and a device for detecting the position of a power control group pcg sequence.
Background
In CDMA2000(Code Division Multiple Access), in order to ensure the normal operation of a communication network and to ensure that the communication network does not interfere with other communication systems, it is necessary to test a mobile station in use. The current common testing method mainly uses a comprehensive tester and other auxiliary devices equipped with special testing software to test the basic performance of the mobile station, such as error vector magnitude, transmitting power and the like.
In the process of testing the performance of the mobile station, the mobile station and the comprehensive tester are synchronized. In the process of synchronizing the mobile station and the comprehensive tester, the comprehensive tester acquires a pcg (Power Control Group) Sequence to be tested according to a required minimum measurement length plus a short window, and then descrambles the acquired pcg (Power Control Group) Sequence by respectively adopting each scrambling code Sequence set in a PN (Pseudo-noise) Sequence, wherein the maximum length scrambling code Sequence (such as 1152 chips) is adopted for descrambling each time to obtain a plurality of autocorrelation Power accumulation sums, then a peak value of the plurality of autocorrelation Power accumulation sums is found, the position of the pcg Sequence corresponding to the peak value and the corresponding scrambling code position are recorded, and further the synchronization of the mobile station and the comprehensive tester can be realized according to the detected position of the pcg Sequence, so that the comprehensive tester can perform parameter measurement according to the radio frequency parameters and the like of the pcg Sequence to be detected by the position.
However, in the above synchronization process, since the integrated tester collects the signal to be detected according to the minimum required measurement length plus a short window, the pcg sequence that may be collected is incomplete, and at this time, if the maximum length (e.g. 1152 chips) scrambling sequence is used to descramble the pcg sequence and the PN sequence, the peak of the autocorrelation power summation cannot be detected, so that the true position of the pcg sequence cannot be detected, which results in the detection errors of both the position of the pcg sequence and the corresponding scrambling position, and further affects the synchronization of the mobile station and the integrated tester and the measurement of parameters.
Disclosure of Invention
The embodiment of the invention provides a method for detecting the position of a pcg sequence of a power control group, which is used for accurately determining the position of the pcg sequence and realizing the synchronization of a mobile station and a comprehensive tester.
Correspondingly, the embodiment of the invention also provides a device for detecting the position of the pcg sequence of the power control group, which is used for ensuring the realization and the application of the method.
In order to solve the above problems, the present invention discloses a method for detecting the position of a pcg sequence of a power control group, which specifically comprises: receiving a sequence to be detected sent by a mobile station, wherein the sequence to be detected comprises a power control group pcg sequence; acquiring a pre-generated pseudo-random sequence PN sequence, wherein the PN sequence comprises X scrambling code sequence sets, one scrambling code sequence set comprises N scrambling codes, and X, N is a positive integer; determining self-correlation power accumulation sum information of each scrambling code sequence set and a sequence to be detected according to M scrambling codes in each scrambling code sequence set and the sequence to be detected, wherein M is smaller than N and is a positive integer; and determining the starting position of the pcg sequence and the starting position of the scrambling code in the sequence to be detected according to the autocorrelation power accumulation sum information.
Optionally, the determining, according to the M scrambling codes in each scrambling code sequence set and the sequence to be detected, the autocorrelation power accumulation sum information of each scrambling code sequence set and the sequence to be detected includes: descrambling the sequence to be detected according to M scrambling codes in a scrambling code sequence set aiming at one scrambling code sequence set to obtain a descrambled sequence to be detected; performing de-spreading on the descrambled sequence to be detected to obtain the de-spread sequence to be detected; and determining the autocorrelation power accumulation sum information of the scrambling code sequence set and the sequence to be detected according to the sequence to be detected after the despreading.
Optionally, the sequence to be detected comprises a plurality of pcg chips; determining the starting position of the pcg sequence and the starting position of the scrambling code in the sequence to be detected according to the autocorrelation power accumulation sum information, wherein the determining comprises the following steps: determining maximum autocorrelation power accumulation sum information and a corresponding target scrambling code sequence set; determining a pcg chip position interval corresponding to a pcg sequence in the sequence to be detected according to the maximum autocorrelation power accumulation sum information; and determining the position of the target starting pcg chip corresponding to the pcg sequence and the position of the target starting scrambling code corresponding to the target scrambling code sequence set according to the pcg chip position interval and the scrambling code position interval corresponding to the target scrambling code sequence set.
Optionally, the determining, according to the pcg chip position interval and the scrambling code position interval corresponding to the target scrambling code sequence set, a position of a target starting pcg chip corresponding to the pcg sequence and a position of a target starting scrambling code corresponding to the target scrambling code sequence set includes: determining the position of the pcg sequence corresponding to the predicted starting pcg chip according to the pcg chip position interval; determining the position of the predicted initial scrambling code corresponding to the target scrambling code set according to the scrambling code position interval corresponding to the target scrambling code set; determining the position offset corresponding to the pcg sequence according to the position of the predicted starting pcg chip; determining the position of the target starting pcg chip corresponding to the pcg sequence according to the position and the offset of the predicted starting pcg chip; and determining the position of the target scrambling code sequence set corresponding to the target initial scrambling code according to the position and the position offset of the predicted initial scrambling code.
Optionally, the X scrambling code sequence sets are acquired through S cycles, where X is greater than S, and S is a positive integer; determining the position of the target scrambling code sequence set corresponding to the target initial scrambling code according to the position and the position offset of the predicted initial scrambling code, wherein the determining comprises: judging whether the target scrambling code sequence set is a first scrambling code sequence set of a PN sequence; if yes, calculating the sum of the position of the predicted initial scrambling code and the number of the corresponding scrambling codes in one period, and determining the position of the target initial scrambling code corresponding to the target scrambling code sequence set according to the sum and the position offset; if not, calculating the difference value between the position of the predicted initial scrambling code and the position offset to obtain the position of the target initial scrambling code corresponding to the target scrambling code sequence set.
The embodiment of the invention also provides a device for detecting the position of the pcg sequence of the power control group, which specifically comprises the following steps: the receiving module is used for receiving a sequence to be detected sent by a mobile station, wherein the sequence to be detected comprises a power control group pcg sequence; an obtaining module, configured to obtain a pre-generated pseudo-random sequence PN sequence, where the PN sequence includes X scrambling code sequence sets, one scrambling code sequence set includes N scrambling codes, and X, N is a positive integer; a determining module, configured to determine, according to M scrambling codes in each scrambling code sequence set and a sequence to be detected, autocorrelation power accumulation sum information of each scrambling code sequence set and the sequence to be detected, where M is smaller than N and is a positive integer; and the detection module is used for determining the starting position of the pcg sequence and the starting position of the scrambling code in the sequence to be detected according to the autocorrelation power accumulation sum information.
Optionally, the determining module is configured to descramble, according to M scrambling codes in a scrambling code set, the sequence to be detected, so as to obtain a descrambled sequence to be detected; performing de-spreading on the descrambled sequence to be detected to obtain the de-spread sequence to be detected; and determining the autocorrelation power accumulation sum information of the scrambling code sequence set and the sequence to be detected according to the sequence to be detected after the despreading.
Optionally, the sequence to be detected comprises a plurality of pcg chips; the detection module comprises: the set determining submodule is used for determining the maximum autocorrelation power accumulation sum information and a corresponding target scrambling code sequence set; the interval determination submodule is used for determining a pcg chip position interval corresponding to the pcg sequence in the sequence to be detected according to the maximum autocorrelation power accumulation sum information; and the initial position determining submodule is used for determining the position of the target initial pcg chip corresponding to the pcg sequence and the position of the target initial scrambling code corresponding to the target scrambling code sequence set according to the pcg chip position interval and the scrambling code position interval corresponding to the target scrambling code sequence set.
Optionally, the starting position determining submodule is configured to determine, according to the pcg chip position interval, a position of the pcg sequence corresponding to a predicted starting pcg chip; determining the position of the predicted initial scrambling code corresponding to the target scrambling code set according to the scrambling code position interval corresponding to the target scrambling code set; determining the position offset corresponding to the pcg sequence according to the position of the predicted starting pcg chip; determining the position of the target starting pcg chip corresponding to the pcg sequence according to the position and the offset of the predicted starting pcg chip; and determining the position of the target scrambling code sequence set corresponding to the target initial scrambling code according to the position and the position offset of the predicted initial scrambling code.
Optionally, the X scrambling code sequence sets are acquired through S cycles, where X is greater than S, and S is a positive integer; the initial position determining submodule is used for judging whether the target scrambling code sequence set is a first scrambling code sequence set of a PN sequence; if yes, calculating the sum of the position of the predicted initial scrambling code and the number of the corresponding scrambling codes in one period, and determining the position of the target initial scrambling code corresponding to the target scrambling code sequence set according to the sum and the position offset; if not, calculating the difference value between the position of the predicted initial scrambling code and the position offset to obtain the position of the target initial scrambling code corresponding to the target scrambling code sequence set.
Compared with the prior art, the embodiment of the invention has the following advantages:
in the embodiment of the invention, a sequence to be detected sent by a mobile station is received firstly, wherein the sequence to be detected comprises a power control group pcg sequence; then, a pre-generated pseudo random sequence PN sequence is obtained, wherein the PN sequence comprises X scrambling code sequence sets, one scrambling code sequence set comprises N scrambling codes, and X, N is a positive integer; determining the autocorrelation power accumulation sum information of each scrambling code sequence set and the sequence to be detected according to M scrambling codes and the sequence to be detected in each scrambling code sequence set, wherein M is smaller than N, and M is a positive integer; determining the starting position of the pcg sequence and the starting position of the scrambling code in the sequence to be detected according to the autocorrelation power accumulation sum information; the comprehensive tester and the mobile station are synchronized, and the comprehensive tester can measure parameters of the collected sequence to be detected; because the embodiment of the invention only adopts part of scrambling codes in each scrambling code sequence set and the sequence to be detected to carry out position detection, on one hand, the correct pcg starting position can be detected when a pcg sequence with incomplete length is received, and on the other hand, the operation amount can be reduced and the detection speed can be improved.
Drawings
FIG. 1 is a flow chart of the steps of an embodiment of a method of detecting the position of a power control group pcg sequence in accordance with the present invention;
FIG. 2 is a flow chart of steps of an alternate embodiment of a method for detecting the position of a power control group pcg sequence in accordance with the present invention;
FIG. 3 is a diagram illustrating an initial state of a shift register generating PN codes according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of the autocorrelation power accumulation and information for a complete pcg sequence in accordance with an embodiment of the present invention;
FIG. 5 is a schematic diagram of the autocorrelation power accumulation and information for an incomplete pcg sequence in accordance with an embodiment of the present invention;
FIG. 6 is a schematic diagram of the autocorrelation power accumulation and information for another incomplete pcg sequence in accordance with an embodiment of the present invention;
FIG. 7 is a block diagram of an embodiment of the apparatus for detecting the position of a pcg sequence of power control groups according to the present invention;
fig. 8 is a block diagram of an alternative embodiment of a power control group pcg sequence position detection apparatus of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
Referring to fig. 1, a flowchart illustrating steps of an embodiment of a method for detecting a sequence position of a power control group pcg according to the present invention is shown, which may specifically include the following steps:
And 103, determining the autocorrelation power accumulation sum information of each scrambling code sequence set and the sequence to be detected according to the M scrambling codes and the sequence to be detected in each scrambling code sequence set, wherein M is smaller than N, and M is a positive integer.
In the embodiment of the invention, in the CDMA2000 system, the integrated tester and the mobile station can be synchronized firstly in the process of testing the mobile station by adopting the integrated tester. After synchronization, the comprehensive tester can perform data interaction with the mobile station, so as to realize performance parameter testing (such as error vector magnitude testing) on the mobile station.
In the synchronization process, the mobile station and the comprehensive tester can generate the same PN sequence in advance; for example, a PN sequence may be generated by first concatenating X sets of scrambling code sequences. Wherein, one scrambling code sequence set in the PN sequence can be composed of N scrambling codes, and X, N is a positive integer. Then, the mobile station can select one scrambling code sequence set to carry out scrambling processing on the signal to be sent; for example, the mobile station may select M scrambling codes (where M is smaller than N and M is a positive integer, that is, a part of the scrambling codes in each scrambling code sequence set) in one scrambling code sequence set from the pre-generated PN sequences to perform scrambling processing on the signal to be transmitted. Then the mobile station sends the scrambled signal; correspondingly, the comprehensive tester receives the to-be-detected sequence corresponding to the scrambled signal; the sequence to be detected is a pcg sequence, and at least one pcg sequence can be included in the sequence to be detected. Wherein, due to the influence of the transmission environment between the integrated tester and the mobile station, the pcg sequence in the sequence to be detected can be a complete pcg sequence or an incomplete pcg sequence; therefore, the pcg sequence start position and the scrambling code start position in the sequence to be detected need to be determined, so as to realize synchronization.
The scrambling processing is carried out on the sequence to be detected obtained by the comprehensive tester, and the comprehensive tester does not determine which scrambling sequence set in the PN sequences is adopted by the mobile station for scrambling processing; therefore, the comprehensive tester can firstly acquire a pre-generated PN sequence, then process the signal to be detected according to the PN sequence, and determine the starting position of the pcg sequence and the starting position of the scrambling code in the sequence to be detected. The sequence to be detected can be processed by adopting each scrambling code sequence set in the PN sequence, so as to obtain a plurality of autocorrelation power accumulations and information corresponding to each scrambling code sequence set and the sequence to be detected. For a scrambling code sequence set, the sequence to be detected can be processed by M scrambling codes in the scrambling code sequence set, and an autocorrelation power accumulation sum information of the scrambling code sequence set and the sequence to be detected is obtained.
And step 104, determining the pcg sequence starting position and the scrambling code starting position in the sequence to be detected according to the autocorrelation power accumulation sum information.
In the embodiment of the invention, the maximum value of the autocorrelation power accumulation sum information can be determined according to a plurality of autocorrelation power accumulation sum information corresponding to the sequence to be detected in each scrambling code sequence set. Then, according to the maximum value, predicting the initial position of the pcg sequence in the sequence to be detected; and determining a predicted initial position corresponding to the scrambling code sequence set used by the maximum value, calculating a corresponding position offset according to the predicted initial position corresponding to the pcg sequence in the sequence to be detected, and further determining the initial position of the pcg sequence in the sequence to be detected and the corresponding scrambling code initial position according to the position offset.
In the embodiment of the invention, a sequence to be detected sent by a mobile station is received firstly, wherein the sequence to be detected comprises a power control group pcg sequence; then, a pre-generated pseudo random sequence PN sequence is obtained, wherein the PN sequence comprises X scrambling code sequence sets, one scrambling code sequence set comprises N scrambling codes, and X, N is a positive integer; determining the autocorrelation power accumulation sum information of each scrambling code sequence set and the sequence to be detected according to M scrambling codes and the sequence to be detected in each scrambling code sequence set, wherein M is smaller than N, and M is a positive integer; determining the starting position of the pcg sequence and the starting position of the scrambling code in the sequence to be detected according to the autocorrelation power accumulation sum information; the comprehensive tester and the mobile station are synchronized, and the comprehensive tester can measure parameters of the collected sequence to be detected; because the embodiment of the invention only adopts part of scrambling codes in each scrambling code sequence set and the sequence to be detected to carry out position detection, on one hand, the correct pcg starting position can be detected when a pcg sequence with incomplete length is received, and on the other hand, the operation amount can be reduced and the detection speed can be improved.
Referring to fig. 2, a flowchart illustrating steps of an alternative embodiment of a method for detecting a sequence position of a power control group pcg according to the present invention is shown, which specifically includes the following steps:
in the embodiment of the invention, a mobile station (such as a user terminal) can scramble a signal to be transmitted by adopting the special scrambling code sequence of the cell, and a receiving end (such as a base station, an integrated tester and the like) descrambles the received signal by adopting the special scrambling code sequence, thereby reducing the signal interference of adjacent cells. Both the mobile station and the comprehensive tester can generate a special scrambling code sequence, namely a PN sequence, of the cell in advance; firstly, a longest code sequence (i.e. m sequence) can be generated by a multi-stage shift register or other delay elements through linear feedback, and the m sequence is taken as a period, and the PN sequence is obtained by repeating S times, wherein the m sequence comprises X/S scrambling code sequence sets, that is, X scrambling code sequence sets in the PN sequence are obtained by collecting S periods, wherein X is greater than S, and S is a positive integer; for example, a longest code sequence (i.e., m-sequence) can be generated by linear feedback from multiple stages of shift registers or other delay elements, and then a PN sequence with a length of 80ms can be generated in advance from the m-sequence.
In one example of the invention, the m-sequence may be generated from a reference sequence. The reference sequence can be obtained as required, and the first bit of the reference sequence is set to 0. Then, the reference sequence is processed by using a shift register (as shown in fig. 3), so as to obtain a start sequence of the shift register: init _ FSR ═ 101010010011101'; and recursion is carried out on the initial sequence in a Fibonacci (Fibonacci number) mode to obtain an m sequence. For example, an m-sequence comprising 2^ (15-1) scrambling codes is obtained, and then a 0 scrambling code is supplemented after 14 consecutive 0 scrambling codes in the m-sequence, so that the period length of the m-sequence is 2^15 (i.e., the m-sequence comprises 32768 scrambling codes), wherein the m-sequence with the period length of 2^15 corresponds to the length of 20 ms. Then, when the long code is set to 0, the 20ms long m-sequence can be directly converted into a plus-minus 1 sequence, thereby generating a complex scrambling code sequence. Then, the power of the complex scrambling code sequence is normalized, and the complex scrambling code sequence after power normalization is repeated three times according to the period length of 2^15, so as to obtain a PN sequence with the period length of 3 ^ 2^15, namely obtain a PN sequence with the length of 80ms, wherein the PN sequence can comprise 64 scrambling code sequence sets, and each scrambling code sequence set comprises 1536 scrambling codes (namely, (3 ^ 2^15)/64 ^ 1536).
And step 203, determining the autocorrelation power accumulation sum information of each scrambling code sequence set and the sequence to be detected according to the M scrambling codes and the sequence to be detected in each scrambling code sequence set, wherein M is smaller than N, and M is a positive integer.
In the embodiment of the present invention, the mobile station may select M scrambling codes in one scrambling code sequence set from the pre-generated PN sequences to perform scrambling processing on a signal to be transmitted, and then transmit the scrambled signal. The comprehensive tester can find the best path of sampling signal from the received signal data, and obtain the sequence to be detected from the best path of sampling signal. After the comprehensive tester collects the sequence to be detected, a pre-generated pseudo-random sequence PN sequence can be obtained, and then the self-correlation power accumulation sum information of each scrambling code sequence set and the sequence to be detected is determined according to M scrambling codes in each scrambling code sequence set and the sequence to be detected.
Wherein, the following sub-steps can be referred to determine the autocorrelation power accumulation sum information of each scrambling code sequence set and the sequence to be detected:
and a substep 31, descrambling the sequence to be detected according to the M scrambling codes in the scrambling code set aiming at one scrambling code set, so as to obtain the descrambled sequence to be detected.
And a substep 32 of performing despreading on the descrambled sequence to be detected to obtain the despread sequence to be detected.
And a substep 33, determining the autocorrelation power accumulation sum information of the scrambling code sequence set and the sequence to be detected according to the sequence to be detected after despreading.
The sequence to be detected collected by the comprehensive tester comprises a plurality of pcg chips, and in one example of the present invention, the length of the sequence to be detected may be: l + win size, where L may represent the length L of the pcg sequence in the sequence to be detected and win size may represent the length of the acquisition sequence in the sequence to be detected, where the pcg sequence in the sequence to be detected may include a chips of length L. For example, a may take the value 1536 pcg chips (chips). The detection position pcg _ pos of the sequence to be detected is j, wherein j is 0: l + win _ size-1-512, i.e., j ranges from 0 to L + win _ size-1-512.
The following describes determining the autocorrelation power accumulation sum information of each scrambling code sequence set and the sequence to be detected, taking as an example that the PN sequence may include 64 scrambling code sequence sets.
In the embodiment of the invention, a corresponding serial number src _ code _ index can be marked for each scrambling code sequence set in the PN sequence; where, src _ code _ index may be equal to i, i is equal to 1:64, that is, i has a value ranging from 1 to 64. One scrambling code sequence set can comprise 1536 scrambling codes with the lengths of chips, and for one scrambling code sequence set, the scrambling codes with the lengths of the first 512 chips in the scrambling code sequence set can be subjected to conjugate multiplication with a sequence to be detected, so that the sequence to be detected is descrambled; obtaining the descrambled sequence to be detected with the length of 512 chips. Then, performing despreading on the descrambled sequence to be detected to obtain the despread sequence to be detected, for example, (when the spreading factor is 32, a despread complex sequence with a length of 16 chips can be obtained); and then, carrying out autocorrelation on the 16 despread complex sequences by adopting an autocorrelation function to obtain 16 power values, and carrying out accumulation summation to obtain an autocorrelation power accumulation sum information pow _ sum (j, i) of the scrambling code sequence set and the sequence to be detected. The process obtained by conjugate multiplication of each scrambling code sequence set in the PN sequence and the sequence to be detected is represented as:
wherein n can range from 1 to (L + winsize-512).
After descrambling and despreading the sequence to be detected by adopting a scrambling code sequence set in the PN sequence, and then performing autocorrelation accumulation summation on the sequence to be detected after despreading, one piece of autocorrelation power accumulation sum information can be obtained, so that 64 pieces of autocorrelation power accumulation sum information can be obtained in total.
After obtaining the plurality of autocorrelation power accumulation sum information, the integrated tester may determine, according to the autocorrelation power accumulation sum information, a position of the pcg sequence corresponding to the predicted start pcg chip and a scrambling code sequence set (which may also be referred to as a target scrambling code sequence set) used by the autocorrelation power accumulation sum information, and further determine a position of the target scrambling code sequence set corresponding to the predicted start scrambling code, which may specifically refer to step 204 and step 206.
And step 204, determining the maximum autocorrelation power accumulation sum information and a corresponding target scrambling code sequence set.
And step 205, determining a pcg chip position interval corresponding to the pcg sequence in the sequence to be detected according to the maximum autocorrelation power accumulation sum information.
In the embodiment of the invention, the plurality of autocorrelation power accumulation sum information can be compared, and the maximum autocorrelation power accumulation sum information can be searched. Searching a pcg chip position interval corresponding to the pcg sequence from the sequence to be detected according to the maximum autocorrelation power accumulation sum information, and determining the position of the first pcg chip in the pcg chip position interval corresponding to the pcg sequence as the position of the prediction starting pcg chip corresponding to the pcg sequence; and determining a target scrambling code sequence set corresponding to the maximum autocorrelation power accumulation sum information (namely determining which scrambling code sequence set in the pcg sequence is adopted to descramble the sequence to be detected). And then determining the position of the first scrambling code in the scrambling code position interval corresponding to the target scrambling code sequence set as the position of the predicted initial scrambling code corresponding to the target scrambling code sequence set.
In an example of the present invention, based on the above example, the following procedure may be referred to in the process of finding the maximum autocorrelation power accumulation sum information (max _ pow _ sum (j, i)) from the 64 autocorrelation power accumulation sum information, i.e., pow _ sum (j, i), and further determining the position of the pcg sequence corresponding to the predicted start pcg chip (pcg _ pos ═ j) and the target scrambling code sequence set (src _ code _ index ═ i) according to max _ pow _ sum (j, i):
in the embodiment of the present invention, the length of the pcg sequence in the sequence to be detected collected by the integrated tester may be fixed to a chips (for example, a may be 1536), and the length of the pcg sequence in the sequence to be detected may be one or more, which is not limited in this invention, for example, when the collected sequence to be detected includes a plurality of pcg sequences, the sum of the lengths of the plurality of pcg sequences may still be a chips, at this time, each pcg sequence in the sequence to be detected is an incomplete pcg sequence, for example, the sequence to be detected collected by the integrated tester may include two incomplete pcg sequences (i.e., pcg sequence 1 and pcg sequence 2), where the length of pcg sequence 1 is 700 chips, and the length of pcg sequence 2 is: 1536-.
When the complete pcg sequence is contained in the collected sequence to be detected, (see fig. 4) three distinct peaks of autocorrelation power summation information will appear. When the pcg sequence in the collected sequence to be detected is an incomplete pcg sequence, (see fig. 5 and fig. 6) one or two obvious autocorrelation power accumulation sum information peak values appear; for example, when the sequence a to be detected includes two incomplete pcg sequences, and the length of the pcg sequence 1 is 700 chips, and the length of the pcg sequence 2 is 836 chips, one peak of the autocorrelation power accumulation sum information can be found from 700 chips of the pcg sequence 1, and one peak of the autocorrelation power accumulation sum information can be found from 836 chips of the pcg sequence 2, so that two peaks of the autocorrelation power accumulation sum information can be found from the sequence a to be detected in total.
In the embodiment of the present invention, after determining the position of the pcg sequence corresponding to the predicted start pcg chip and the position of the target scrambling code sequence set corresponding to the predicted start scrambling code, the position of the target start pcg chip corresponding to the pcg sequence and the position of the target scrambling code sequence set corresponding to the target start scrambling code can be determined according to the position of the predicted start pcg chip and the position of the predicted start scrambling code, which can be referred to step 207 and step 209 specifically.
And step 207, determining a position offset corresponding to the pcg sequence according to the position of the predicted starting pcg chip.
And step 208, determining the position of the target starting pcg chip corresponding to the pcg sequence according to the position and the position offset of the predicted starting pcg chip.
In the embodiment of the invention, after the position of the starting pcg chip is predicted is determined, the position offset corresponding to the pcg sequence can be determined, and then the position of the target starting pcg chip and the position of the target starting scrambling code are detected according to the position offset.
Wherein the position of the target starting scrambling code corresponding to the target set of scrambling code sequences may be determined with reference to the sub-steps of,
and a substep 91 of determining whether the target scrambling code sequence set is the first scrambling code sequence set of the PN sequence.
And a substep 92, if yes, calculating a sum of the position of the predicted initial scrambling code and the number of the corresponding scrambling codes in one period, and determining the position of the target initial scrambling code corresponding to the target scrambling code sequence set according to the sum and the position offset.
And a substep 93, if not, calculating a difference value between the position of the predicted initial scrambling code and the position offset to obtain the position of the target initial scrambling code corresponding to the target scrambling code sequence set.
In an embodiment of the present invention, the position offset pcg _ offset corresponding to the pcg sequence may be determined according to the position pcg _ pos of the predicted start pcg chip, i.e., pcg _ offset is equal to floor (pcg _ pos/512), and then the position pcg _ start corresponding to the target start pcg chip of the pcg sequence may be determined according to the position pcg _ pos of the predicted start pcg chip and the position offset pcg _ offset, i.e., pcg _ start is equal to pcg _ pos-pcg _ offset 512. After determining the target scrambling code sequence set, it may be determined whether the target scrambling code sequence set is the first scrambling code sequence set of the PN sequence (i.e., determine whether src _ code _ index is 1), when the target scrambling code sequence set is the first scrambling code sequence set of the PN sequence (i.e., src _ code _ index is 1), a sum of a position of the predicted start scrambling code and a number of scrambling codes corresponding to one period is calculated, and then a position real _ src _ code _ index of the target start scrambling code corresponding to the target scrambling code sequence set is determined according to the sum and the position offset, that is, real _ src _ code _ index +32768-pcg _ offset 512. When the target scrambling code sequence set is not the first scrambling code sequence set of the PN sequence (that is, src _ code _ index is not 1), calculating a difference between the position of the predicted start scrambling code and the position offset to obtain a position real _ src _ code _ index of the target scrambling code sequence set corresponding to the target start scrambling code, that is, real _ src _ code _ index is 1536 × src _ code _ index-pcg _ offset 512.
For example, when pcg _ pos is 1149, and pcg _ offset is floor (pcg _ pos/512) floor (1149/512) is 2, then the pcg sequence corresponds to the position of the target start pcg chip: pcg _ start-pcg _ pos-pcg _ offset 512-1149-2 512-125; when the src _ code _ index is 1, the position of the target start scrambling code, real _ src _ code _ index 1536, src _ code _ index +32768-pcg _ offset 512, 1536, 1+32768-2, 512, 33280; when src _ code _ index is equal to i, 3, real _ src _ code _ index is 1536, src _ code _ index-pcg _ offset 512, 1536, 3-2, 512, 3584.
In the embodiment of the present invention, the autocorrelation power accumulation sum information of each scrambling code sequence set and the sequence to be detected may be determined according to M scrambling codes and the sequence to be detected in each scrambling code sequence set, where M is smaller than N, and M is a positive integer; determining the position of the pcg sequence corresponding to a predicted initial pcg chip and the position of the target scrambling code sequence set corresponding to a predicted initial scrambling code according to the maximum autocorrelation power accumulation sum information; then, according to the position of the predicted starting pcg chip, determining the position offset corresponding to the pcg sequence; determining the position of the target starting pcg chip corresponding to the pcg sequence according to the position and the position offset of the predicted starting pcg chip; determining the position of the target scrambling code sequence set corresponding to the target initial scrambling code according to the position and the position offset of the predicted initial scrambling code; on one hand, the embodiment of the invention only adopts partial scrambling codes in each scrambling code sequence set to perform sliding search with the sequence to be detected, and can detect the position of the target starting pcg chip of incomplete pcg contained in the sequence to be detected, and on the other hand, the embodiment of the invention can accurately find the position of the target starting pcg chip and the position of the target starting scrambling code through the position offset.
It should be noted that, for simplicity of description, the method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present invention is not limited by the illustrated order of acts, as some steps may occur in other orders or concurrently in accordance with the embodiments of the present invention. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no particular act is required to implement the invention.
Referring to fig. 7, a block diagram of an embodiment of a device for detecting a position of a pcg sequence of a power control group according to the present invention is shown, which may specifically include the following modules:
a receiving module 701, configured to receive a sequence to be detected sent by a mobile station, where the sequence to be detected includes a power control group pcg sequence;
an obtaining module 702, configured to obtain a pre-generated pseudo random sequence PN sequence, where the PN sequence includes X scrambling code sequence sets, one scrambling code sequence set includes N scrambling codes, and X, N is a positive integer;
a determining module 703, configured to determine, according to M scrambling codes in each scrambling code sequence set and a sequence to be detected, autocorrelation power accumulation sum information of each scrambling code sequence set and the sequence to be detected, where M is smaller than N, and M is a positive integer;
and a detecting module 704, configured to determine, according to the autocorrelation power accumulation sum information, a starting position of a pcg sequence and a starting position of a scrambling code in the sequence to be detected.
Referring to fig. 8, there is shown a block diagram of an alternative embodiment of a power control group pcg sequence position detection apparatus of the present invention.
In an optional embodiment of the present invention, the determining module 703 is configured to descramble, according to M scrambling codes in a scrambling code set, the sequence to be detected, so as to obtain a descrambled sequence to be detected; performing de-spreading on the descrambled sequence to be detected to obtain the de-spread sequence to be detected; and determining the autocorrelation power accumulation sum information of the scrambling code sequence set and the sequence to be detected according to the sequence to be detected after the despreading.
In an optional embodiment of the present invention, the sequence to be detected comprises a plurality of pcg chips;
the detection module 704 includes:
a set determining submodule 7041, configured to determine a maximum autocorrelation power accumulation sum information and a corresponding target scrambling code sequence set;
an interval determining submodule 7042, configured to determine, according to the maximum autocorrelation power accumulation sum information, a pcg chip position interval corresponding to a pcg sequence in the sequence to be detected;
and the starting position determining submodule 7043 is configured to determine, according to the pcg chip position interval and the scrambling code position interval corresponding to the target scrambling code sequence set, a position of a target starting pcg chip corresponding to the pcg sequence and a position of a target starting scrambling code corresponding to the target scrambling code sequence set.
In an optional embodiment of the present invention, the starting position determining sub-module 7043 is configured to determine, according to the pcg chip position interval, a position of the pcg sequence corresponding to a predicted starting pcg chip; determining the position of the predicted initial scrambling code corresponding to the target scrambling code set according to the scrambling code position interval corresponding to the target scrambling code set; determining the position offset corresponding to the pcg sequence according to the position of the predicted starting pcg chip; determining the position of the target starting pcg chip corresponding to the pcg sequence according to the position and the offset of the predicted starting pcg chip; and determining the position of the target scrambling code sequence set corresponding to the target initial scrambling code according to the position and the position offset of the predicted initial scrambling code.
In an optional embodiment of the present invention, the X scrambling code sequence sets are acquired through S cycles, where X is greater than S, and S is a positive integer;
the start position determining submodule 7043 is configured to determine whether the target scrambling code sequence set is a first scrambling code sequence set of a PN sequence; if yes, calculating the sum of the position of the predicted initial scrambling code and the number of the corresponding scrambling codes in one period, and determining the position of the target initial scrambling code corresponding to the target scrambling code sequence set according to the sum and the position offset; if not, calculating the difference value between the position of the predicted initial scrambling code and the position offset to obtain the position of the target initial scrambling code corresponding to the target scrambling code sequence set.
In summary, in the embodiment of the present invention, a sequence to be detected sent by a mobile station is received first, where the sequence to be detected includes a power control group pcg sequence; then, a pre-generated pseudo random sequence PN sequence is obtained, wherein the PN sequence comprises X scrambling code sequence sets, one scrambling code sequence set comprises N scrambling codes, and X, N is a positive integer; determining the autocorrelation power accumulation sum information of each scrambling code sequence set and the sequence to be detected according to M scrambling codes and the sequence to be detected in each scrambling code sequence set, wherein M is smaller than N, and M is a positive integer; determining the starting position of the pcg sequence and the starting position of the scrambling code in the sequence to be detected according to the autocorrelation power accumulation sum information; the comprehensive tester and the mobile station are synchronized, and the comprehensive tester can measure parameters of the collected sequence to be detected; because the embodiment of the invention only adopts part of scrambling codes in each scrambling code sequence set and the sequence to be detected to carry out position detection, on one hand, the correct pcg starting position can be detected when a pcg sequence with incomplete length is received, and on the other hand, the operation amount can be reduced and the detection speed can be improved.
For the device embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.
The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing terminal to cause a series of operational steps to be performed on the computer or other programmable terminal to produce a computer implemented process such that the instructions which execute on the computer or other programmable terminal provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.
The method and the device for detecting the position of the pcg sequence of the power control group provided by the invention are described in detail, and the principle and the implementation mode of the invention are explained by applying specific examples, and the description of the examples is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. A method for detecting the position of a pcg sequence in a power control group, comprising:
receiving a sequence to be detected sent by a mobile station, wherein the sequence to be detected comprises a power control group pcg sequence;
acquiring a pre-generated pseudo-random sequence PN sequence, wherein the PN sequence comprises X scrambling code sequence sets, one scrambling code sequence set comprises N scrambling codes, and X, N is a positive integer;
determining self-correlation power accumulation sum information of each scrambling code sequence set and a sequence to be detected according to M scrambling codes in each scrambling code sequence set and the sequence to be detected, wherein M is smaller than N and is a positive integer;
and determining the starting position of the pcg sequence and the starting position of the scrambling code in the sequence to be detected according to the autocorrelation power accumulation sum information.
2. The method of claim 1, wherein the determining the autocorrelation power summation information of each scrambling code sequence set and the sequence to be detected according to the M scrambling codes and the sequence to be detected in each scrambling code sequence set comprises:
descrambling the sequence to be detected according to M scrambling codes in a scrambling code sequence set aiming at one scrambling code sequence set to obtain a descrambled sequence to be detected;
performing de-spreading on the descrambled sequence to be detected to obtain the de-spread sequence to be detected;
and determining the autocorrelation power accumulation sum information of the scrambling code sequence set and the sequence to be detected according to the sequence to be detected after the despreading.
3. The method according to claim 2, wherein the sequence to be detected comprises a plurality of pcg chips;
determining the starting position of the pcg sequence and the starting position of the scrambling code in the sequence to be detected according to the autocorrelation power accumulation sum information, wherein the determining comprises the following steps:
determining maximum autocorrelation power accumulation sum information and a corresponding target scrambling code sequence set;
determining a pcg chip position interval corresponding to a pcg sequence in the sequence to be detected according to the maximum autocorrelation power accumulation sum information;
and determining the position of the target starting pcg chip corresponding to the pcg sequence and the position of the target starting scrambling code corresponding to the target scrambling code sequence set according to the pcg chip position interval and the scrambling code position interval corresponding to the target scrambling code sequence set.
4. The method of claim 3, wherein said determining the position of the pcg sequence corresponding to the target start pcg chip and the position of the target scrambling code sequence corresponding to the target start scrambling code according to the pcg chip position interval and the scrambling code position interval corresponding to the target scrambling code sequence set comprises:
determining the position of the pcg sequence corresponding to the predicted starting pcg chip according to the pcg chip position interval; determining the position of the predicted initial scrambling code corresponding to the target scrambling code set according to the scrambling code position interval corresponding to the target scrambling code set;
determining the position offset corresponding to the pcg sequence according to the position of the predicted starting pcg chip;
determining the position of the target starting pcg chip corresponding to the pcg sequence according to the position and the offset of the predicted starting pcg chip;
and determining the position of the target scrambling code sequence set corresponding to the target initial scrambling code according to the position and the position offset of the predicted initial scrambling code.
5. The method of claim 4, wherein the X sets of scrambling code sequences are acquired over S periods, wherein X is greater than S, and S is a positive integer;
determining the position of the target scrambling code sequence set corresponding to the target initial scrambling code according to the position and the position offset of the predicted initial scrambling code, wherein the determining comprises:
judging whether the target scrambling code sequence set is a first scrambling code sequence set of a PN sequence;
if yes, calculating the sum of the position of the predicted initial scrambling code and the number of the corresponding scrambling codes in one period, and determining the position of the target initial scrambling code corresponding to the target scrambling code sequence set according to the sum and the position offset;
if not, calculating the difference value between the position of the predicted initial scrambling code and the position offset to obtain the position of the target initial scrambling code corresponding to the target scrambling code sequence set.
6. A power control group pcg sequence position detection apparatus, comprising:
the receiving module is used for receiving a sequence to be detected sent by a mobile station, wherein the sequence to be detected comprises a power control group pcg sequence;
an obtaining module, configured to obtain a pre-generated pseudo-random sequence PN sequence, where the PN sequence includes X scrambling code sequence sets, one scrambling code sequence set includes N scrambling codes, and X, N is a positive integer;
a determining module, configured to determine, according to M scrambling codes in each scrambling code sequence set and a sequence to be detected, autocorrelation power accumulation sum information of each scrambling code sequence set and the sequence to be detected, where M is smaller than N and is a positive integer;
and the detection module is used for determining the starting position of the pcg sequence and the starting position of the scrambling code in the sequence to be detected according to the autocorrelation power accumulation sum information.
7. The apparatus of claim 6,
the determining module is configured to descramble the sequence to be detected according to M scrambling codes in a scrambling code set, so as to obtain a descrambled sequence to be detected; performing de-spreading on the descrambled sequence to be detected to obtain the de-spread sequence to be detected; and determining the autocorrelation power accumulation sum information of the scrambling code sequence set and the sequence to be detected according to the sequence to be detected after the despreading.
8. The apparatus of claim 7, wherein the sequence to be detected comprises a plurality of pcg chips;
the detection module comprises:
the set determining submodule is used for determining the maximum autocorrelation power accumulation sum information and a corresponding target scrambling code sequence set;
the interval determination submodule is used for determining a pcg chip position interval corresponding to the pcg sequence in the sequence to be detected according to the maximum autocorrelation power accumulation sum information;
and the initial position determining submodule is used for determining the position of the target initial pcg chip corresponding to the pcg sequence and the position of the target initial scrambling code corresponding to the target scrambling code sequence set according to the pcg chip position interval and the scrambling code position interval corresponding to the target scrambling code sequence set.
9. The apparatus of claim 8,
the starting position determining submodule is used for determining the position of the pcg sequence corresponding to the predicted starting pcg chip according to the pcg chip position interval; determining the position of the predicted initial scrambling code corresponding to the target scrambling code set according to the scrambling code position interval corresponding to the target scrambling code set; determining the position offset corresponding to the pcg sequence according to the position of the predicted starting pcg chip; determining the position of the target starting pcg chip corresponding to the pcg sequence according to the position and the offset of the predicted starting pcg chip; and determining the position of the target scrambling code sequence set corresponding to the target initial scrambling code according to the position and the position offset of the predicted initial scrambling code.
10. The apparatus of claim 9, wherein the X sets of scrambling code sequences are acquired over S periods, where X is greater than S, and S is a positive integer;
the initial position determining submodule is used for judging whether the target scrambling code sequence set is a first scrambling code sequence set of a PN sequence; if yes, calculating the sum of the position of the predicted initial scrambling code and the number of the corresponding scrambling codes in one period, and determining the position of the target initial scrambling code corresponding to the target scrambling code sequence set according to the sum and the position offset; if not, calculating the difference value between the position of the predicted initial scrambling code and the position offset to obtain the position of the target initial scrambling code corresponding to the target scrambling code sequence set.
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