JP2895399B2 - Synchronous tracking method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a DS (Direct Sequenc
e) Code division multiple access (hereinafter referred to as C), which multiplexes signals modulated by spread spectrum called in the same frequency band and performs communication.
The present invention relates to a synchronization tracking method at a receiving station in a mobile communication system based on communication (referred to as DMA).

[0002]

2. Description of the Related Art Conventionally, techniques in such a field include:
For example, there is one described in the following literature. Literature; IEICE Technical Report, SST92-21 (1992) IEICE, Tajika, "Digital matched filter technology in spread spectrum communication and its problems" 1-6 Conventionally, in CDMA communication, a transmitter and a receiver use the same pseudo noise code (hereinafter, referred to as PN code) to spread and despread data. Synchronization with the receiving station is important.
That is, the PN code of the received signal and the P
It is demodulated correctly only when the N code matches. For this reason, it is necessary for the receiving station of the CDMA communication to grasp an accurate synchronization position at the beginning of the communication. Furthermore, since the synchronization position may move due to a change in the propagation path due to the movement of the mobile station and a change in the propagation condition due to a change in the environment, it is necessary to investigate the synchronization position even during a call. The receiving station first multiplies a signal received from the antenna by a carrier signal and a signal shifted by π / 2 from the carrier signal to thereby obtain an in-phase component signal (hereinafter referred to as an I-phase signal) in a baseband (PN code band). ) And quadrature component signals (hereinafter, referred to as
(Referred to as a Q-phase signal). In the synchronous circuit, a correlation is obtained by multiplying each phase signal by a PN code sequence for each chip and adding them. The absolute value (power) of the correlation result of the received signal is obtained by squaring each phase correlation result and adding the results. In an ideal state, high power is obtained only when the PN code of the received signal matches the PN code generated by the receiving station. If even one chip deviates, the power becomes close to zero. As a method of finding the synchronization position, a method generally called a matched filter is used as described in the above-mentioned document. In this method, the means for calculating the correlation power is performed while shifting by one chip or a fraction of a chip, so that the position where the correlation power is the highest or the position where the correlation power exceeds the threshold is the position where the PN code matches. , And assume the synchronization position.

[0003] In synchronous follow-up, when a call signal is used,
A pilot signal may be used. When a speech signal is used, since the PN code in the speech signal is modulated by data, correlation over a plurality of bits becomes impossible, and a correlation gain cannot be obtained. When a pilot signal is used, the pilot signal is always transmitted while being superimposed on a speech signal. At the receiving station, correlation with a signal that is not data-modulated is obtained, so that correlation over a plurality of bits is possible, and a high correlation gain is obtained. In the above matched filter,
Store the received signal in the register of the correlation length (number of chips),
Using the PN code corresponding to the correlation length as a multiplication coefficient, multiplication of the received signal and the PN code is performed in parallel for each chip, and the result is added to obtain a correlation result. When the received signal of the next chip is input, the received signal register is shifted by one and then stored in the register.
The following correlation operation is performed. As a result, a correlation result at a position shifted by one chip is obtained. For this reason, it is necessary to finish all the correlation operations before the signal of the next chip is input. If it is desired to obtain a result with an accuracy of a fraction of a chip, the number of registers is further increased. The correlation operation is performed by multiplying the received signal by the PN code, adding the result of the multiplication, and adding its square. For example, assuming that the spread is 64 times and the correlation section is 1 bit, 64 multiplications are performed between 1 chip (ie, between 1/64 of 1 bit) until the next received signal is input. It must be performed in parallel, the 64 results must be added, and the square addition must be performed. Under high noise, 1
Since a high-precision result cannot be obtained in the correlation between bit sections, it is necessary to perform correlation between a plurality of bits. If the correlation interval is 10 bits, 640 multiplications and accumulations are performed between 1 bits. That is, 640 reception signal registers and PN code registers and 640 multipliers are required, and the circuit scale becomes very large. In addition, the multiplied result must be added 640 times, which requires a very high-speed operation.

[0004]

However, the conventional synchronous tracking method has the following problems, and it has been difficult to solve them. In the conventional synchronous tracking method, when performing synchronous tracking by multi-bit correlation using a pilot signal, the method using a matched filter requires a large circuit scale. For this reason, a method is used in which only one correlation (multiplication with a PN code and accumulation of the result) is performed once per chip. That is, one correlation power is obtained for each correlation length. However, in this method, if a long sequence is used for the PN code, it takes time to make a synchronization determination. For example, P
Assuming that the N sequence is 12800 and the correlation length is 10 bits, when the synchronization determination check is performed over the entire range, 12800 × 10
Takes a bit of time. The present invention solves the problem that the conventional technique has a problem that synchronization determination takes a long time, and by setting a PN code accurately in accordance with a correlation position, a synchronization tracking method that does not require much time in synchronization determination. Is provided.

[0005]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention relates to a method for following a synchronization in a receiving station in a mobile communication system based on a CDMA communication system. Baseband band conversion means for outputting a band reception signal; first counting means for counting the baseband reception signal for each chip; PN code generation means for generating a PN code at a desired position of a desired station; Multiplication / accumulation means for multiplying the baseband reception signal by the PN code and accumulating the multiplication result; second counting means for counting the number of accumulations in the multiplication / accumulation means and outputting a notification signal;
A square addition means for squaring the accumulation result of the I-phase signal and the accumulation result of the Q-phase signal in the multiplication / accumulation means, and adding the squared results to calculate a correlation power; Third counting means for counting the number of times the correlation check has been performed by the notification signal from the counting means, and synchronization determining means for calculating a synchronous position from the correlation power and outputting a relative value of the PN code at the synchronous position. Calculating the initial value of the PN code in the next synchronization determination investigation from the relative value of the PN code and the count value of the first counting means, and providing the initial value to the PN code generating means. Means (hereinafter simply referred to as a PN initial value calculating means), and the synchronization tracking is performed as follows. That is, the relative value of the PN code at the synchronization position obtained by the synchronization determination check by the synchronization determination unit, the count value of the first counting unit at the time of starting the correlation, and the counting by the third counting unit. Based on the number of correlation surveys, a PN code for starting a correlation is obtained by the PN initial value calculation means, and the PN code is generated by the PN code generation means. The multiplication / accumulation means performs a correlation operation at the correlation position, and when the count value of the second counting means reaches the correlation number, a correlation power is calculated by the square addition means. Further, the correlation power is calculated at the correlation position shifted by one chip, and the same operation is performed by the number of the correlation investigations.
The synchronization position is determined by the synchronization determination means.

[0006]

According to the present invention, for example, when a pilot signal is used in the synchronization tracking and a long sequence is used as the PN code, the synchronization tracking can be performed in a short time by determining the PN code accurately in accordance with the correlation position. The way is possible. Hereinafter, an example of the operation of the present invention will be described with reference to FIG. FIG. 3 is an explanatory diagram showing the operation of the present invention. In FIG. 3, the received signal count value is the count value of the first counting means, and the correlation PN value is P
This is the N code number. In FIG. 3, for example, the PN sequence is 12800 and the correlation length is 640 chips. The range in which the synchronization determination check is performed is ± 20 chips from the previous synchronization position. That is, the number (correlation check number) for obtaining the correlation power by the correlation operation of the multiplication / accumulation means and the square addition means and performing the synchronization judgment by the synchronization judgment means is 41. The synchronization position fluctuates due to changes in the propagation path due to the movement of the mobile station.
Does not fluctuate rapidly. Therefore, the synchronization position can be obtained by investigating the vicinity of the synchronization position obtained last time. The first counting means counts up, for example, every time a received signal is input for each chip, and is initialized (cleared) at 12800. The difference between the received signal count value of the first counting means and the PN value correlated with the received signal is
It is defined as a PN relative value as in the following equation. PN relative value = received signal count value−correlation PN value Here, the PN relative value is obtained as follows. First, the correlation power calculated by the square addition means is sent to the synchronization determination means. Then, the synchronization determining means stores the correlation power value and the PN relative value at that time. The PN relative value is the first PN relative value in the correlation study (for example, FIG.
180), 180, 181, and 182 are incremented by one. When the count value of the third counting means becomes 41, the synchronization judging means judges the synchronization (usually judgment of the position having the highest correlation power) and the PN relative value at that time (for example, 200). Is sent to the PN initial value calculation means. If the number of correlation studies is 41, the first PN relative value in the next correlation study will be 180. That is, the PN relative value is calculated by the PN initial value calculating means and is provided to the synchronization determining means. Then, the synchronization determining means counts up the PN relative value every time the correlation power is transmitted.

While the multiplication / accumulation means is performing the correlation operation, the received signal count value and the correlation PN value are both counted up, so that the relationship between the PN relative values is always constant. Assume that synchronization is obtained at the correlation position of the PN relative value 200 in the pre-synchronization determination. In this case, even if the received signal count value advances, the relative value with the correlation PN value is always 2
If 00, synchronization is established. The next synchronization determination is performed by the synchronization determination unit using the PN relative value 200 obtained last time as the center value of the synchronization determination investigation. At this time, the range of the investigation is a PN relative value of 180 to 220, with the relationship between the signal address and the correlation PN value shifted by one chip at a time and a maximum of ± 20 chips. It is assumed that the pre-synchronization determination check is completed with the received signal count value 1779 of the PN relative value 220 and the correlation PN value 1559. Assuming that it takes 10 chips for the synchronization determination by the synchronization determination unit and the initial PN value calculation by the PN initial value calculation unit,
Since the received signal is always input, the next correlation is based on the count value 1790. Assuming that the first PN relative value in the synchronization determination check is 180, the start of the correlated PN value (initial PN value) is 1610. That is, 1610
, A correlation result with a PN relative value of 180 is obtained. After calculating the correlation at 640 chips, the PN value is delayed by one to obtain the correlation, whereby a correlation result with the PN relative value 181 is obtained. This check is performed up to the PN relative value 220, and the position with the highest correlation power obtained by the square addition means is set as the synchronization position, and the PN relative value is set as the center value of the next synchronization judgment check. As described above, by accurately assigning the PN code generated by the PN code generating means, the synchronization can be determined without performing the synchronization check (for example, 12800 times) of the entire range. Therefore, the above problem can be solved.

[0008]

FIG. 1 is a functional block diagram of a synchronization tracking circuit used in a synchronization tracking method according to an embodiment of the present invention. This synchronization tracking circuit has a carrier generator 2 for generating a carrier signal for converting a received signal 1 received from an antenna into a baseband, and the carrier generator 2 includes a π / 2 phase rotator 3 and A multiplier 4 is connected, and a multiplier 5 is connected to the π / 2 phase rotator 3. π / 2 phase rotator 3
Represents the carrier signal generated from the carrier generator 2 as π / 2
It is a circuit to shift. One multiplier 4 is a circuit that multiplies the received signal 1 by the carrier signal and outputs an I-phase signal Ri in a baseband (PN code band). The other multiplier 5 multiplies the received signal 1 by a carrier signal shifted by π / 2 to obtain a Q-phase signal R in a baseband band (PN code band).
It is a circuit that outputs q. These carrier generators 2, π
The / 2 phase rotator 3 and the multipliers 4 and 5 constitute a baseband conversion means for converting the received signal 1 into a baseband and outputting a baseband received signal. The multiplier 5 is connected to first counting means (for example, a signal counter) 6 that counts up each time the received signal 1 is input for each chip. The maximum value of the signal counter 6 is the same as the PN sequence, and the count value is PN.
When the line length is reached, it is cleared and counted up again. In addition, this synchronous tracking circuit includes P
A PN code generator 7 as N code generating means is provided, and multipliers 8 and 9 and a second counting means (for example, a correlation counter) 10 are connected to the PN code generator 7. The PN code generator 7 is a circuit that generates a PN code. One multiplier 8 is a circuit for multiplying the I-phase signal Ri and the PN code, and the other multiplier 9 is a circuit for multiplying the Q-phase signal Rq and P
This is a circuit for multiplying by an N code. Correlation counter 10
Is a circuit that counts up each time a PN code is generated and counts the number of correlations (the number of correlation chips). The multipliers 8 and 9 are connected to accumulators (accumulators) 11 and 12 for accumulating the multiplication results. These multipliers 8 and 9 and accumulators 11 and 12
Constitute a multiplication / accumulation means.

A squaring device 13 for squaring the accumulation result of the I-phase signal Ri is connected to one storage device 11. The other accumulator 12 squares the accumulation result of the Q-phase signal Rq to 2
The rider 14 is connected. To the squarers 13 and 14, an adder 15 for adding the squared results and outputting a correlation power is connected. These squarers 13 and 14 and the adder 15 constitute a square addition means. The adder 15 is connected to a synchronization determiner 16 as a synchronization determiner, and the correlation counter 10 is connected to a third counting means (for example, a search counter) 17. It is connected to the. Further, the synchronization determiner 16 has a P
It is connected to the N initial value calculation unit 18. Synchronization determiner 16
Is a circuit that calculates a synchronization position from the correlation power output from the adder 15 and sends out the relative value of the PN code at the synchronization position to the PN initial value calculation unit 18. The search counter 17 is a circuit that counts the number of correlation checks performed based on the notification signal from the correlation counter 10. P
The N initial value calculation unit 18 calculates an initial value of the PN code in the next synchronization determination investigation from the relative value of the PN code and the count value of the signal counter 6, and gives the initial value to the PN code generator 7. It is.

FIG. 2 is a flowchart showing the procedure of the synchronization tracking process in the synchronization tracking circuit of FIG. In the flowchart of FIG. 2, the operation after the conversion to the baseband band is shown. With reference to FIG. 2, a description will be given of a synchronization tracking method of the present embodiment using the synchronization tracking circuit of FIG. First, in step ST1 of FIG. 2, the PN initial value calculation unit 18 starts the correlation by the following method.
Calculate N initial value. That is, the PN relative value at the first correlation as shown in the following equation is calculated from the PN relative value of the previous synchronization position obtained by the synchronization determiner 16 and the number of correlation checks counted by the search counter 17. . PN relative value = received signal count value−correlation PN value The received signal count value of the signal counter 6 and the correlation PN value are:
Since they are counted up at the same time, the PN relative value does not change in one correlation. Assuming that the relative PN value at the synchronous position is S _- PNc and the number of correlation investigations is NO _- T, the relative PN value S _- PN1 at the first correlation is as follows. _{S - PN1 = S - PNc -} NO - T / 2 That is, PN relative value _S - PNC correlation number investigation about the ± NO _-
Correlation is performed at a correlation position having a PN relative value relationship in the range of T / 2. PN value PNst to start correlation
If the signal count value of the signal counter 6 at the time of starting the correlation is CSst, the following equation is obtained. PNst = CSst-S _- PN1 After calculating the initial PN value, in step ST2, the search counter 17 is set to the correlation investigation number NO _- T. Before starting the correlation calculation, the accumulators 11 and 12 and the correlation counter 10 are reset in step ST3. In step ST4, the PN code generator 7 generates a PN code starting from the PN initial value PNst, and supplies it to the multipliers 8, 9 and the correlation counter 10. In step ST5, a correlation operation is started, and the received signal 1 received from the antenna is converted into a baseband band (PN code band) by the multipliers 4 and 5.
Are converted to I-phase signal Ri and Q-phase signal Rq. An I-phase signal Ri and a Q-phase signal Rq;
The PN code generated from the PN code generator 7 is multiplied by the multipliers 8 and 9, and the multiplication result is stored in the accumulators 11 and 1.
2 is stored. The correlation counter 10 counts up each time a PN code is generated, and counts the number of correlations (the number of correlation chips).

In step ST6, the correlation counter 1
When the count value of 0 reaches the correlation number, the correlation counter 1
0 notifies each of the accumulators 11 and 12,
Is sent to the squarers 13 and 14. Accumulator 11
Is accumulated by the squarer 13, and the accumulation result of the Q-phase signal Rq from the accumulator 12 is 2
The result is squared by the multiplier 14, and the result of the square is added by the adder 15. Correlation power is output from the adder 15 and sent to the synchronization determiner 16. At the same time, 1 is subtracted from the count value of the search counter 17 in step ST7. Then, it is determined whether or not the count value of the search counter 17 is 0. If the count value is not 0, the process returns to step ST3, where the accumulators 11 and 12 and the correlation counter 10 are reset.
Move to the next correlation position. When shifting to the next correlation position, the PN code generated by the PN code generator 7 is delayed by one. In step ST7, the search counter 1
When the count value of 7 has become 0 and all the correlation investigations have been completed, in step ST8, synchronization determination is performed by the synchronization determiner 16. In this synchronization determination method, for example, a position having the highest correlation power is set as a synchronization position, and the result is transmitted to a demodulator (not shown). Then, the PN relative value at the synchronization position is sent to the PN initial value calculation unit 18 for the next synchronization determination investigation.

As described above, in the present embodiment, the PN code generated from the PN code generator 7 can be accurately set in accordance with the correlation position, so that the determination time in the synchronization tracking circuit can be reduced. . Note that the present invention is not limited to the above embodiment, and various modifications are possible. For example, there are the following modifications. (A) As a method of synchronization determination by the synchronization determiner 16,
In addition to the method as in the above-described embodiment, a method may be used in which a threshold value of the correlation power is prepared, and when a correlation power equal to or higher than the threshold value is obtained, synchronization is immediately considered. Alternatively, a method of using the center value in the synchronization determination investigation as a moving average result of a plurality of past synchronization positions may be used. (B) A squarer for short-term correlation (trial correlation) is provided on the output side of each of the accumulators 11 and 12 in FIG. 1, and an adder for trial correlation is provided on the output side of the squarer. A trial correlation determiner is provided on the output side of the adder. Then, in the correlation calculation, the accumulators 11 and 12, a squarer for trial correlation, and an adder for trial correlation perform correlation (trial correlation) in a shorter section than normal correlation, and perform the addition for trial correlation. A preliminary result of the correlation power (trial correlation power) is obtained by a comparator, and the obtained result is compared with a threshold value by a trial correlation determiner. If the threshold value is equal to or higher than the threshold value, a normal correlation as in the above embodiment is performed. .
As described above, if the normal correlation is performed after the trial correlation is performed, the synchronization determination time can be reduced. (C) A plurality of correlator units each including the multipliers 8 and 9, the correlation counter 10, the accumulators 11 and 12, the squarers 13 and 14, and the adder 15 of FIG. 1 are provided in parallel. If the PN codes generated from the PN code generating unit 7 are shifted one chip at a time and applied to a plurality of correlators, and the correlators are operated in parallel, the synchronization determination time can be reduced. . (D) In FIG. 1, the synchronization follow-up circuits are constituted by individual circuits, but they may be executed by program control or the like using a processor.

[0013]

As described above in detail, according to the present invention, the PN at the synchronization position obtained by the pre-synchronization determination investigation is determined.
From the relative value, the count value of the first counting means at the start of the correlation, and the number of correlation checks, a PN code for starting the correlation is obtained, and the correlation operation is performed at the correlation position, and the second calculation is performed.
The correlation power is calculated when the count value of the counting means reaches the correlation number, the correlation power is further calculated at the correlation position shifted by one chip, and the same operation is performed by the number of correlation investigations to determine the synchronization position. Therefore, the PN code can be set accurately in accordance with the correlation position, and the synchronization determination time can be reduced.

[Brief description of the drawings]

FIG. 1 is a functional block diagram of a synchronization tracking circuit used in a synchronization tracking method according to an embodiment of the present invention.

FIG. 2 is a flowchart illustrating a synchronization tracking processing procedure in the synchronization tracking circuit of FIG. 1;

FIG. 3 is an explanatory diagram of a synchronization tracking method according to the present invention.

[Explanation of symbols]

Reference Signs List 1 received signal 2 carrier generator 3 π / 2 phase rotator 4, 5, 8, 9 multiplier 6 signal counter (first counting means) 7 PN code generator 10 correlation counter (second counting means) 11, DESCRIPTION OF SYMBOLS 12 Accumulator 13,14 Squarer 15 Adder 16 Synchronization determiner 17 Search counter (third counting means) 18 PN initial value calculation part

Continuation of front page (56) References JP-A-1-98340 (JP, A) JP-A-6-77932 (JP, A) JP-A-6-132930 (JP, A) JP-A-2-70137 (JP) , A) JP-A-5-344093 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H04J 13/04 H04L 7/00

Claims (1)

(57) [Claims] 1. A mobile communication system based on a code division multiple access communication system for performing communication by multiplexing signals modulated by spread spectrum within the same frequency band, and converting a received signal into a baseband band to receive a baseband signal. Baseband conversion means for outputting a signal; first counting means for counting the baseband reception signal for each chip; pseudocode generation means for generating a pseudocode at a desired position of a desired station; Multiplying / accumulating means for multiplying a received signal by the pseudo code and accumulating the multiplication result; second counting means for counting the number of accumulations in the multiplying / accumulating means and outputting a notification signal;・ Square the cumulative result of the in-phase component and the cumulative result of the quadrature component in the accumulating means, and add those square results. A square addition means for calculating the correlation power by using a third counting means for counting the number of times the correlation check is performed by the notification signal from the second counting means; A synchronization determining unit that outputs a relative value of the pseudo code at a synchronous position; and calculating an initial value of the pseudo code in a next synchronization determination investigation from the relative value of the pseudo code and the count value of the first counting unit, Using a pseudo code initial value calculating means for providing the initial value to the pseudo code generating means, a relative value of the pseudo code at the synchronous position obtained by the synchronization determination investigation by the synchronization determining means, The pseudo code initial value calculating means calculates a correlation based on the count value of the first counting means and the number of correlation surveys counted by the third counting means. And a pseudo code is generated from the pseudo code generation means, and a correlation operation is performed by the multiplication / accumulation means at the correlation position, and the count value of the second counting means reaches the correlation number. At this point, the correlation power is calculated by the square addition means, the correlation power is further calculated at the correlation position shifted by one chip, the same operation is performed by the number of correlation checks, and the synchronization position is determined by the synchronization determination means. A synchronization follow-up method characterized in that: