CN112786453A - Thin film transistor and manufacturing method thereof, and display device and manufacturing method thereof - Google Patents
Thin film transistor and manufacturing method thereof, and display device and manufacturing method thereof Download PDFInfo
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- CN112786453A CN112786453A CN202110060500.4A CN202110060500A CN112786453A CN 112786453 A CN112786453 A CN 112786453A CN 202110060500 A CN202110060500 A CN 202110060500A CN 112786453 A CN112786453 A CN 112786453A
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- 239000010409 thin film Substances 0.000 title claims abstract description 85
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 51
- 239000004020 conductor Substances 0.000 claims abstract description 57
- 238000000034 method Methods 0.000 claims abstract description 43
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 238000000059 patterning Methods 0.000 claims abstract description 12
- 239000010410 layer Substances 0.000 claims description 169
- 239000010408 film Substances 0.000 claims description 24
- 238000000151 deposition Methods 0.000 claims description 6
- 239000011241 protective layer Substances 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 17
- 238000010586 diagram Methods 0.000 description 7
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
Abstract
The invention provides a thin film transistor and a manufacturing method thereof, and a display device and a manufacturing method thereof, wherein the method comprises the following steps: forming a gate layer on a substrate; forming a gate insulating layer on one side of the gate layer away from the substrate; forming an active layer on one side of the gate insulating layer, which is far away from the gate electrode layer; conducting a conductor process on the part of the active layer, which is positioned on the source contact region and the drain contact region, so as to form a first conductor part and a second conductor part; and patterning a side of the active layer away from the gate layer to form a source electrode and a drain electrode, wherein the source electrode is in electrical contact with the first conductor portion, and the drain electrode is in electrical contact with the second conductor portion. The thin film transistor and the manufacturing method thereof, and the display device and the manufacturing method thereof provided by the invention can simplify the manufacturing process of the thin film transistor, and ensure that the manufactured thin film transistor has higher on-state current and good display effect.
Description
Technical Field
The invention relates to the technical field of display, in particular to a thin film transistor and a manufacturing method thereof, and a display device and a manufacturing method thereof.
Background
The thin film transistor is generally classified into a bottom gate type thin film transistor and a top gate type thin film transistor according to the structure. The bottom gate type thin film transistor has the advantages of simple preparation process, high product yield and the like, but the active layer channel length is large, so that the on-state current is low, and the problem of poor display effect is caused. The top gate type thin film transistor has the characteristic of a short channel, so that compared with the bottom gate type thin film transistor, the on-state current of the top gate type thin film transistor is higher, and the display effect can be improved. However, the yield is low due to the complicated process of the top gate thin film transistor, which causes the problem of poor display uniformity of the device using the top gate thin film transistor.
Therefore, how to make the thin film transistor have the advantages of simple manufacturing process and good display effect becomes a problem to be solved urgently in the technical field of display.
Disclosure of Invention
Embodiments of the present invention are directed to at least one of the technical problems in the prior art, and provide a thin film transistor, a manufacturing method thereof, a display device, and a manufacturing method thereof, which can simplify a manufacturing process of the thin film transistor and improve a display effect of the manufactured thin film transistor.
To achieve the object of the embodiments of the present invention, a method for manufacturing a thin film transistor is provided, which includes:
forming a gate layer on a substrate;
forming a gate insulating layer on one side of the gate layer away from the substrate base plate;
forming an active layer on one side of the gate insulating layer, which is far away from the gate electrode layer;
conducting a conductor process on the parts, located on the source contact region and the drain contact region, of the active layer to form a first conductor part and a second conductor part; and forming a source electrode and a drain electrode on the side of the active layer far away from the gate electrode layer, wherein the source electrode is electrically contacted with the first conductor part, and the drain electrode is electrically contacted with the second conductor part.
Optionally, the step of performing a conductor process on the portion of the active layer located in the source contact region and the drain contact region includes:
forming a film layer of a channel protection layer on the surface of one side of the active layer, which is far away from the substrate;
etching the film layer of the channel protection layer to form the channel protection layer covering the surface of the active layer, which is positioned on the channel region part;
and conducting a conductor process on the part of the active layer which is not covered by the channel protection layer.
Optionally, the step of patterning the side of the active layer away from the gate layer to form the source electrode and the drain electrode includes:
depositing the film layers of the source electrode and the drain electrode on the surface of one side of the active layer, which is far away from the substrate, so that the film layers of the source electrode and the drain electrode cover the surfaces of the source electrode contact region and the drain electrode contact region;
and carrying out a patterning process on the film layers of the source electrode and the drain electrode so as to form the source electrode on the source electrode contact region and form the drain electrode on the drain electrode contact region.
Optionally, the step of patterning a side of the active layer away from the gate layer to form a source electrode and a drain electrode includes:
forming a source and drain electrode insulating layer on the surface of one side of the active layer, which is far away from the substrate;
through holes are respectively formed in the source drain electrode insulating layer at positions corresponding to the source electrode contact region and the drain electrode contact region;
depositing a film layer of the source electrode and the drain electrode on the surface of one side, far away from the substrate, of the source-drain electrode insulating layer;
and carrying out a patterning process on the film layers of the source electrode and the drain electrode to form the source electrode and the drain electrode, wherein the source electrode and the drain electrode are respectively in electric contact with the parts of the active layer, which are positioned on the source electrode contact region and the drain electrode contact region, through the via holes.
As another technical solution, the present invention further provides a method for manufacturing a display device, which includes the steps of the method for manufacturing a thin film transistor described in the above embodiment.
As another technical solution, the present invention also provides a thin film transistor, including:
a substrate, a gate layer, a gate insulating layer, a gate electrode, a gate insulating layer, a gate electrode, a gate insulating layer, a gate electrode, a gate insulating,
The semiconductor device includes an active layer, a source electrode and a drain electrode, wherein the active layer includes a first conductor portion located at a source electrode contact region and a second conductor portion located at a drain electrode contact region;
the source and drain are in electrical contact with the first and second conductor portions, respectively.
Optionally, the source and the drain partially cover the first conductor portion and the second conductor portion, respectively.
Optionally, the thin film transistor further includes a source/drain insulating layer disposed on a surface of the active layer on a side away from the substrate;
two through holes are formed in the source drain electrode insulating layer and at positions corresponding to the source electrode contact region and the drain electrode contact region respectively;
the source and the drain are in electrical contact with the first conductor portion and the second conductor portion, respectively, through the two vias.
Optionally, the thin film transistor further includes a protective layer disposed on a side of the source electrode and the drain electrode away from the substrate.
As another technical solution, an embodiment of the present invention further provides a display device, which is characterized by including the thin film transistor described in the above embodiment.
The embodiment of the invention has the following beneficial effects:
according to the manufacturing method of the thin film transistor, the parts, located in the source contact region and the drain contact region, in the active layer are made into conductors, so that the channel length of the thin film transistor can be shortened, the on-state current of the thin film transistor is improved, and the display effect of the thin film transistor can be improved. Meanwhile, compared with the existing manufacturing method of the top gate type thin film transistor, the manufacturing method of the thin film transistor provided by the embodiment of the invention is simpler, not only can the product yield be improved, but also the display uniformity of the display device can be improved.
According to the manufacturing method of the display device provided by the embodiment of the invention, by adopting the manufacturing method of the thin film transistor provided by the embodiment, the manufacturing steps of the display device can be simplified, and meanwhile, the display device with a good display effect can be manufactured.
According to the thin film transistor provided by the embodiment of the invention, the first conductor part and the second conductor part are arranged in the source contact region and the drain contact region of the active layer and are respectively contacted with the source electrode and the drain electrode, so that the channel length of the thin film transistor can be shortened, the on-state current of the thin film transistor can be improved, and the display effect of the thin film transistor can be improved.
According to the display device provided by the embodiment of the invention, the thin film transistor provided by the embodiment is adopted, so that a better display effect can be obtained.
Drawings
FIG. 1 is a schematic diagram of a conventional bottom gate thin film transistor;
FIG. 2 is a schematic diagram of a conventional top-gate TFT structure;
fig. 3 is a flowchart of a method for manufacturing a thin film transistor according to embodiment 1;
fig. 4 is a schematic diagram of the structure formed after step S03 is completed according to embodiment 1;
fig. 5 is a schematic diagram of the structure formed after step S04 is completed according to embodiment 1;
fig. 6 is a schematic structural diagram of a thin film transistor formed after the method for manufacturing a thin film transistor provided in embodiment 1 is completed;
fig. 7 is a flowchart of a conductor formation process for an active layer provided in example 1;
FIG. 8 is a schematic diagram of the structure formed after completion of step S041 provided in example 1;
fig. 9 is a schematic view of a structure formed after step S042 is completed, as provided in embodiment 1;
fig. 10 is a flowchart of a method for forming a source and a drain provided in embodiment 1;
fig. 11 is a flowchart of another method for forming a source and a drain provided in embodiment 1;
fig. 12 is a schematic structural diagram of a thin film transistor formed after step S054 provided in embodiment 1 is completed.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the thin film transistor and the manufacturing method thereof, and the display device and the manufacturing method thereof provided by the present invention are described in detail below with reference to the accompanying drawings.
The conventional thin film transistors are generally classified into bottom gate type thin film transistors and top gate type thin film transistors. Specifically, as shown in fig. 1, the bottom gate type thin film transistor generally includes an active layer 10 disposed on a substrate 50, a gate layer 20 disposed below the active layer 10, and a source electrode 30 and a drain electrode 40 covering both end regions of the active layer 10, a portion of the active layer 10 not covered by the source electrode 30 and the drain electrode 40 is a channel region, a portion of the active layer located in the channel region is a channel for disconnectably electrically connecting the source electrode 30 and the drain electrode 40, and the gate layer 20 can control current passing or blocking in the channel, thereby controlling connection and disconnection of the source electrode 30 and the drain electrode 40. Since the longer the channel region length of the active layer 10, the greater the channel length for connecting the source and drain electrodes 30 and 40, the lower the on-state current of the thin film transistor, and the too low on-state current may affect the display effect of the thin film transistor.
As shown in fig. 2, the top gate thin film transistor has a short channel region, and accordingly, has a large on-state current and a good display effect. However, since the source 30 and the drain 40 of the top gate thin film transistor are located on the same side of the active layer 20 as the gate layer 10, the light-shielding layer 60 needs to be disposed below the active layer 10, and the manufacturing method of the light-shielding layer 60 is complicated, which further complicates the overall manufacturing method of the top gate thin film transistor.
Example 1
To solve the above problem, the present embodiment provides a method for manufacturing a thin film transistor, as shown in fig. 3, including the following steps:
step S01: forming a gate layer 2 on a substrate base plate 1;
step S02: forming a gate insulating layer 3 on the side of the gate layer 2 away from the substrate 1;
step S03: forming an active layer 4 on the side of the gate insulating layer 3 away from the gate layer 2;
the structure of the gate layer 2, the gate insulating layer 3 and the active layer 4 is shown in fig. 4.
Step S04: as shown in fig. 5, a conductor process is performed on portions of the active layer 4 located at the source contact region a and the drain contact region B to form a first conductor portion 41 and a second conductor portion 42;
step S05: as shown in fig. 6, a source electrode 51 and a drain electrode 52 are formed on the side of the active layer 4 away from the gate layer 2, wherein the source electrode 51 is in electrical contact with the first conductor portion 41, and the drain electrode 52 is in electrical contact with the second conductor portion 42.
The active layer 4 is converted from a semiconductor to a conductor at the source contact region a and the drain contact region B, which is equivalent to shortening the length of the channel region C between the source electrode 51 and the drain electrode 52 to shorten the length of the channel for connecting the source electrode 51 and the drain electrode 52, so that the on-state current of the thin film transistor can be increased, and the display effect of the thin film transistor can be improved. Moreover, since the length of the channel region C is shorter, and accordingly, the length of the gate layer 2 is also shorter, so that the overlapping area of the gate layer 2 and the source and drain electrodes 51 and 52 in the direction parallel to the surface of the substrate 1 can be reduced, and the parasitic capacitance between the gate layer 2 and the source and drain electrodes 51 and 52 can be reduced, so that the thin film transistor can be applied to a display device with a high refresh frequency. In addition, the method for manufacturing the thin film transistor provided by the embodiment has simple steps, so that the problem of low yield caused by a complicated manufacturing process can be avoided, and the problem of poor display uniformity of a display device using the thin film transistor can be further avoided.
In some embodiments, as shown in fig. 7, the step S04 of conducting the portion of the active layer 4 located in the source contact region a and the drain contact region B specifically includes the following steps:
step S041: as shown in fig. 8, a film layer 61 (for forming the channel protective layer 6) is formed on the surface of the active layer 4 on the side away from the base substrate 1;
step S042: as shown in fig. 9, the film layer 61 is etched to form a channel protection layer 6 having a designated pattern, and the channel protection layer 6 covers the surface of the active layer 4 at a portion of the channel region C.
The method for etching the film 61 in step S042 may be selected according to actual production requirements, for example, the film 61 is etched by using a photolithography process. The photolithography process generally uses the photoresist layer as a mask to etch the film layer to be etched, and when the negative photoresist layer is used as a mask to etch, the negative photoresist layer can cover the channel protection layer 6 and protect the active layer 4 together with the channel protection layer.
Step S043: a conductor process is performed on the portion of the active layer 4 not covered by the channel protective layer 6 to convert the portion of the active layer 4 located at the source contact region a and the drain contact region B from a semiconductor to a conductor, thereby forming the first conductor portion 41 and the second conductor portion 42.
In practical applications, the aforementioned conductive process may be selected according to the material of the active layer 4 and the actual production requirements, for example, a self-aligned conductive process is adopted.
In some embodiments, as shown in fig. 10, the step S05 of forming the source electrode 51 and the drain electrode 52 on the side of the active layer 4 away from the gate layer 2 specifically includes the following steps:
step S051: depositing a film layer of a source electrode 51 and a drain electrode 52 on the surface of one side of the active layer 4 far away from the substrate base plate 1, wherein the film layer covers the surfaces of the source electrode contact region A and the drain electrode contact region B;
step S052: the film layers of the source and drain electrodes 51 and 52 are subjected to a patterning process to form the source electrode 51 on the source contact region a and the drain electrode 52 on the drain contact region B, as shown in fig. 6.
In some embodiments, another method for forming the source electrode 51 and the drain electrode 52 may be adopted, as shown in fig. 11, the foregoing step S05 may further include the following steps:
step S051: as shown in fig. 12, a source-drain insulating layer 8 is formed on the surface of the active layer 4 on the side away from the substrate base plate 1;
step S052: through holes are respectively formed in the source drain electrode insulating layer 8 at positions corresponding to the source electrode contact area A and the drain electrode contact area B; specifically, the method for forming the via holes may be selected according to actual production requirements, for example, an exposure patterning process is adopted.
Step S053: depositing a film layer of a source electrode 51 and a drain electrode 52 on the surface of one side of the source-drain electrode insulating layer 8, which is far away from the substrate base plate 1;
step S054: the film layer of the source and drain electrodes 51 and 52 is subjected to a patterning process, as shown in fig. 12, to form the source and drain electrodes 51 and 52, wherein the source and drain electrodes 51 and 52 are electrically contacted with portions of the active layer 4 located at the source and drain contact regions a and B, respectively, through vias.
In some embodiments, after step S05, the method for manufacturing a thin film transistor further includes forming a protective layer 7 on the side of the source electrode 51 and the drain electrode 52 away from the substrate base plate 1 to protect other structures. The structure of the protective layer 7 is shown in fig. 6.
As another technical solution, this embodiment further provides a manufacturing method of a display device, and specifically, the manufacturing method includes the steps of the manufacturing method of the thin film transistor in the foregoing embodiment.
In the method for manufacturing a thin film transistor according to this embodiment, the source contact region and the drain contact region in the active layer of the bottom gate thin film transistor are made conductive, so that the channel length of the thin film transistor can be shortened, the on-state current of the thin film transistor can be increased, and the display effect of the thin film transistor can be improved. Meanwhile, the manufacturing method of the thin film transistor provided by the invention has simple steps, and can avoid the problem of low yield caused by complex manufacturing process, thereby avoiding the problem of poor display uniformity of a display device using the thin film transistor.
By using the method for manufacturing a thin film transistor provided in the foregoing embodiment, the manufacturing steps of the display device can be simplified, and a display device with a good display effect can be manufactured.
Example 2
The present embodiment provides a thin film transistor, as shown in fig. 6, which includes a gate layer 2, a gate insulating layer 3, an active layer 4, and source and drain electrodes 51 and 52 on a substrate 1. Wherein, the gate insulating layer 3 is positioned on one side of the gate layer 2 away from the substrate base plate 1; the active layer 4 is located on a side of the gate insulation side layer far away from the gate layer 2, and specifically, the active layer 4 is divided into a source contact region a, a drain contact region B and a channel region C located between the source contact region a and the drain contact region B, wherein the source contact region a includes a first conductor portion 41, and the drain contact region B includes a second conductor portion 42; the source electrode 51 and the drain electrode 52 are respectively in electrical contact with the first conductor portion 41 and the second conductor portion 42, so that the channel length between the source electrode 51 and the drain electrode 52 can be shortened, the on-state current of the thin film transistor can be increased, and the display effect of the thin film transistor can be improved.
In some embodiments, the surface of the active layer 4 located in the channel region C is also covered with a channel protection layer 6 for protecting the active layer 4 located in the channel region C from being conducted.
In some embodiments, the source electrode 51 and the drain electrode 52 partially overlap the first conductor portion 41 and the second conductor portion 42, respectively, to electrically contact the first conductor portion 41 and the second conductor portion 42, respectively.
In some embodiments, as shown in fig. 12, the thin film transistor further includes a source/drain insulating layer 8, and the source/drain insulating layer 8 is disposed on a surface of the active layer 4 on a side away from the substrate base plate 1. Two through holes are formed in the source and drain insulating layer 8 and at positions corresponding to the source contact region and the drain contact region, respectively. As another arrangement of the source electrode 51 and the drain electrode 52, the source electrode 51 and the drain electrode 52 are electrically contacted with the first conductor part 41 and the second conductor part 42 through the aforementioned via holes, respectively.
In some embodiments, the thin film transistor further includes a protection layer 7, and the protection layer 7 is disposed on a side of the source electrode 51 and the drain electrode 52 away from the substrate 1, and is used for protecting and encapsulating other structures of the thin film transistor to form a complete thin film transistor structure.
As another technical solution, the present embodiment further provides a display device, which includes the thin film transistor.
According to the thin film transistor provided by the embodiment of the invention, the first conductor part and the second conductor part are arranged in the source contact region and the drain contact region of the active layer and are respectively contacted with the source electrode and the drain electrode, so that the channel length of the thin film transistor can be shortened, the on-state current of the thin film transistor can be improved, and the display effect of the thin film transistor can be improved.
According to the display device provided by the embodiment of the invention, the thin film transistor provided by the embodiment is adopted, so that a better display effect can be obtained.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.
Claims (10)
1. A method for manufacturing a thin film transistor includes:
forming a gate layer on a substrate;
forming a gate insulating layer on one side of the gate layer away from the substrate base plate;
forming an active layer on one side of the gate insulating layer, which is far away from the gate electrode layer;
conducting a conductor process on the parts, located on the source contact region and the drain contact region, of the active layer to form a first conductor part and a second conductor part; and forming a source electrode and a drain electrode on the side of the active layer far away from the gate electrode layer, wherein the source electrode is electrically contacted with the first conductor part, and the drain electrode is electrically contacted with the second conductor part.
2. The method of manufacturing a thin film transistor according to claim 1, wherein the step of conducting a conductor process to a portion of the active layer located in the source contact region and the drain contact region includes:
forming a film layer of a channel protection layer on the surface of one side of the active layer, which is far away from the substrate;
etching the film layer of the channel protection layer to form the channel protection layer covering the surface of the active layer, which is positioned on the channel region part;
and conducting a conductor process on the part of the active layer which is not covered by the channel protection layer.
3. The method for manufacturing the thin film transistor according to claim 1 or 2, wherein the step of patterning the active layer on a side thereof away from the gate layer to form the source electrode and the drain electrode comprises:
depositing the film layers of the source electrode and the drain electrode on the surface of one side of the active layer, which is far away from the substrate, so that the film layers of the source electrode and the drain electrode cover the surfaces of the source electrode contact region and the drain electrode contact region;
and carrying out a patterning process on the film layers of the source electrode and the drain electrode so as to form the source electrode on the source electrode contact region and form the drain electrode on the drain electrode contact region.
4. The method for manufacturing the thin film transistor according to claim 1 or 2, wherein the step of patterning a source electrode and a drain electrode on a side of the active layer away from the gate layer comprises:
forming a source and drain electrode insulating layer on the surface of one side of the active layer, which is far away from the substrate;
through holes are respectively formed in the source drain electrode insulating layer at positions corresponding to the source electrode contact region and the drain electrode contact region;
depositing a film layer of the source electrode and the drain electrode on the surface of one side, far away from the substrate, of the source-drain electrode insulating layer;
and carrying out a patterning process on the film layers of the source electrode and the drain electrode to form the source electrode and the drain electrode, wherein the source electrode and the drain electrode are respectively in electric contact with the parts of the active layer, which are positioned on the source electrode contact region and the drain electrode contact region, through the via holes.
5. A method for manufacturing a display device, comprising the method for manufacturing a thin film transistor according to claims 1 to 4.
6. The thin film transistor is characterized by comprising a substrate base plate, a grid layer, a grid insulating layer, an active layer, a source electrode and a drain electrode, wherein the grid layer, the grid insulating layer, the active layer and the source electrode and the drain electrode are arranged on the substrate base plate in sequence along a direction far away from the substrate base plate; the source and drain are in electrical contact with the first and second conductor portions, respectively.
7. The thin film transistor according to claim 6, wherein the source electrode and the drain electrode partially cover the first conductor portion and the second conductor portion, respectively.
8. The thin film transistor according to claim 6, further comprising a source-drain insulating layer provided on a surface of the active layer on a side away from the substrate base plate;
two through holes are formed in the source drain electrode insulating layer and at positions corresponding to the source electrode contact region and the drain electrode contact region respectively;
the source and the drain are in electrical contact with the first conductor portion and the second conductor portion, respectively, through the two vias.
9. The thin film transistor according to any one of claims 6 to 8, further comprising a protective layer provided on a side of the source electrode and the drain electrode away from the substrate base plate.
10. A display device comprising the thin film transistor according to any one of claims 6 to 9.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103456793A (en) * | 2012-06-04 | 2013-12-18 | 三星显示有限公司 | Thin film transistor, thin film transistor array panel and manufacturing method thereof |
| CN104347677A (en) * | 2013-07-30 | 2015-02-11 | 乐金显示有限公司 | Organic light emitting diode display and method for manufacturing the same |
| CN104900531A (en) * | 2015-06-08 | 2015-09-09 | 京东方科技集团股份有限公司 | Oxide thin-film transistor and array substrate, and manufacturing methods thereof, and display apparatus |
| CN111403489A (en) * | 2020-04-15 | 2020-07-10 | 合肥鑫晟光电科技有限公司 | Thin film transistor, display substrate and manufacturing method thereof |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103456793A (en) * | 2012-06-04 | 2013-12-18 | 三星显示有限公司 | Thin film transistor, thin film transistor array panel and manufacturing method thereof |
| CN104347677A (en) * | 2013-07-30 | 2015-02-11 | 乐金显示有限公司 | Organic light emitting diode display and method for manufacturing the same |
| CN104900531A (en) * | 2015-06-08 | 2015-09-09 | 京东方科技集团股份有限公司 | Oxide thin-film transistor and array substrate, and manufacturing methods thereof, and display apparatus |
| CN111403489A (en) * | 2020-04-15 | 2020-07-10 | 合肥鑫晟光电科技有限公司 | Thin film transistor, display substrate and manufacturing method thereof |
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